High Precision

OPERATIONAL AMPLIFIERS
OPA277
OPA2277
OPA4277
SBOS079A MARCH 1999 REVISED APRIL 2005
www.ti.com
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1999-2005, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
DESCRIPTION
The OPA277 series precision op amps replace the industry
standard OP-177. They offer improved noise, wider output
voltage swing, and are twice as fast with half the quiescent
current. Features include ultra low offset voltage and drift, low
bias current, high common-mode rejection, and high power
supply rejection. Single, dual, and quad versions have identical
specifications for maximum design flexibility.
OPA277 series op amps operate from 2V to 18V supplies with
excellent performance. Unlike most op amps which are specified
at only one supply voltage, the OPA277 series is specified for
real-world applications; a single limit applies over the 5V to
15V supply range. High performance is maintained as the
amplifiers swing to their specified limits. Because the initial offset
voltage (20V max) is so low, user adjustment is usually not
required. However, the single version (OPA277) provides exter-
nal trim pins for special applications.
OPA277 op amps are easy to use and free from phase inversion
and overload problems found in some other op amps. They are
stable in unity gain and provide excellent dynamic behavior over
a wide range of load conditions. Dual and quad versions feature
completely independent circuitry for lowest crosstalk and free-
dom from interaction, even when overdriven or overloaded.
Single (OPA277) and dual (OPA2277) versions are available
in DIP-8, SO-8, and DFN-8 (4mm x 4mm) packages. The quad
(OPA4277) comes in DIP-14 and SO-14 surface-mount pack-
ages. All are fully specified from 40C to +85C and operate
from 55C to +125C.
FEATURES
q ULTRA LOW OFFSET VOLTAGE: 10V
q ULTRA LOW DRIFT: 0.1V/C
q HIGH OPEN-LOOP GAIN: 134dB
q HIGH COMMON-MODE REJECTION: 140dB
q HIGH POWER SUPPLY REJECTION: 130dB
q LOW BIAS CURRENT: 1nA max
q WIDE SUPPLY RANGE: 2V to 18V
q LOW QUIESCENT CURRENT: 800A/amplifier
q SINGLE, DUAL, AND QUAD VERSIONS
q REPLACES OP-07, OP-77, OP-177
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Out D
In D
+In D
V
+In C
In C
Out C
Out A
In A
+In A
V+
+In B
In B
Out B
OPA4277
14-Pin DIP, SO-14
A D
B C
1
2
3
4
8
7
6
5
V+
Out B
In B
+In B
Out A
In A
+In A
V
OPA2277
8-Pin DIP, SO-8
A
B
APPLICATIONS
q TRANSDUCER AMPLIFIER
q BRIDGE AMPLIFIER
q TEMPERATURE MEASUREMENTS
q STRAIN GAGE AMPLIFIER
q PRECISION INTEGRATOR
q BATTERY POWERED INSTRUMENTS
q TEST EQUIPMENT
1
2
3
4
8
7
6
5
Offset Trim
V+
Output
NC
Offset Trim
In
+In
V
OPA277
8-Pin DIP, SO-8
1
2
3
4
Offset Trim
In
+In
V
8
7
6
5
Offset Trim
Pin 1
Indicator
OPA277AIDRM
DFN-8 4mm x 4mm
(top view)
V+
Output
Thermal Pad
on Bottom
(Connect to V)
NC
1
2
3
4
Out A
In A
+In A
V
8
7
6
5
Out B
Pin 1
Indicator
OPA2277AIDRM
DFN-8 4mm x 4mm
(top view)
V+
In B
Thermal Pad
on Bottom
(Connect to V)
+In B
OPA277
OPA2277
OPA277
OPA2277
OPA4277
OPA4277
OPA2277
OPA277
NC = No connection.
OPA277, OPA2277, OPA4277
2
SBOS079A
www.ti.com
OFFSET OFFSET
VOLTAGE VOLTAGE DRIFT
PRODUCT max, V max, V/C PACKAGE-LEAD
Single
OPA277PA 50 1 DIP-8
OPA277P 20 0.15 DIP-8
OPA277UA 50 1 SO-8 Surface Mount
OPA277U 20 0.15 SO-8 Surface Mount
OPA277AIDRM 100 1 DFN-8 (4mm x 4mm)
Dual
OPA2277PA 50 1 DIP-8
OPA2277P 25 0.25 DIP-8
OPA2277UA 50 1 SO-8 Surface Mount
OPA2277U 25 0.25 SO-8 Surface Mount
OPA2277AIDRM 100 1 DFN-8 (4mm x 4mm)
Quad
OPA4277PA 50 1 DIP-14
OPA4277UA 50 1 SO-14 Surface Mount
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet or visit the TI web site
at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
(1)
Supply Voltage .................................................................................... 36V
Input Voltage ..................................................... (V) 0.7V to (V+) +0.7V
Output Short-Circuit
(2)
.............................................................. Continuous
Operating Temperature .................................................. 55C to +125C
Storage Temperature ..................................................... 55C to +125C
Junction Temperature ...................................................................... 150C
Lead Temperature (soldering, 10s) ................................................. 300C
ESD Rating (Human Body Model) .................................................. 2000V
(Machine Model) ........................................................... 100V
NOTE: (1) Stresses above these rating may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. (2) Short-circuit to ground, one amplifier per package.
PACKAGE/ORDERING INFORMATION
(1)
PIN DESCRIPTIONS
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Out D
In D
+In D
V
+In C
In C
Out C
Out A
In A
+In A
V+
+In B
In B
Out B
OPA4277
14-Pin DIP, SO-14
A D
B C
1
2
3
4
8
7
6
5
V+
Out B
In B
+In B
Out A
In A
+In A
V
OPA2277
8-Pin DIP, SO-8
A
B
1
2
3
4
8
7
6
5
Offset Trim
V+
Output
NC
(1)
Offset Trim
In
+In
V
OPA277
8-Pin DIP, SO-8
1
2
3
4
Out A
In A
+In A
V
8
7
6
5
Out B
Pin 1
Indicator
OPA2277AIDRM
DFN-8 4mm x 4mm
(top view)
V+
In B
Thermal Pad
on Bottom
(Connect to V)
+In B
1
2
3
4
Offset Trim
In
+In
V
8
7
6
5
Offset Trim
Pin 1
Indicator
OPA277AIDRM
DFN-8 4mm x 4mm
(top view)
V+
Output
Thermal Pad
on Bottom
(Connect to V)
NC
NOTE: (1) NC = No connection.
OPA277, OPA2277, OPA4277
3
SBOS079A
www.ti.com
ELECTRICAL CHARACTERISTICS: V
S
= 5V to V
S
= 15V
At T
A
= +25C, and R
L
= 2k, unless otherwise noted.
Boldface limits apply over the specified temperature range, 40C to +85C.
OPA277PA, UA
OPA277P, U OPA2277PA, UA OPA277AIDRM,
OPA2277P, U OPA4277PA, UA OPA2277AIDRM
PARAMETER CONDITION MIN TYP
(1)
MAX MIN TYP
(1)
MAX MIN TYP
(1)
MAX UNITS
OFFSET VOLTAGE
Input Offset Voltage: V
OS
OPA277P, U (high grade, single) 10 20 V
OPA2277P, U (high grade, dual) 10 25 V
All PA, UA, Versions 20 50 V
AIDRM Versions 35 100 V
Input Offset Voltage Over Temperature
OPA277P, U (high grade, single) T
A
= 40C to +85C 30 V
OPA2277P, U (high grade, dual) T
A
= 40C to +85C 50 V
All PA, UA, Versions T
A
= 40C to +85C 100 V
AIDRM Versions T
A
= 40C to +85C 165 V
Input Offset Voltage Drift dV
OS
/dT
OPA277P, U (high grade, single) T
A
= 40C to +85C 0.1 0.15 V/C
OPA2277P, U (high grade, dual) T
A
= 40C to +85C 0.1 0.25 V/C
All PA, UA, AIDRM Versions T
A
= 40C to +85C 0.15 1 0.15 1 V/C
Input Offset Voltage: (all models)
vs Time 0.2 V/mo
vs Power Supply PSRR V
S
= 2V to 18V 0.3 0.5 1 1 V/V
T
A
= 40C to +85C V
S
= 2V to 18V 0.5 1 1 V/V
Channel Separation (dual, quad) dc 0.1 V/V
INPUT BIAS CURRENT
Input Bias Current I
B
0.5 1 2.8 2.8 nA
T
A
= 40C to +85C 2 4 4 nA
Input Offset Current I
OS
0.5 1 2.8 2.8 nA
T
A
= 40C to +85C 2 4 4 nA
NOISE
Input Voltage Noise, f = 0.1 to 10Hz 0.22 V
PP
0.035 Vrms
Input Voltage Noise Density, f = 10Hz e
n
12 nV/Hz
f = 100Hz 8 nV/Hz
f = 1kHz 8 nV/Hz
f = 10kHz 8 nV/Hz
Current Noise Density, f = 1kHz i
n
0.2 pA/Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range V
CM
(V) +2 (V+) 2 V
Common-Mode Rejection CMRR V
CM
= (V) +2V

to (V+) 2V 130 140 115 115 dB
T
A
= 40C to +85C V
CM
= (V) +2V

to (V+) 2V 128 115 115 dB
INPUT IMPEDANCE
Differential 100 || 3 M || pF
Common-Mode V
CM
= (V) +2V

to (V+) 2V 250 || 3 G || pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain A
OL
V
O
= (V)+0.5V to
(V+)1.2V, R
L
= 10k 140 dB
V
O
= (V)+1.5V to
(V+)1.5V, R
L
= 2k 126 134 dB
T
A
= 40C to +85C V
O
= (V)+1.5V to
(V+)1.5V, R
L
= 2k 126 dB
FREQUENCY RESPONSE
Gain-Bandwidth Product GBW 1 MHz
Slew Rate SR 0.8 V/s
Settling Time, 0.1% V
S
= 15V, G = 1, 10V Step 14 s
0.01% V
S
= 15V, G = 1, 10V Step 16 s
Overload Recovery Time V
IN
G = V
S
3 s
Total Harmonic Distortion + Noise THD+N 1kHz, G = 1, V
O
= 3.5Vrms 0.002 %
Specifications same as OPA277P, U.
NOTE: (1) V
S
= 15V.
OPA277, OPA2277, OPA4277
4
SBOS079A
www.ti.com
ELECTRICAL CHARACTERISTICS: V
S
= 5V to V
S
= 15V (CONT)
At T
A
= +25C, and R
L
= 2k, unless otherwise noted.
Boldface limits apply over the specified temperature range, 40C to +85C.
OPA277PA, UA
OPA277P, U OPA2277PA, UA OPA277AIDRM,
OPA2277P, U OPA4277PA, UA OPA2277AIDRM
PARAMETER CONDITION MIN TYP
(1)
MAX MIN TYP
(1)
MAX MIN TYP
(1)
MAX UNITS
OUTPUT
Voltage Output V
O
R
L
= 10k (V) +0.5 (V+) 1.2 V
T
A
= 40C to +85C R
L
= 10k (V) +0.5 (V+) 1.2 V
R
L
= 2k (V) +1.5 (V+) 1.5 V
T
A
= 40C to +85C R
L
= 2k (V) +1.5 (V+) 1.5 V
Short-Circuit Current I
SC
35 mA
Capacitive Load Drive C
LOAD
See Typical Curve
POWER SUPPLY
Specified Voltage Range V
S
5 15 V
Operating Voltage Range 2 18 V
Quiescent Current (per amplifier) I
Q
I
O
= 0 790 825 A
T
A
= 40C to +85C I
O
= 0 900 A
TEMPERATURE RANGE
Specified Range 40 +85 C
Operating Range 55 +125 C
Storage Range 55 +125 C
Thermal Resistance
JA
SO-8 Surface-Mount 150 C/W
DIP-8 100 C/W
DIP-14 80 C/W
SO-14 Surface-Mount 100 C/W
DFN-8
(2)
45 C/W
Specifications same as OPA277P, U.
NOTES: (1) V
S
= 15V.
(2) Thermal pad soldered to printed circuit board (PCB).
OPA277, OPA2277, OPA4277
5
SBOS079A
www.ti.com
TYPICAL CHARACTERISTICS
At T
A
= +25C, V
S
= 15V, and R
L
= 2k, unless otherwise noted.
10 100 1k 10k 100k
Frequency (Hz)
CHANNEL SEPARATION vs FREQUENCY
1M
140
120
100
80
60
40
C
h
a
n
n
e
l

S
e
p
a
r
a
t
i
o
n

(
d
B
)
Dual and quad devices. G = 1,
all channels. Quad measured
channel A to D or B to Cother
combinations yield similar or
improved rejection.
10 100 1k 10k 100k
1
0.1
0.01
0.001
T
H
D
+
N
o
i
s
e

(
%
)
Frequency (Hz)
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
V
OUT
= 3.5Vrms
G = 10, R
L
= 2k, 10k
G = 1, R
L
= 2k, 10k
1 10 100 1k 10k
1000
100
10
1
V
o
l
t
a
g
e

N
o
i
s
e

(
n
V
/

H
z
)
C
u
r
r
e
n
t

N
o
i
s
e

(
f
A
/

H
z
)

Frequency (Hz)
INPUT NOISE AND CURRENT NOISE
SPECTRAL DENSITY vs FREQUENCY
Current Noise
Voltage Noise
0.1 1 10 100 1k 10k 100k 1M 10M
140
120
100
80
60
40
20
0
20
A
O
L

(
d
B
)
0
30
60
90
120
150
180
P
h
a
s
e

(

)
Frequency (Hz)
OPEN-LOOP GAIN/PHASE
vs FREQUENCY
G

C
L
= 0
C
L
= 1500pF
0.1 1 10 100 1k 10k 100k 1M
140
120
100
80
60
40
20
0
P
S
R
,

C
M
R

(
d
B
)
Frequency (Hz)
POWER SUPPLY AND COMMON-MODE
REJECTION vs FREQUENCY
+PSR
CMR
PSR
1s/div
INPUT NOISE VOLTAGE vs TIME
5
0
n
V
/
d
i
v
Noise signal is bandwidth limited to
lie between 0.1Hz and 10Hz.
OPA277, OPA2277, OPA4277
6
SBOS079A
www.ti.com
TYPICAL CHARACTERISTICS (CONT)
At T
A
= +25C, V
S
= 15V, and R
L
= 2k, unless otherwise noted.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
P
e
r
c
e
n
t

o
f

A
m
p
l
i
f
i
e
r
s

(
%
)
Offset Voltage (V)
504540353025201510 5 0 5 10 15 20 25 30 35 40 45 50
16
14
12
10
8
6
4
2
0
Typical distribution
of packaged units.
Single, dual, and
quad included.
3
2
1
0
1
2
3
O
f
f
s
e
t

V
o
l
t
a
g
e

C
h
a
n
g
e

(

V
)
0 30 60 90 120
Time from Power Supply Turn-On (s)
WARM-UP OFFSET VOLTAGE DRIFT
15 45 75 105
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
P
e
r
c
e
n
t

o
f

A
m
p
l
i
f
i
e
r
s

(
%
)
Offset Voltage (V/C)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
35
30
25
20
15
10
5
0
Typical distribution
of packaged units.
Single, dual, and
quad included.
INPUT BIAS CURRENT vs TEMPERATURE
125
Temperature (C)
75 50 25 0 25 50 75 100
5
4
3
2
1
0
1
2
3
4
5
I
n
p
u
t

B
i
a
s

C
u
r
r
e
n
t

(
n
A
)
Curves represent typical
production units.
75 50 25 0 25 50 75 100 125
160
150
140
130
120
110
100
A
O
L
,

C
M
R
,

P
S
R

(
d
B
)
Temperature (C)
A
OL
, CMR, PSR vs TEMPERATURE
CMR
A
OL
PSR
75 50 25 0 25 50 75 100 125
1000
950
900
850
800
750
700
650
600
550
500
Q
u
i
e
s
c
e
n
t

C
u
r
r
e
n
t

(

A
)
100
90
80
70
60
50
40
30
20
10
0
S
h
o
r
t
-
C
i
r
c
u
i
t

C
u
r
r
e
n
t

(
m
A
)
Temperature (C)
QUIESCENT CURRENT AND
SHORT-CIRCUIT CURRENT vs TEMPERATURE
+I
SC
I
SC
I
Q
OPA277, OPA2277, OPA4277
7
SBOS079A
www.ti.com
TYPICAL CHARACTERISTICS (CONT)
At T
A
= +25C, V
S
= 15V, and R
L
= 2k, unless otherwise noted.
CHANGE IN INPUT BIAS CURRENT
vs POWER SUPPLY VOLTAGE
40
Supply Voltage (V)
0 5 10 15 20 25 30 35
2.0
1.5
1.0
0.5
0.0
0.5
1.0
1.5
2.0

I
B

(
n
A
)
Curve shows normalized change in
bias current with respect to V
S
= 10V
(+20V). Typical I
B
may range from
0.5nA to +0.5nA at V
S
= 10V.
V
CM
= 0V
CHANGE IN INPUT BIAS CURRENT
vs COMMON-MODE VOLTAGE
15
Common-Mode Voltage (V)
15 10 5 0 5 10
2.0
1.5
1.0
0.5
0.0
0.5
1.0
1.5
2.0

I
B

(
n
A
)
V
S
= 5V
V
S
= 15V
Curve shows normalized change in bias current
with respect to V
CM
= 0V. Typical I
B
may range
from 05.nA to +0.5nA at V
CM
= 0V.
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
(V+)
(V+) 1
(V+) 2
(V+) 3
(V+) 4
(V+) 5
(V) + 5
(V) + 4
(V) + 3
(V) + 2
(V) + 1
(V)
0 5 10 15 20 25 30
Output Current (mA)
O
u
t
p
u
t

V
o
l
t
a
g
e

S
w
i
n
g

(
V
)
55C
55C
125C
25C
125C 25C
1000
900
800
700
600
500
Q
u
i
e
s
c
e
n
t

C
u
r
r
e
n
t

(

A
)
0 5 10 15 20
Supply Voltage (V)
QUIESCENT CURRENT vs SUPPLY VOLTAGE
per amplifier
100
10
20
50
S
e
t
t
l
i
n
g

T
i
m
e

(

s
)
1 10 100
Gain (V/V)
SETTLING TIME vs CLOSED-LOOP GAIN
0.01%
10V step
C
L
= 1500pF
0.1%
MAXIMUM OUTPUT VOLTAGE
vs FREQUENCY
1M
Frequency (Hz)
1k 10k 100k
30
25
20
15
10
5
0
O
u
t
p
u
t

V
o
l
t
a
g
e

(
V
P
P
)
V
S
= 15V
V
S
= 5V
OPA277, OPA2277, OPA4277
8
SBOS079A
www.ti.com
TYPICAL CHARACTERISTICS (CONT)
At T
A
= +25C, V
S
= 15V, and R
L
= 2k, unless otherwise noted.
SMALL-SIGNAL OVERSHOOT
vs LOAD CAPACITANCE
1k 100 10 10k 100k
Load Capacitance (pF)
60
50
40
30
20
10
0
O
v
e
r
s
h
o
o
t

(
%
)
Gain = 1
Gain = +1
Gain = 10
10s/div
LARGE-SIGNAL STEP RESPONSE
G = +1, CL = 1500pF, V
S
= +15V
2
V
/
d
i
v
1s/div
SMALL-SIGNAL STEP RESPONSE
G = +1, C
L
= 0, V
S
= 15V
2
0
m
V
/
d
i
v
1s/div
SMALL-SIGNAL STEP RESPONSE
G = +1, C
L
= 1500pF, V
S
= 15V
2
0
m
V
/
d
i
v
OPA277, OPA2277, OPA4277
9
SBOS079A
www.ti.com
Op Amp
(a)
OPA277
(b)
No bias current
cancellation resistor
(see text)
Conventional op amp with external bias
current cancellation resistor.
OPA277 with no external bias current
cancellation resistor.
R
2
R
1
R
2
R
1
R
B
= R
2
|| R
1
APPLICATIONS INFORMATION
The OPA277 series is unity-gain stable and free from unex-
pected output phase reversal, making it easy to use in a wide
range of applications. Applications with noisy or high imped-
ance power supplies may require decoupling capacitors
close to the device pins. In most cases 0.1F capacitors are
adequate.
The OPA277 series has very low offset voltage and drift. To
achieve highest performance, circuit layout and mechanical
conditions should be optimized. Offset voltage and drift can
be degraded by small thermoelectric potentials at the op amp
inputs. Connections of dissimilar metals will generate thermal
potential which can degrade the ultimate performance of the
OPA277 series. These thermal potentials can be made to
cancel by assuring that they are equal in both input terminals.
Keep thermal mass of the connections made to the two
input terminals similar.
Locate heat sources as far as possible from the critical
input circuitry.
Shield op amp and input circuitry from air currents such as
cooling fans.
OPERATING VOLTAGE
OPA277 series op amp operate from 2V to 18V supplies
with excellent performance. Unlike most op amps which are
specified at only one supply voltage, the OPA277 series is
specified for real-world applications; a single limit applies
over the 5V to 15V supply range. This allows a customer
operating at V
S
= 10V to have the same assured perfor-
mance as a customer using 15V supplies. In addition, key
parameters are assured over the specified temperature range,
40C to +85C. Most behavior remains unchanged through
the full operating voltage range (2V to 18V). Parameters
which vary significantly with operating voltage or temperature
are shown in typical performance curves.
OFFSET VOLTAGE ADJUSTMENT
The OPA277 series is laser-trimmed for very low offset
voltage and drift so most circuits will not require external
adjustment. However, offset voltage trim connections are
provided on pins 1 and 8. Offset voltage can be adjusted by
connecting a potentiometer as shown in Figure 1. This
adjustment should be used only to null the offset of the op
amp. This adjustment should not be used to compensate for
offsets created elsewhere in a system since this can intro-
duce additional temperature drift.
INPUT PROTECTION
The inputs of the OPA277 series are protected with 1k
series input resistors and diode clamps. The inputs can
withstand 30V differential inputs without damage. The pro-
tection diodes will, of course, conduct current when the
inputs are over-driven. This may disturb the slewing behavior
of unity-gain follower applications, but will not damage the op
amp.
INPUT BIAS CURRENT CANCELLATION
The input stage base current of the OPA277 series is
internally compensated with an equal and opposite cancella-
tion circuit. The resulting input bias current is the difference
between the input stage base current and the cancellation
current. This residual input bias current can be positive or
negative.
When the bias current is canceled in this manner, the input
bias current and input offset current are approximately the
same magnitude. As a result, it is not necessary to use a bias
current cancellation resistor as is often done with other op
amps (Figure 2). A resistor added to cancel input bias current
errors may actually increase offset voltage and noise.
FIGURE 2. Input Bias Current Cancellation.
V+
V
20k
OPA277 single op amp only.
Use offset adjust pins only to null
offset voltage of op ampsee text.
Trim Range: Exceeds
Offset Voltage Specification
OPA277
6
7
8
4
3
2
1
0.1F
0.1F
FIGURE 1. OPA277 Offset Voltage Trim Circuit.
OPA277, OPA2277, OPA4277
10
SBOS079A
www.ti.com
R
1
V
1/2
OPA2277
R
2
1/2
OPA2277
V
OUT
= (V
1
V
2
)(1 + )
R
2
R
1
V+
V+
V
R
2
For integrated solution see: INA126, INA2126 (dual)
INA125 (on-board reference)
INA122 (single-supply)
R
1
Load
Cell
R+R
V
2
RR
RR R+R
V
1
14
1
12
5V
11
13
I
REG
1mA
4
3
2
6
R
G
1250
XTR105
1/2
OPA2277
7
R
G
R
G
V
IN

V
IN
+
V
REG
I
R2
V+
I
RET
I
O
E
B
8
I
O
= 4mA + (V
IN
V
IN
)
+ 40
R
G
9
10
R
F
10k
R
412
1/2
OPA2277
V+
V
Type J
25
(G = 1 + = 50)
2R
F
R
50
1k
R
F
10k
I
R1
V
LIN
R
CM
= 1250
0.01F
FIGURE 3. Load Cell Amplifier.
FIGURE 4. Thermocouple Low Offset, Low Drift Loop Measurement with Diode Cold Junction Compensation.
OPA277, OPA2277, OPA4277
11
SBOS079A
www.ti.com
DFN PACKAGE
The OPA277 series uses the 8-lead DFN (also known as
SON), which is a QFN package with contacts on only two
sides of the package bottom. This leadless, near-chip-scale
package maximizes board space and enhances thermal and
electrical characteristics through an exposed pad.
DFN packages are physically small, have a smaller routing
area, improved thermal performance, and improved electrical
parasitics, with a pinout scheme that is consistent with other
commonly-used packages, such as SO and MSOP. Addition-
ally, the absence of external leads eliminates bent-lead
issues.
The DFN package can be easily mounted using standard
printed circuit board (PCB) assembly techniques. See Appli-
cation Note, QFN/SON PCB Attachment (SLUA271) and
Application Report, Quad Flatpack No-Lead Logic Packages
(SCBA017), both available for download at www.ti.com.
The exposed leadframe die pad on the bottom of the
package should be connected to V.
LAYOUT GUIDELINES
The leadframe die pad should be soldered to a thermal pad
on the PCB. Mechanical drawings located at the end of this
data sheet list the physical dimensions for the package and
pad.
Soldering the exposed pad significantly improves board-level
reliability during temperature cycling, key push, package
shear, and similar board-level tests. Even with applications
that have low-power dissipation, the exposed pad must be
soldered to the PCB to provide structural integrity and long-
term reliability.
PACKAGING INFORMATION
Orderable Device Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
OPA2277AIDRMR PREVIEW SON DRM 8 3000 TBD Call TI Call TI
OPA2277AIDRMRG4 ACTIVE SON DRM 8 3000 TBD Call TI Call TI
OPA2277AIDRMT ACTIVE SON DRM 8 250 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
OPA2277AIDRMTG4 ACTIVE SON DRM 8 250 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
OPA2277P ACTIVE PDIP P 8 50 Green (RoHS &
no Sb/Br)
CU NIPDAU N / A for Pkg Type
OPA2277PA ACTIVE PDIP P 8 50 Green (RoHS &
no Sb/Br)
CU NIPDAU N / A for Pkg Type
OPA2277PAG4 ACTIVE PDIP P 8 50 Green (RoHS &
no Sb/Br)
CU NIPDAU N / A for Pkg Type
OPA2277PG4 ACTIVE PDIP P 8 50 Green (RoHS &
no Sb/Br)
CU NIPDAU N / A for Pkg Type
OPA2277U ACTIVE SOIC D 8 100 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA2277U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA2277U/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA2277UA ACTIVE SOIC D 8 100 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA2277UA/2K5 ACTIVE SOIC D 8 2500 Pb-Free
(RoHS)
CU NIPDAU Level-3-260C-168 HR
OPA2277UA/2K5E4 ACTIVE SOIC D 8 2500 Pb-Free
(RoHS)
CU NIPDAU Level-3-260C-168 HR
OPA2277UAE4 ACTIVE SOIC D 8 100 TBD Call TI Call TI
OPA2277UAG4 ACTIVE SOIC D 8 100 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA2277UG4 ACTIVE SOIC D 8 100 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA277AIDRMR ACTIVE SON DRM 8 3000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
OPA277AIDRMRG4 ACTIVE SON DRM 8 3000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
OPA277AIDRMT ACTIVE SON DRM 8 250 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
OPA277AIDRMTG4 ACTIVE SON DRM 8 250 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
OPA277P ACTIVE PDIP P 8 50 Green (RoHS &
no Sb/Br)
CU NIPDAU N / A for Pkg Type
OPA277PA ACTIVE PDIP P 8 50 Green (RoHS &
no Sb/Br)
CU NIPDAU N / A for Pkg Type
OPA277PAG4 ACTIVE PDIP P 8 50 Green (RoHS &
no Sb/Br)
CU NIPDAU N / A for Pkg Type
OPA277PG4 ACTIVE PDIP P 8 50 Green (RoHS &
no Sb/Br)
CU NIPDAU N / A for Pkg Type
OPA277U ACTIVE SOIC D 8 100 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
PACKAGE OPTION ADDENDUM
www.ti.com 28-Jun-2007
Addendum-Page 1
Orderable Device Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
OPA277U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA277U/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA277UA ACTIVE SOIC D 8 100 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA277UA/2K5 ACTIVE SOIC D 8 2500 Pb-Free
(RoHS)
CU NIPDAU Level-3-260C-168 HR
OPA277UA/2K5E4 ACTIVE SOIC D 8 2500 Pb-Free
(RoHS)
CU NIPDAU Level-3-260C-168 HR
OPA277UAE4 ACTIVE SOIC D 8 100 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA277UAG4 ACTIVE SOIC D 8 100 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA277UG4 ACTIVE SOIC D 8 100 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA4277PA ACTIVE PDIP N 14 25 Green (RoHS &
no Sb/Br)
CU NIPDAU N / A for Pkg Type
OPA4277PAG4 ACTIVE PDIP N 14 25 Green (RoHS &
no Sb/Br)
CU NIPDAU N / A for Pkg Type
OPA4277UA ACTIVE SOIC D 14 58 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA4277UA/2K5 ACTIVE SOIC D 14 2500 Pb-Free
(RoHS)
CU NIPDAU Level-3-260C-168 HR
OPA4277UA/2K5E4 ACTIVE SOIC D 14 2500 Pb-Free
(RoHS)
CU NIPDAU Level-3-260C-168 HR
OPA4277UAE4 ACTIVE SOIC D 14 58 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
OPA4277UAG4 ACTIVE SOIC D 14 58 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
PACKAGE OPTION ADDENDUM
www.ti.com 28-Jun-2007
Addendum-Page 2
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 28-Jun-2007
Addendum-Page 3
TAPE AND REEL INFORMATION
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Jul-2007
Pack Materials-Page 1
Device Package Pins Site Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm)
W
(mm)
Pin1
Quadrant
OPA2277AIDRMT DRM 8 MLA 180 12 4.3 4.3 1.5 8 12 Q2
OPA2277UA/2K5 D 8 MLA 330 12 6.9 5.4 2.0 8 12 Q1
OPA277AIDRMR DRM 8 MLA 330 12 4.3 4.3 1.5 8 12 Q2
OPA277AIDRMT DRM 8 MLA 180 12 4.3 4.3 1.5 8 12 Q2
OPA277UA/2K5 D 8 MLA 330 12 6.9 5.4 2.0 8 12 Q1
OPA4277UA/2K5 D 14 MLA 330 16 6.5 9.5 2.1 8 16 Q1
TAPE AND REEL BOX INFORMATION
Device Package Pins Site Length (mm) Width (mm) Height (mm)
OPA2277AIDRMT DRM 8 MLA 190.0 212.7 31.75
OPA2277UA/2K5 D 8 MLA 346.0 346.0 29.0
OPA277AIDRMR DRM 8 MLA 346.0 346.0 29.0
OPA277AIDRMT DRM 8 MLA 190.0 212.7 31.75
OPA277UA/2K5 D 8 MLA 390.0 348.0 63.0
OPA4277UA/2K5 D 14 MLA 346.0 346.0 33.0
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Jul-2007
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Jul-2007
Pack Materials-Page 3
MECHANICAL DATA
MPDI001A JANUARY 1995 REVISED JUNE 1999
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
P (R-PDIP-T8) PLASTIC DUAL-IN-LINE
8
4
0.015 (0,38)
Gage Plane
0.325 (8,26)
0.300 (7,62)
0.010 (0,25) NOM
MAX
0.430 (10,92)
4040082/D 05/98
0.200 (5,08) MAX
0.125 (3,18) MIN
5
0.355 (9,02)
0.020 (0,51) MIN
0.070 (1,78) MAX
0.240 (6,10)
0.260 (6,60)
0.400 (10,60)
1
0.015 (0,38)
0.021 (0,53)
Seating Plane
M 0.010 (0,25)
0.100 (2,54)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm