Compal Confidential: IAKAA LA-3401P Schematics Document
Compal Confidential: IAKAA LA-3401P Schematics Document
Compal Confidential: IAKAA LA-3401P Schematics Document
Compal Confidential
2
2006-10-03
REV: 0.3
2006/10/03
Issued Date
Security Classification
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Cover Sheet
Size
Document Number
Rev
0.3
Sheet
of
38
Compal confidential
Yonah/Merom
Fan Control
Model : IAKAA
File Name : LA-3401P
page 4
Thermal Sensor
ADM1032ARM
uFCPGA-479 CPU
NAPA Platform
page 4,5,6
page 16
page 4
533/667MHz
page 15
VGA/B Conn.
PCI-E BUS
10/100/1000 LAN
RTL8111B/RTL8101E
BANK 0, 1, 2, 3
page 12, 13
Dual Channel
page 7,8,9,10,11
PCI-Express
x16
USB1.1
Finger Printer
page 29
2.5GHz
DMI x 4
2
DDR2-SO-DIMM X2
DDR2-533/667
PCBGA 1466
page 16
(port 3)
page 14
H_D#(0..63)
NVIDIA NB7P-GS
NB7M-SE
with 64/128/256/512
MB VRAM
ICS9LPRS325AKLFT
H_A#(3..31)
FSB
LCD Conn.
Clock Generator
USB x 1
connpage
USB2.0
Bluetooth
Conn
page 31
USB/B conn
28
page 25
(port 2)
PCI BUS
3.3V 33 MHz
Azalia
Intel ICH7-M
mBGA-652
CardBus Controller
page 22
USB port 1, 4
USB port 0, 2
USB port 5
USB port 7
page 22
RJ45/11 CONN
USB port 6
3.3V 24.576MHz/48Mhz
SATA
1.5GHz
PATA
3.3V ATA-100
MDC1.5
page 17,18,19
TI PCI7412
Audio Codec
ALC861 VD
page 25
SPK/JP-AMP: APA2056
page 23
page 24
page 20,21
SATA 0
Slot 0
LED
3
page 21
1394 port
5in1 Slot
page 20
page 20
page 28
LPC BUS
3.3V 33 MHz
SATA 1
page 17
RTC CKT.
page 17
PATA Master
IAKAA Sub-board
Finger Print /B
LS-3401P Rev0
page 17
ENE KB910QF
SW/B
LS-3392P Rev0
page 26
page 30
VGA/B
LS-3403P Rev0
Page 30~36
Touch Pad
page 23
Int.KBD
page 28
BIOS
page 27
CIR
page 25
2006/10/03
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Security Classification
Issued Date
USB/B
LS-3391P Rev0
Title
Block Diagram
Size
Document Number
Rev
0.3
Sheet
of
38
Voltage Rails
Power Plane
Description
S1
S3
S5
VIN
N/A
N/A
N/A
B+
N/A
N/A
N/A
+CPU_CORE
ON
OFF
OFF
+0.9VS
ON
OFF
OFF
+VCCP
ON
OFF
OFF
+1.5VS
ON
OFF
OFF
+1.8V
ON
ON
OFF
+1.8VS
ON
OFF
OFF
+2.5VS
ON
OFF
OFF
+3VALW
ON
ON
ON*
+3VS
ON
OFF
OFF
+5VALW
ON
ON
ON*
Vcc
Ra
3.3V +/- 5%
100K +/- 5%
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
Board ID
+5VS
ON
OFF
OFF
+VSB
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
0
1
2
3
4
5
6
7
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
BOARD ID Table
Board ID
0
1
2
3
4
5
6
7
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
PCI Device ID
IDSEL #
REQ/GNT #
PIRQ
1394
D0
AD20
A,B,C,D
CARD BUS
D4
AD20
A,B,C,D
5IN1
D4
AD20
A,B,C,D
SKU ID
0
1
2
3
4
5
6
7
HEX
ADDRESS
SM1 24C16
A0H
1010000Xb
16H
0001011Xb
SM2 ADM0132
CPU THERMAL MONITOR
98H
1001100Xb
V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V
BTO Item
2ND HDD
LAN
WLAN
NB
BT
MIC
CIR
FINGER PRINT
SKU ID Table
BOM Structure
2HDD@
100M@
1000M@
KS@
GM@
PM@
BT@
MIC@
CIR@
7412@
5IN1
SKU
10 (10E)
10C
10G
10GC
10J (10EJ)
10CJ
10GJ
10GCJ
HEX
ADDRESS
DDR SO-DIMM 0
A0
10100000
DDR SO-DIMM 1
A4
10100100
D2
11010010
2006/10/03
Issued Date
Security Classification
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Notes
Size
Document Number
Rev
0.3
Sheet
of
38
+VCCP
7
7
7
7
7
7
R94
7
56_0402_5%
7
1
2
7
7
7
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRD Y#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_RESET#
H_RS#[0..2]
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
H_TRDY#
R95
1
2
56_0402_5%
17 H_PWRGOOD
7
H_CPUSLP#
R85
R84
2 @ 1K_0402_5%
51_0402_5%
2
1
1
RS0#
RS1#
RS2#
TRDY#
AD4
AD3
AD1
AC4
BPM0#
BPM1#
BPM2#
BPM3#
J26
M26
V23
AC20
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
H23
M24
W24
AD23
G22
N25
Y25
AE24
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1
A6
A5
C4
B3
C6
B4
H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI
STPCLK#
SMI#
D5
A3
H_STPCLK#
H_SMI#
CONTROL
DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#
H_PW RGOOD D6
H_CPUSLP#
D7
XDP_TCK
AC5
XDP_TDI
AA6
XDP_TDO
AB3
TEST1
C26
TEST2
D25
XDP_TMS
AB5
XDP_TRST# AB6
PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#
MISC
LEGACY CPU
THERMAL
THERMDA DIODE
THERMDC
THERMTRIP#
1
C212
C209
0.1U_0402_16V4Z
U8
H_THERMDA
D+
VDD1
H_THERMDC
D-
ALERT#
16,26 EC_SMB_CK2
SCLK
THERM#
16,26 EC_SMB_DA2
SDATA
GND
2200P_0402_50V7K
2 @ 56_0402_5%
XDP_BPM#5
R53
56_0402_5%
XDP_TRST#
R57
56_0402_5%
XDP_TCK
R47
56_0402_5%
R113
@ 10K_0402_5%
ADM1032ARM_RM8
+5VS
26
PU5B
5 +
EN_DFAN1
1
2
R594 10K_0402_5%
LM358DT_SO8
P@
R674
1
0 7
1
R431
C
FAN1_ON 2
B
100_0402_5%
Q40
E
+FAN1_VOUT
D37
+3VS
1
R432
JP4
1
2
3
2
10K_0402_5%
ACES_85205-0300
1
26 FAN_SPEED1
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
D36
FMMT619_SOT23
C820 0.1U_0402_16V4Z
2
8.2K_0402_5%
C598
@1000P_0402_50V7K
C597
@1000P_0402_50V7K
7
7
7
7
B
H_DSTBN#[0..3] 7
H_DSTBP#[0..3] 7
2
C211
1
@ 180P_0402_50V8J
2
C202
2
C162
H_NMI
2
C203
H_A20M#
2
C210
H_INTR
2
C173
H_IGNNE#
2
C161
H_STPCLK#
2
C172
H_PW RGOOD
2
C171
H_CPUSLP#
2
C169
1
@ 180P_0402_50V8J
1
@ 180P_0402_50V8J
1
@ 180P_0402_50V8J
1
@ 180P_0402_50V8J
1
@ 180P_0402_50V8J
1
@ 180P_0402_50V8J
1
@ 180P_0402_50V8J
1
@ 180P_0402_50V8J
1
@ 180P_0402_50V8J
H_SMI#
H_A20M# 17
H_FERR# 17
H_IGNNE# 17
H_INIT# 17
H_INTR
17
H_NMI
17
H_INIT#
H_STPCLK# 17
H_SMI#
17
FOX_PZ47903-2741-42_YONAH
+VCCP
R98
H_DPSLP# 1
@ 56_0402_5%
R97
H_DPRSTP# 1
2
2 2
R89
@ 56_0402_5%
B
1 OCP#
Q12
@ MMBT3904_SOT23
5
OCP#
Security Classification
2006/10/03
Issued Date
@ 56_0402_5%
H_PROCHOT# 3
R54
+3VS
+VCCP
56_0402_5%
XDP_TDO
DINV0#
DINV1#
DINV2#
DINV3#
HOST CLK
C20
E1
B5
E5
D24
AC2
XDP_BPM#5 AC1
H_PROCHOT# D21
H_THERMDA
A24
H_THERMDC
A25
H_THERMTRIP# C7
7,17 H_THERMTRIP#
ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#
F3
F4
G3
G2
DBRESET#
H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPWR#
18
DBRESET#
7
H_DBSY#
17
H_DPSLP#
17,36 H_DPRSTP#
7
H_DPWR#
+VCCP
H1
E2
G5
F1
H5
F21
G6
E4
D20
H4
B1
BCLK0
BCLK1
56_0402_5%
1SS355_SOD323
CLK_CPU_BCLK A22
CLK_CPU_BCLK# A21
14 CLK_CPU_BCLK
14 CLK_CPU_BCLK#
ADSTB0#
ADSTB1#
R55
L2
V4
R56
H_ADSTB#0
H_ADSTB#1
DATA GROUP
ADDR GROUP
XDP_TDI
XDP_TMS
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
K3
H2
K2
J3
L5
E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
H_ADSTB#0
H_ADSTB#1
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
YONAH
7
7
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
1N4148_SOT23
H_REQ#[0..4]
J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
+VCCP
H_D#[0..63] 7
JP18A
H_A#[3..31]
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
18
Title
Size
Document Number
Rev
0.3
Sheet
of
38
+VCCP
1
+CPU_CORE
R51
100_0402_1%
1
2
VCCSENSE
+1.5VS
VSSSENSE
R58
2K_0402_1%
C163
0.01U_0402_16V7K
2
1
R52
100_0402_1%
2
C164
10U_0805_10V4Z
R67
1K_0402_1%
JP18B
AF7
AE7
VCCSENSE
VSSSENSE
B26
VCCA
K6
J6
M6
N6
T6
R6
K21
J21
M21
N21
T21
R21
V21
W21
V6
G21
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
H_PSI#
AE6
PSI#
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
AD6
AF5
AE5
AF4
AE3
AF2
AE2
VID0
VID1
VID2
VID3
VID4
VID5
VID6
CPU_BSEL
CPU_BSEL2
CPU_BSEL1
CPU_BSEL0
133
166
H_PSI#
36
36
36
36
36
36
36
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
AD26
+V_CPU_GTLREF
14
14
14
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
R65
54.9_0402_1%
2
1
R68
27.4_0402_1%
2
1
R325
54.9_0402_1%
2
1
GTLREF
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
B22
B23
C21
BSEL0
BSEL1
BSEL2
COMP0
COMP1
COMP2
COMP3
R26
U26
U1
V1
COMP0
COMP1
COMP2
COMP3
+CPU_CORE
R324
27.4_0402_1%
2
1
JP18C
D
VCCSENSE
VSSSENSE
+VCCP
36
+CPU_CORE
+V_CPU_GTLREF
E7
AB20
AA20
AF20
AE20
AB18
AB17
AA18
AA17
AD18
AD17
AC18
AC17
AF18
AF17
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
YONAH
D2
F6
D3
C1
AF1
D22
C23
C24
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
T22
B25
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB26
AA25
AD25
AE26
AB23
AC24
AF24
AE23
AA22
AD22
AC21
AF21
AB19
AA19
AD19
AC19
AF19
AE19
AB16
AA16
AD16
AC16
AF16
AE16
AB13
AA14
AD13
AC14
AF13
AE14
AB11
AA11
AD11
AC11
AF11
AE11
AB8
AA8
AD8
AC8
AF8
AE8
AA5
AD5
AC6
AF6
AB4
AC3
AF3
AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1
AE18
AE17
AB15
AA15
AD15
AC15
AF15
AE15
AB14
AA13
AD14
AC13
AF14
AE13
AB12
AA12
AD12
AC12
AF12
AE12
AB10
AB9
AA10
AA9
AD10
AD9
AC10
AC9
AF10
AF9
AE10
AE9
AB7
AA7
AD7
AC7
B20
A20
F20
E20
B18
B17
A18
A17
D18
D17
C18
C17
F18
F17
E18
E17
B15
A15
D15
C15
F15
E15
B14
A13
D14
C13
F14
E13
B12
A12
D12
C12
F12
E12
B10
B9
A10
A9
D10
D9
C10
C9
F10
F9
E10
E9
B7
A7
F7
FOX_PZ47903-2741-42_YONAH
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
YONAH
POWER, GROUND
K1
J2
M2
N1
T1
R2
V2
W1
A26
D26
C25
F25
B24
A23
D23
E24
B21
C22
F22
E21
B19
A19
D19
C19
F19
E19
B16
A16
D16
C16
F16
E16
B13
A14
D13
C14
F13
E14
B11
A11
D11
C11
F11
E11
B8
A8
D8
C8
F8
E8
G26
K26
J25
M25
N26
T26
R25
V25
W26
H24
G23
K23
L24
P24
N23
T23
U24
Y24
W23
H21
J22
M22
L21
P21
R22
V22
U21
Y21
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
FOX_PZ47903-2741-42_YONAH
Security Classification
2006/10/03
Issued Date
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
Document Number
Rev
0.3
Sheet
of
38
+CPU_CORE
C533
10U_0805_6.3V6M
C135
10U_0805_6.3V6M
C136
10U_0805_6.3V6M
C137
10U_0805_6.3V6M
C138
10U_0805_6.3V6M
C139
10U_0805_6.3V6M
C140
10U_0805_6.3V6M
C152
10U_0805_6.3V6M
+CPU_CORE
C146
10U_0805_6.3V6M
C147
10U_0805_6.3V6M
C544
10U_0805_6.3V6M
C148
10U_0805_6.3V6M
C149
10U_0805_6.3V6M
C150
10U_0805_6.3V6M
C151
10U_0805_6.3V6M
C206
10U_0805_6.3V6M
+CPU_CORE
C207
10U_0805_6.3V6M
C205
10U_0805_6.3V6M
C204
10U_0805_6.3V6M
C543
10U_0805_6.3V6M
C546
10U_0805_6.3V6M
C545
10U_0805_6.3V6M
C125
10U_0805_6.3V6M
C124
10U_0805_6.3V6M
+CPU_CORE
C127
10U_0805_6.3V6M
C529
10U_0805_6.3V6M
C528
10U_0805_6.3V6M
C548
10U_0805_6.3V6M
C547
10U_0805_6.3V6M
C532
10U_0805_6.3V6M
C531
10U_0805_6.3V6M
C530
10U_0805_6.3V6M
+CPU_CORE
@ 330U_D_2VM
330U_D_2VM
@ 330U_D_2VM
C550
330U_D_2VM
C121
1
C122
1
C537
1
C536
1
C208
330U_D_2VM
330U_D_2VM
1
C134
+
2
330U_D2E_2.5VM_R9
+VCCP
C539
0.1U_0402_16V4Z
C534
0.1U_0402_16V4Z
C540
0.1U_0402_16V4Z
C535
0.1U_0402_16V4Z
C541
0.1U_0402_16V4Z
C538
0.1U_0402_16V4Z
Security Classification
2006/10/03
Issued Date
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
Document Number
Rev
0.3
Sheet
of
38
U6B
R63
54.9_0402_1%
2
1
HVREF0
HVREF1
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP
HXSWING
HYSWING
R60
24.9_0402_1%
2
1
R64
24.9_0402_1%
2
1
J13
H_VREF
K13
H_XRCOMP E1
H_XSCOMP E2
H_YRCOMP Y1
H_YSCOMP U1
H_SWNG0
E4
H_SWNG1 W1
12
12
13
13
HADSTB#0
HADSTB#1
B9
C13
H_ADSTB#0
H_ADSTB#1
HCLKN
HCLKP
AG1
AG2
CLK_MCH_BCLK#
CLK_MCH_BCLK
HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
K4
T7
Y5
AC4
K3
T6
AA5
AC5
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
J7
W8
U3
AB10
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
HCPURST#
HADS#
HTRDY#
HDPWR#
HDRDY#
HDEFER#
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HCPUSLP#
B7
E8
E7
J9
H8
C3
D4
D3
B3
C7
C6
F6
A7
E3
H_RESET#
H_ADS#
H_TRDY#
H_DPWR#
H_DRD Y#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
H_CPUSLP#
HRS0#
HRS1#
HRS2#
B4
E6
D6
H_RS#0
H_RS#1
H_RS#2
HDINV#0
HDINV#1
HDINV#2
HDINV#3
DMI_TXP3
DMI_TXP2
DMI_TXP1
DMI_TXP0
AE35
AF39
AG35
AH39
DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3
18
18
18
18
DMI_TXN3
DMI_TXN2
DMI_TXN1
DMI_TXN0
DMI_TXN3
DMI_TXN2
DMI_TXN1
DMI_TXN0
AC35
AE39
AF35
AG39
DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3
18
18
18
18
DMI_RXP3
DMI_RXP2
DMI_RXP1
DMI_RXP0
DMI_RXP3
DMI_RXP2
DMI_RXP1
DMI_RXP0
AE37
AF41
AG37
AH41
DMITXN0
DMITXN1
DMITXN2
DMITXN3
18
18
18
18
DMI_RXN3
DMI_RXN2
DMI_RXN1
DMI_RXN0
DMI_RXN3
DMI_RXN2
DMI_RXN1
DMI_RXN0
AC37
AE41
AF37
AG41
DMITXP0
DMITXP1
DMITXP2
DMITXP3
12
12
13
13
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
AY35
AR1
AW7
AW40
SM_CK0
SM_CK1
SM_CK2
SM_CK3
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
AW35
AT1
AY7
AY40
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
AU20
AT20
BA29
AY29
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
DDR_CS0_DIMMA# AW13
DDR_CS1_DIMMA# AW12
DDR_CS2_DIMMB# AY21
DDR_CS3_DIMMB# AW21
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
12
12
13
13
H_REQ#[0..4] 4
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
D8
G8
B8
F8
A8
DMI_TXP3
DMI_TXP2
DMI_TXP1
DMI_TXP0
12
12
13
13
H_ADSTB#0 4
H_ADSTB#1 4
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
CLK_MCH_BCLK# 14
CLK_MCH_BCLK 14
H_DSTBN#[0..3] 4
12
12
13
13
+1.8V
H_DSTBP#[0..3] 4
M_ODT0
M_ODT1
M_ODT2
M_ODT3
R319 1
1
R318
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
4
4
4
4
H_RESET# 4
H_ADS# 4
H_TRDY# 4
H_DPWR# 4
H_DRDY# 4
H_DEFER# 4
H_HITM# 4
H_HIT#
4
H_LOCK# 4
H_BR0# 4
H_BNR# 4
H_BPRI# 4
H_DBSY# 4
H_CPUSLP# 4
2 80.6_0402_1%
2
80.6_0402_1%
+SM_VREF0
+SM_VREF1
18 PM_BMBUSY#
R28 1
12,13 DDR_TS
R287 1
18,36 DPRSLPVR
4,17 H_THERMTRIP#
18,26
PWROK
16,18,22,25 PLT_RST#
H_RS#[0..2] 4
R9
2
C595
0.1U_0402_16V4Z
CLK_REQ#
H32
A3
A39
A4
A40
AW1
AW41
AY1
BA1
BA2
BA3
BA39
BA40
BA41
C1
AY41
B2
B41
C41
D1
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
RESERVED7
RESERVED8
RESERVED9
RESERVED10
RESERVED11
RESERVED12
RESERVED13
T32
R32
F3
F7
AG11
AF11
H7
J19
A41
A34
D28
D27
A35
R292
1
2
10K_0402_5%
R288
1
2
10K_0402_5% @
011
001
PM_EXTTS#0
PM_EXTTS#1
C
= 667MT/s FSB
= 533MT/s FSB
@ 2
R311
CFG5
CFG5
2.2K_0402_5%
@ 2
R306
CFG7
CFG7
2.2K_0402_5%
@ 2
R309
CFG9
CFG9
*1 = Normal Operation
2.2K_0402_5%
@ 2
R312 CFG11
CFG11
*1 = Calistoga
0 = Reserved
2.2K_0402_5%
@ 2
R316 CFG12
2.2K_0402_5%
@ 2
R315 CFG13
2.2K_0402_5%
@ 2
R310 CFG16
CFG16
1K_0402_5% @ 2
R294 CFG18
CFG18
1K_0402_5%
R291 CFG19
CFG19
00
01
10
*11
CFG[13:12]
2
1
Modified
0 = Normal Operation
SDVO_CTRLDATA
(Default)
SDVO is
*0 = Only PCIE or
(Default)
operational.
CFG20
R290 CFG20
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
(Default)
Issued Date
(Default)
Reserved
XOR Mode Enabled
All Z Mode Enabled
Normal Operation
(Default)
1K_0402_1%
2
=
=
=
=
(PCIE/SDVO select)
+3VS
2.2K_0402_5%
R61
Security Classification
MCH_CLKREQ# 14
PMR3@
1K_0402_1%
C129
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C128
1
R66
2
CLK_PCIE_GMCH# 14
CLK_PCIE_GMCH 14
MCH_CLKREQ#
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
1
+SM_VREF0
H_SWNG1
100_0402_1%
0.1U_0402_16V4Z
C514
1
R320
2
100_0402_1%
0.1U_0402_16V4Z
CFG18
CFG19
CFG20
D_REF_SSCLKN
D_REF_SSCLKP
1
R69
221_0603_1%
1
R321
2
221_0603_1%
100_0402_1%
C503
200_0402_1%
1
R313
R62
15mils
CFG16
0 = DMI x 2
*1 = DMI x 4 (Default)
1K_0402_1%
+3VS
1
R426
H_VREF
1
Refer Strap
Pin Table
CLK_MCH_DREFCLK# 14
CLK_MCH_DREFCLK 14
+1.8V
CFG11
CFG12
CFG13
C40
D41
CFG[2:0]
+VCCP
H_SWNG0
CFG9
CLK_MCH_3GPLL 14
CLK_MCH_3GPLL# 14
SM_VREF0
SM_VREF1
ICH_SYNC#
CFG7
A27
A26
SM_RCOMPN
SM_RCOMPP
PM_BMBUSY#
PM_EXTTS0#
PM_EXTTS1#
PM_THERMTRIP#
PWROK
RSTIN#
CFG5
1K_0402_1%
+VCCP
AK1
AK41
MCH_CLKSEL0 14
MCH_CLKSEL1 14
MCH_CLKSEL2 14
D_REF_CLKN
D_REF_CLKP
R425
Layout Note:
H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 /
H_SWNG1 trace width and spacing is 18/20.
AV9
AT9
+SM_VREF0
Layout Note:
+SM_VREF0 & +SM_VREF1
trace width and
+1.8V
spacing is 20/20.
15mils
R314
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
CALISTOGA_FCBGA1466~D
PMR3@
SM_OCDCOMP0
SM_OCDCOMP1
PM_BMBUSY#
G28
PM_EXTTS#0
F25
PM_EXTTS#1
H26
H_THERMTRIP#
G6
PWROK
AH33
PLTRST_R#
AH34
1
100_0402_1%
K28
18 MCH_ICH_SYNC#
+SM_VREF1
SMRCOMPN
SMRCOMPP
AL20
AF10
MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
K16
K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26
AG33 CLK_MCH_3GPLL
AF33 CLK_MCH_3GPLL#
G_CLKP
G_CLKN
BA13
BA12
AY20
AU21
2 0_0402_5%
2 0_0402_5%
CALISTOGA_FCBGA1466~D
+VCCP
M_ODT0
M_ODT1
M_ODT2
M_ODT3
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
CFG
Lane Reversal
Polarity Reversal
18
18
18
18
CLK
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
NC
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
PM
R59
54.9_0402_1%
2
1
+VCCP
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
H_XSCOMP/H_YSCOMP trace
width and spacing is 5/20.
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
DDR MUXING
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
K11
G4
T10
W11
T3
U7
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
AA10
Y8
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8
DMI
H_A#[3..31] 4
U6A
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
RESERVED
H_D#[0..63]
HOST
Title
Size
Document Number
Rev
0.3
Sheet
of
38
12 DDR_A_DM[0..7]
12 DDR_A_DQS[0..7]
12 DDR_A_DQS#[0..7]
12 DDR_A_MA[0..13]
DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2
AU12
AV14
BA20
SA_BS0
SA_BS1
SA_BS2
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
AY13
AW14
AY14
AK23
AK24
SA_CAS#
SA_RAS#
SA_WE#
SA_RCVENIN#
SA_RCVENOUT#
U6E
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2
12
12
12
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_D[0..63] 12
13
13
13
DDR_B_BS#0
DDR_B_BS#1
DDR_B_BS#2
13 DDR_B_DM[0..7]
13 DDR_B_DQS[0..7]
13 DDR_B_DQS#[0..7]
13 DDR_B_MA[0..13]
13
13
13
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
DDR_B_BS#0
DDR_B_BS#1
DDR_B_BS#2
AT24
AV23
AY28
SB_BS0
SB_BS1
SB_BS2
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
AR24
AU23
AR27
AK16
AK18
SB_CAS#
SB_RAS#
SB_WE#
SB_RCVENIN#
SB_RCVENOUT#
CALISTOGA_FCBGA1466~D
PMR3@
U6D
12
12
12
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ5
AJ3
DDR_B_D[0..63] 13
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
CALISTOGA_FCBGA1466~D
PMR3@
Security Classification
2006/10/03
Issued Date
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
Document Number
Rev
0.3
Sheet
of
38
PCIE_MTX_C_GRX_N[0..15]
16 PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
16 PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
16 PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
16 PCIE_GTX_C_MRX_P[0..15]
+3VS
R295
GM@
2.2K_0402_5%
GMCH_LCD_CLK
2.2K_0402_5%
GMCH_LCD_DATA
R296 1
2.2K_0402_5%
GMCH_CRT_CLK
R297 1
2.2K_0402_5%
GMCH_CRT_DATA
10K_0402_5%
LCTLB_DATA
10K_0402_5%
LCTLA_CLK
R283 1
R284 1
@
@
16 GMCH_TXOUT0+
16 GMCH_TXOUT1+
16 GMCH_TXOUT2+
16 GMCH_TXOUT016 GMCH_TXOUT116 GMCH_TXOUT2-
R282 1
1.5K_0402_1%
LIBG
R44
75_0402_1%
GMCH_TV_COMPS
R41
150_0402_1%
GMCH_TV_LUMA
R37
150_0402_1%
GMCH_TV_CRMA
U6C
H27
H28
SDVOCTRL_DATA
SDVOCTRL_CLK
GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+
B37
B34
A36
LA_DATA0
LA_DATA1
LA_DATA2
GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2-
C37
B35
A37
LA_DATA#0
LA_DATA#1
LA_DATA#2
F30
D29
F28
LB_DATA0
LB_DATA1
LB_DATA2
G30
D30
F29
LB_DATA#0
LB_DATA#1
LB_DATA#2
A32
A33
E26
E27
LA_CLK
LA_CLK#
LB_CLK
LB_CLK#
D32
J30
H30
H29
G26
G25
F32
B38
C35
C33
C32
LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
A16
C18
A19
TVDAC_A
TVDAC_B
TVDAC_C
GMCH_TXCLK+
GMCH_TXCLK-
16 GMCH_TXCLK+
16 GMCH_TXCLK-
GMCH_ENBKL
LCTLA_CLK
LCTLB_DATA
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_ENVDD
LIBG
26 GMCH_ENBKL
16 GMCH_LCD_CLK
16 GMCH_LCD_DATA
16 GMCH_ENVDD
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA
TV_REFSET
1
4.99K_0402_1%
2
R308
GMCH_CRT_CLK
GMCH_CRT_DATA
15 GMCH_CRT_VSYNC
15 GMCH_CRT_HSYNC
15 GMCH_CRT_B
2
R299
2
R302
2
R36
15 GMCH_CRT_G
15 GMCH_CRT_R
1
150_0402_1%
1
150_0402_1%
1
150_0402_1%
1
R298
2
255_0402_1%
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
J29
K30
TV_DCONSEL1
TV_DCONSEL0
C26
C25
DDCCLK
DDCDATA
H23
G23
E23
D23
C22
B22
A21
B21
VSYNC
HSYNC
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
J22
CRT_IREF
CRT
15 GMCH_CRT_CLK
15 GMCH_CRT_DATA
J20
B16
B18
B19
TV
15 GMCH_TV_LUMA
15 GMCH_TV_CRMA
EXP_COMPI
EXP_COMPO
LVDS
GM@
PCI-EXPRESS GRAPHICS
R293
PEGCOMP
D40
D38
+1.5VS_PCIE
R280
24.9_0402_1%
2
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N15
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15
C449
C433
C447
C431
C445
C429
C443
C427
C441
C425
C439
C423
C437
C421
C435
C419
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N15
EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15
C450
C434
C448
C432
C446
C430
C444
C428
C442
C426
C440
C424
C438
C422
C436
C420
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15
CALISTOGA_FCBGA1466~D
PMR3@
Security Classification
2006/10/03
Issued Date
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
Document Number
Rev
0.3
Sheet
of
38
+1.5VS
+3VS_TVBG
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
E19
F19
C20
D20
E20
F20
+3VS_TVDACA
VCCD_HMPLL0
VCCD_HMPLL1
AH1
AH2
+1.5VS
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
A28
B28
C28
VCCD_TVDAC
VCCDQ_TVDAC
D21
H19
C462
0.1U_0402_16V4Z
+3VS
+3VS_TVDACC
+3VS
R307
2
1
0.5_0805_1%
1
R34
2
1
0_0805_5%
1
VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
A23
B23
B25
AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14
+3VS_TVDACC
KC FBM-L11-201209-221LMAT_0805
KC FBM-L11-201209-221LMAT_0805
+1.5VS_3GPLL
+1.5VS_TVDAC
+3VS_VCCHV
1
L36
2
0_0603_5%
+1.5VS
R19
2
R40
1
C40
0.022U_0402_16V7K
1
C492
2
@ 10U_0805_6.3V6M
C84
C83
0.022U_0402_16V7K
10U_0805_6.3V6M
C477
22U_0805_6.3V6M
+1.5VS_MPLL
+1.5VS_HPLL
KC FBM-L11-201209-221LMAT_0805
R322
2
1
+1.5VS
45mA Max.
1
10U_0805_6.3V6M
+1.5VS_DPLLB
KC FBM-L11-201209-221LMAT_0805
R323
2
1
+1.5VS
45mA Max.
C521
KC FBM-L11-201209-221LMAT_0805
40mA Max.
C456
A
10U_0805_6.3V6M
+1.5VS_DPLLA
+1.5VS
KC FBM-L11-201209-221LMAT_0805
R303
2
1
+1.5VS
2006/10/03
GM@
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
40mA Max.
Security Classification
Issued Date
1
+
C522
R279
2
+1.5VS_TVDAC
+1.5VS
+3VS
R18
1
2
0.5_0805_1%
+1.5VS
C41
0.1U_0402_16V4Z
VCCHV0
VCCHV1
VCCHV2
+3VS_TVDACB
CALISTOGA_FCBGA1466~D
PMR3@
C64
0.1U_0402_16V4Z
H20
G20
C57
0.1U_0402_16V4Z
VCCA_TVBG
VSSA_TVBG
C493
2200P_0402_50V7K
+1.5VS_MPLL
C491
2200P_0402_50V7K
AF2
+3VS_TVBG
C600
22U_0805_6.3V6M
VCCA_MPLL
+2.5VS
C494
0.1U_0402_16V4Z
+2.5VS
C481
0.1U_0402_16V4Z
A38
B39
C495
2200P_0402_50V7K
VCCA_LVDS
VSSA_LVDS
C488
2200P_0402_50V7K
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
2 L29
2.2_0603_5%
C599
22U_0805_6.3V6M
B26
C39
AF1
10U_0805_6.3V6M
C484
0.1U_0402_16V4Z
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
220U_D2_4VM
+2.5VS_CRTDAC
C485
2200P_0402_50V7K
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40
E21
F21
G21
22U_0805_6.3V6M
AG14
AF14
AE14
Y14
AF13
AE13
AF12
AE12
AD12
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC2
1 C455 1 C457
+3VS
R35
2
1
0_0805_5%
Title
1
+
C469
330U_D2E_2.5VM_R9
C519
0.47U_0402_6.3V6K
+1.5VS_3GPLL
+2.5VS
C453+
1
+1.5VS
+3VS_TVDACA
0.1U_0402_16V4Z
AC33
G41
H41
R281
0_0805_5%
2
1
+3VS
R304
2
1
0_0805_5%
C472
MCH_AB1
MCH_D2
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG
10U_0805_6.3V6M
+3VS_TVDACB
C517
AB41
AJ41
L41
N41
R41
V41
Y41
0.1U_0402_16V4Z
C518
0.22U_0603_10V7K
C505
0.22U_0603_10V7K
C513
0.47U_0402_6.3V6K
+1.5VS_PCIE
W=40 mils
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
C498
P O W E R
C452
330U_D2E_2.5VM_R9
0.1U_0402_16V4Z
MCH_A6
+2.5VS
C458
0.1U_0402_16V4Z
B30
C30
A30
C515
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
0.1U_0402_16V4Z
C524
2.2U_0805_16V4Z
C507
4.7U_0805_10V4Z
+2.5VS
C476
0.1U_0402_16V4Z
C523
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
VTT52
VTT53
VTT54
VTT55
VTT56
VTT57
VTT58
VTT59
VTT60
VTT61
VTT62
VTT63
VTT64
VTT65
VTT66
VTT67
VTT68
VTT69
VTT70
VTT71
VTT72
VTT73
VTT74
VTT75
VTT76
H22
C463
0.1U_0402_16V4Z
330U_D2E_2.5VM_R9
AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1
VCC_SYNC
C483
0.1U_0402_16V4Z
1
U6H
+VCCP
C461
0.1U_0402_16V4Z
C454
0.1U_0402_16V4Z
+2.5VS
GM@
Size
Document Number
Rev
0.3
Sheet
10
of
38
POWER
GND
U6F
+VCCP
+1.5VS
+VCCP
+1.8V
U6G
C467
1
+
+1.8V
M19
L19
N18
M18
L18
P17
N17
M17
N16
M16
L16
VCC100
VCC101
VCC102
VCC103
VCC104
VCC105
VCC106
VCC107
VCC108
VCC109
VCC110
VCC_SM100
VCC_SM101
VCC_SM102
VCC_SM103
VCC_SM104
VCC_SM105
VCC_SM106
VCC_SM107
AR6
AP6
AN6
AL6
AK6
AJ6
AV1 VCCSM_LF2
AJ1 VCCSM_LF1
CALISTOGA_FCBGA1466~D
PMR3@
C520
0.47U_0402_6.3V6K
C516
0.47U_0402_6.3V6K
VCCSM_LF2
VCCSM_LF1
C39
0.47U_0402_6.3V6K
VCCSM_LF4
VCCSM_LF5
C38
0.47U_0402_6.3V6K
1
C497
C478
0.47U_0402_6.3V6K
C117
C42
1
C501
2
0.1U_0402_16V4Z
C471
0.1U_0402_16V4Z
+1.8V
0.1U_0402_16V4Z
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
C512
AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
P O W E R
VCC_SM0
VCC_SM1
VCC_SM2
VCC_SM3
VCC_SM4
VCC_SM5
VCC_SM6
VCC_SM7
VCC_SM8
VCC_SM9
VCC_SM10
VCC_SM11
VCC_SM12
VCC_SM13
VCC_SM14
VCC_SM15
VCC_SM16
VCC_SM17
VCC_SM18
VCC_SM19
VCC_SM20
VCC_SM21
VCC_SM22
VCC_SM23
VCC_SM24
VCC_SM25
VCC_SM26
VCC_SM27
VCC_SM28
VCC_SM29
VCC_SM30
VCC_SM31
VCC_SM32
VCC_SM33
VCC_SM34
VCC_SM35
VCC_SM36
VCC_SM37
VCC_SM38
VCC_SM39
VCC_SM40
VCC_SM41
VCC_SM42
VCC_SM43
VCC_SM44
VCC_SM45
VCC_SM46
VCC_SM47
VCC_SM48
VCC_SM49
VCC_SM50
VCC_SM51
VCC_SM52
VCC_SM53
VCC_SM54
VCC_SM55
VCC_SM56
VCC_SM57
VCC_SM58
VCC_SM59
VCC_SM60
VCC_SM61
VCC_SM62
VCC_SM63
VCC_SM64
VCC_SM65
VCC_SM66
VCC_SM67
VCC_SM68
VCC_SM69
VCC_SM70
VCC_SM71
VCC_SM72
VCC_SM73
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM77
VCC_SM78
VCC_SM79
VCC_SM80
VCC_SM81
VCC_SM82
VCC_SM83
VCC_SM84
VCC_SM85
VCC_SM86
VCC_SM87
VCC_SM88
VCC_SM89
VCC_SM90
VCC_SM91
VCC_SM92
VCC_SM93
VCC_SM94
VCC_SM95
VCC_SM96
VCC_SM97
VCC_SM98
VCC_SM99
C480
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
0.1U_0402_16V4Z
C460
0.22U_0603_10V7K
C482
0.22U_0603_10V7K
2
AA33
W33
P33
N33
L33
J33
AA32
Y32
W32
V32
P32
N32
M32
L32
J32
AA31
W31
V31
T31
R31
P31
N31
M31
AA30
Y30
W30
V30
U30
T30
R30
P30
N30
M30
L30
AA29
Y29
W29
V29
U29
R29
P29
M29
L29
AB28
AA28
Y28
V28
U28
T28
R28
P28
N28
M28
L28
P27
N27
M27
L27
P26
N26
L26
N25
M25
L25
P24
N24
M24
AB23
AA23
Y23
P23
N23
M23
L23
AC22
AB22
Y22
W22
P22
N22
M22
L22
AC21
AA21
W21
N21
M21
L21
AC20
AB20
Y20
W20
P20
N20
M20
L20
AB19
AA19
Y19
N19
10U_0805_6.3V6M
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15
10U_0805_6.3V6M
330U_D2E_2.5VM_R9
1
C473
330U_D2E_2.5VM_R9
VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
0.47U_0402_6.3V6K
C459
1U_0603_10V4Z
C468
10U_0805_6.3V6M
C487
10U_0805_6.3V6M
C496
0.22U_0603_10V7K
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
P O W E R
U6I
AD27
AC27
AB27
AA27
Y27
W27
V27
U27
T27
R27
AD26
AC26
AB26
AA26
Y26
W26
V26
U26
T26
R26
AD25
AC25
AB25
AA25
Y25
W25
V25
U25
T25
R25
AD24
AC24
AB24
AA24
Y24
W24
V24
U24
T24
R24
AD23
V23
U23
T23
R23
AD22
V22
U22
T22
R22
AD21
V21
U21
T21
R21
AD20
V20
U20
T20
R20
AD19
V19
U19
T19
AD18
AC18
AB18
AA18
Y18
W18
V18
U18
T18
AC41
AA41
W41
T41
P41
M41
J41
F41
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
AN34
AK34
AG34
AF34
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
U6J
P O W E R
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
AN21
AL21
AB21
Y21
P21
K21
J21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
J16
F16
C16
AN15
AM15
AK15
N15
M15
L15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
F13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
Y11
J11
D11
B11
AV10
AP10
AL10
AJ10
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS265
VSS264
VSS263
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
P O W E R
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS292
VSS291
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1
CALISTOGA_FCBGA1466~D
PMR3@
CALISTOGA_FCBGA1466~D
CALISTOGA_FCBGA1466~D
PMR3@
PMR3@
Security Classification
2006/10/03
Issued Date
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21
Title
Size
Document Number
Rev
0.3
Sheet
11
of
38
+1.8V
+1.8V
+DDR_VREF
8 DDR_A_DQS#[0..7]
Layout Note:
Place near JP27
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
+1.8V
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_A_D21
DDR_A_D17
C88
C97
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C73
0.1U_0402_16V4Z
C79
C96
0.1U_0402_16V4Z
C107
2.2U_0805_16V4Z
2.2U_0805_16V4Z
C58
2.2U_0805_16V4Z
C110
2.2U_0805_16V4Z
C62
2.2U_0805_16V4Z
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D22
DDR_A_D19
DDR_A_D25
DDR_A_D24
DDR_A_DM3
DDR_A_D27
DDR_A_D30
7 DDR_CKE0_DIMMA
8
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
DDR_A_BS#2
DDR_CKE0_DIMMA
DDR_A_BS#2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
8
8
+0.9VS
DDR_A_BS#0
DDR_A_WE#
8 DDR_A_CAS#
7 DDR_CS1_DIMMA#
M_ODT1
DDR_A_CAS#
DDR_CS1_DIMMA#
M_ODT1
DDR_A_D35
DDR_A_D32
DDR_A_DQS#4
DDR_A_DQS4
C119
C115
C114
C103
C104
C95
C92
C80
C81
C67
C68
C56
C55
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#
DDR_A_D39
DDR_A_D33
DDR_A_D45
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D52
DDR_A_D53
+0.9VS
DDR_A_MA8
DDR_A_MA5
RP10
1
2
RP2
DDR_A_MA1
DDR_A_MA3
56_0404_4P2R_5%
1 DDR_A_MA7
2 DDR_A_MA6
56_0404_4P2R_5%
1 DDR_A_MA9
2 DDR_A_MA12
4
3
4
3
DDR_A_BS#0
DDR_A_MA10
DDR_A_CAS#
DDR_A_WE#
Layout Note:
Pla ce these resistor
closely JP27,all
trace length Max=1.5"
56_0404_4P2R_5%
1 DDR_A_BS#2
2 DDR_CKE0_DIMMA
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D51
DDR_A_D55
DDR_A_D56
DDR_A_D61
DDR_A_DM7
DDR_A_D58
DDR_A_D59
13,14 CLK_SMBDATA
13,14 CLK_SMBCLK
+3VS
C133
CLK_SMBDATA
CLK_SMBCLK
0.1U_0402_16V4Z
56_0404_4P2R_5%
1 DDR_CKE1_DIMMA
2 DDR_A_MA11
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
2006/10/03
DDR_A_D12
DDR_A_D13
R427
1K_0402_1%
D
+DDR_VREF
15mils
DDR_A_DM1
M_CLK_DDR0
M_CLK_DDR#0
R428
1K_0402_1%
M_CLK_DDR0 7
M_CLK_DDR#0 7
DDR_A_D9
DDR_A_D15
DDR_A_D20
DDR_A_D16
DDR_TS
DDR_A_DM2
DDR_TS 7,13
DDR_A_D18
DDR_A_D23
DDR_A_D29
DDR_A_D28
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D26
DDR_A_D31
DDR_CKE1_DIMMA
DDR_CKE1_DIMMA 7
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#
DDR_A_BS#1 8
DDR_A_RAS# 8
DDR_CS0_DIMMA# 7
M_ODT0
DDR_A_MA13
M_ODT0
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D34
DDR_A_D38
DDR_A_D40
DDR_A_D44
B
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D47
DDR_A_D46
DDR_A_D48
DDR_A_D49
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR1 7
M_CLK_DDR#1 7
DDR_A_DM6
DDR_A_D50
DDR_A_D54
DDR_A_D60
DDR_A_D57
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
PTI_A5652D-A0G16-P
A
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
+1.8V
DDR_A_D5
DDR_A_D6
DDR_A_DM0
Security Classification
Issued Date
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
DDR_A_D7
DDR_A_D1
DDR_A_D8
DDR_A_D14
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDR_A_D2
DDR_A_D3
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
C35
DDR_A_DQS#0
DDR_A_DQS0
8 DDR_A_MA[0..13]
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
C36
DDR_A_D0
DDR_A_D4
8 DDR_A_DQS[0..7]
0.1U_0402_16V4Z
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2.2U_0805_16V4Z
JP15
8 DDR_A_D[0..63]
8 DDR_A_DM[0..7]
Title
Size
Document Number
Rev
0.3
Sheet
1
12
of
38
+1.8V
8 DDR_B_DQS#[0..7]
+1.8V
+DDR_VREF
8 DDR_B_D[0..63]
8 DDR_B_DM[0..7]
JP16
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
220U_D2_4VM
C70
C99
0.1U_0402_16V4Z
C89
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C74
0.1U_0402_16V4Z
C109
C90
2.2U_0805_16V4Z
2.2U_0805_16V4Z
C60
2.2U_0805_16V4Z
C113
C59
2.2U_0805_16V4Z
2.2U_0805_16V4Z
1
+ C126
2
220U_D2_4VM
+1.8V
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_B_D21
DDR_B_D17
1
+ C43
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D30
DDR_B_D31
7 DDR_CKE2_DIMMB
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
DDR_B_BS#2
DDR_CKE2_DIMMB
DDR_B_BS#2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
+0.9VS
DDR_B_BS#0
DDR_B_WE#
8 DDR_B_CAS#
7 DDR_CS3_DIMMB#
1
M_ODT3
DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#
DDR_B_CAS#
DDR_CS3_DIMMB#
M_ODT3
DDR_B_D37
DDR_B_D36
2
C118
C112
C105
C94
C78
C66
C54
C111
C101
C91
C77
C65
C53
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
8
8
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D35
DDR_B_D34
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D47
+0.9VS
DDR_B_MA1
DDR_B_MA3
RP13
1
2
RP4
DDR_B_MA10
DDR_B_BS#0
56_0404_4P2R_5%
DDR_CKE3_DIMMB
1
DDR_B_MA11
2
DDR_B_MA0
DDR_B_BS#1
56_0404_4P2R_5%
DDR_B_MA5
1
DDR_B_MA8
2
56_0404_4P2R_5%
DDR_B_MA7
1
DDR_B_MA6
2
4
3
4
3
56_0404_4P2R_5%
DDR_B_MA9
1
DDR_B_MA12
2
DDR_B_D48
DDR_B_D53
Layout Note:
Pla ce these resistor
closely JP26,all
trace length Max=1.5"
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D51
DDR_B_D50
DDR_B_D60
DDR_B_D61
DDR_B_DM7
DDR_B_D58
DDR_B_D59
12,14 CLK_SMBDATA
12,14 CLK_SMBCLK
CLK_SMBDATA
CLK_SMBCLK
+3VS
DDR_B_WE#
DDR_B_CAS#
A
56_0404_4P2R_5% RP1
4
3
1
2
C132
0.1U_0402_16V4Z
DDR_B_BS#2
DDR_CKE2_DIMMB
2006/10/03
Issued Date
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDR_B_D4
DDR_B_D1
DDR_B_DM0
DDR_B_D6
DDR_B_D2
DDR_B_DM1
M_CLK_DDR3
M_CLK_DDR#3
M_CLK_DDR3 7
M_CLK_DDR#3 7
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D20
DDR_TS
DDR_B_DM2
DDR_TS 7,12
DDR_B_D18
DDR_B_D19
DDR_B_D26
DDR_B_D28
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D29
DDR_B_D27
C
DDR_CKE3_DIMMB
DDR_CKE3_DIMMB 7
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_BS#1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
DDR_B_MA13
DDR_B_BS#1 8
DDR_B_RAS# 8
DDR_CS2_DIMMB# 7
M_ODT2
DDR_B_D33
DDR_B_D32
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D43
DDR_B_D46
DDR_B_D49
DDR_B_D52
M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR2 7
M_CLK_DDR#2 7
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
+3VS
A
P-TWO_A5692B-A0G16-P
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
DDR_B_D12
DDR_B_D13
Security Classification
56_0404_4P2R_5%
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
C34
DDR_B_D7
DDR_B_D3
Layout Note:
Place near JP26
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
C37
DDR_B_DQS#0
DDR_B_DQS0
D
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
0.1U_0402_16V4Z
DDR_B_D0
DDR_B_D5
8 DDR_B_MA[0..13]
2.2U_0805_16V4Z
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
8 DDR_B_DQS[0..7]
Title
Size
Document Number
Rev
0.3
Sheet
13
of
38
+CK_VDD_MAIN1
+3VS
+3VS
R129
1
FSLA
CLKSEL2
CLKSEL1
C227
10U_0805_10V4Z
C166
0.1U_0402_16V4Z
C219
0.1U_0402_16V4Z
CLKSEL0
CPU
MHz
SRC
MHz
PCI
MHz
133
100
33.3
166
100
33.3
0.1U_0402_16V4Z
C157
10U_0805_10V4Z
C234
0.1U_0402_16V4Z
0.1U_0402_16V4Z
MCH_CLKSEL0 7
2 R136
1
@ 1K_0402_5%
0.1U_0402_16V4Z
C167 1
2
Y2
22P_0402_50V8J
C168 1
2
R331
@
18 CLK_48M_ICH
1K_0402_5%
1
FSB
5
20
18
CLK_48M_ICH
CLK_48M_CB
CLK_14M_ICH
CLK_14M_ICH
26 CLK_PCI_EC
29 CLK_PCI_SIO2
R108
2
2
1 R132
12_0402_5%
1 R124
12_0402_5%
7 CLK_MCH_DREFCLK#
+3VS
30
36
VDDPCI
VDDPCI
12
VDDCPU
40
20
X2
USB_48MHz/FSLA
FSB
45
FSLB/TEST_MODE/24Mhz
SRCCLKT9LP
PCI_DEBUG 32
SEL_24M/PCICLK2
SRCCLKC8LP
69
27
SEL_PCI6/PCICLK1
CLKREQ8#
71
22
SEL_PCI5/REF1
PCI_ICH
33_0402_5%
37
39
R81
2.2K_0402_5%
2
G
1:48M *0:CLKREQ7#
for Pin 38
R327 1
16
R80
2.2K_0402_5%
2
G
S
3 Q9
2N7002_SOT23
17
SRCCLKT7LP
66
67
DOTT_96MHz/27MHz_Nonspread
CLKREQ7#/48Mhz_1
38
DOTC_96MHz/27MHz_spread
63
SRCCLKC6LP
64
CLKREQ6#
62
SRCCLKT5LP
60
ITP_EN/PCICLK_F0
VTT_PWRGD#/PD
REF1
CLK_PCIE_SATA 17
CLK_PCIE_SATA# 17
SATA_CLKREQ#
SATA_CLKREQ# 18
CLK_MCH_3GPLL 7
SRCCLKC5LP
61
CLKREQ5#/PCICLK6
29
SRCCLKT4LP
58
SRCCLKC4LP
59
CLKREQ4#
57
SRCCLKT3LP
55
CLK_PCIE_ICH 18
CLK_PCIE_ICH# 18
GND
SMBCLK
SMBDAT
CLK_MCH_3GPLL# 7
MCH_CLKREQ#
MCH_CLKREQ# 7
CLK_PCIE_MCARD 25
CLK_PCIE_MCARD# 25
MINI_CLKREQ#
MINI_CLKREQ# 25
GNDSRC
SRCCLKC3LP
56
15
GNDCPU
CLKREQ3#/PCICLK5
28
21
GNDREF
SRCCLKT2LP
52
CLK_PCIE_LAN 22
31
GNDPCI
SRCCLKC2LP
53
CLK_PCIE_LAN# 22
35
GNDPCI
CLKREQ2#
26
42
GND48
SRCCLKT1LP
50
68
GNDSRC
SRCCLKC1LP
51
CLKREQ1#
46
LCD100/96/SRC0_TLP
47
CLK_PCIE_GMCH 7
LCD100/96/SRC0_CLP
48
CLK_PCIE_GMCH# 7
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
CLK_PCIE_VGA 16
CLK_PCIE_VGA# 16
2
10K_0402_5%
R100 1
2
10K_0402_5%
ICS9LPRS325CKLFT_MLF72
Security Classification
2006/10/03
Issued Date
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
PCIEC_CLKREQ#
73
74
75
76
2
10K_0402_5%
SRCCLKC7LP
PCI_EC
*1:PCICLK3 0:CLKREQ5#
for Pin28
5
3
70
SRCCLKT6LP
SRCCLKT8LP
3 Q10
2N7002_SOT23
D
A
CLK_CPU_BCLK# 4
SEL_48M/PCICLK3
CLK_SMBDATA
CLK_CPU_BCLK 4
13
33
PCI_DEBUG
18,25 ICH_SMBDATA
CPUCLKT0LP
CPUCLKC0LP
PCI_EC
PCI_ICH
2
10K_0402_5%
CLK_MCH_BCLK# 7
14
72
12,13 CLK_SMBDATA
R116 1
CLK_MCH_BCLK 7
10
SRCCLKC9LP
CLK_SMBCLK
+3VS
CPUCLKT1LP
CPUCLKC1LP
REF0/FSLC/TEST_SEL
2
10K_0402_5%
H_STP_CPU# 18
11
CLKREQ9#
12,13 CLK_SMBCLK
R337 1
H_STP_PCI# 18
PCICLK4/FCTSEL1
25
34
+3VS
0.1U_0402_16V4Z
+3VS
24
PCI_PCM
2
R336
R82
+VDDAD
2
1
KC FBM-L11-201209-221LMAT_0805
CPU_STOP#
CPUCLKC2_ITP/SRCCLKC10LP
VGATE
C230
0.1U_0402_16V4Z
2
PCI_SRC_STOP#
2
1 R119
33_0402_5%
2
1 R121
39_0402_5%
2
1 R506
39_0402_5%
23
18,25 ICH_SMBCLK
GNDA
CPUCLKT2_ITP/SRCCLKT10LP
MCH_DREFCLK 43
1
2
R125 GM@
33_0402_5%
CLK_MCH_DREFCLK# 1
MCH_DREFCLK# 44
2
R126 GM@
33_0402_5%
+3VS
7
8
X1
41
2
1
2
G
Q16
2N7002_SOT23 @
VDD48
CLK_ENABLE#
18,26,36
VDDA
VDDREF
19
CLK_ENABLE#
36 CLK_ENABLE#
10K_0402_5%
R332
VDDSRC
VDDSRC
VDDSRC
VDDSRC
CLK_MCH_DREFCLK
CLK_PCI_ICH
18 CLK_PCI_ICH
B
1
49
54
65
FSA
REF1
7 CLK_MCH_DREFCLK
C170
1
FSC
MCH_CLKSEL2 7
R102
1K_0402_5%
CPU_BSEL2
0.1U_0402_16V4Z
2 +CK_VDD_48
R128
2.2_0805_1%
2
1 R99
39_0402_5%
R103
@ 1K_0402_5%
8.2K_0402_5%
2
1
1
2
FSC
5
14.31818MHZ_20P_6X1430004201
CLK_XTAL_OUT
20 CLK_PCI_PCM
+VCCP
FSC
(Fixed at low)
C231
+CK_VDD_REF 18
+CK_VDD_48
C229
0.1U_0402_16V4Z
CLK_XTAL_IN
MCH_CLKSEL1 7
R328
1K_0402_5%
CPU_BSEL1
CLK_48M_CB
C197
22P_0402_50V8J
+VCCP
FSB
0.1U_0402_16V4Z
+CK_VDD_REF
U9
R137
1K_0402_5%
CPU_BSEL0
C213
C160
+CK_VDD_MAIN1
2
10U_0805_10V4Z
R86
1
2
1_0805_1%
FSA
1
1
KC FBM-L11-201209-221LMAT_0805 C165
C226
+CK_VDD_DP
FSA
2
1
R133 8.2K_0402_5%
+CK_VDD_MAIN2
R79
1
KC FBM-L11-201209-221LMAT_0805
FSLB
+3VS
FSLC
R127
1
+3VS
KC FBM-L11-201209-221LMAT_0805
2
1 PCIEC_CLKREQ#
10K_0402_5% R92
2
1 SATA_CLKREQ#
10K_0402_5% R333
2
1 MCH_CLKREQ#
10K_0402_5% R106
2
1 MINI_CLKREQ#
10K_0402_5% R118
+CK_VDD_DP
Title
Size
Document Number
Rev
0.3
Sheet
14
of
38
Near to JP13
CRT CONNECTOR
D24
D23
0.1U_0402_16V4Z
L2
1
2
BK1608LL121-T_0603
2
PM@ 0_0402_5%
2
GM@ 0_0402_5%
CRT_B
L1
1
2
BK1608LL121-T_0603
JP13
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
CRT_R_L
C16
2
GM@
C19
GM@
C21
C12
C22
GM@
C20
GM@
C17
GM@
SUYIN _070546FR015S233CR
DSUB_12_DATA
220P_0402_50V7K
DSUB_15_CLK
GM@
+CRT_VCC
2
D_CRT_HSYNC
U2
SN74AHCT1G125GW_SOT353-5
D_CRT_VSYNC
+CRT_VCC
9 GMCH_CRT_VSYNC
GM@
CRT_VSYNC
0_0402_5%
P
OE#
2
0.1U_0402_16V4Z
PM@
39_0402_5%
1
L25
HSYNC
VSYNC
2
10_0402_5%
1
2
Y
10_0402_5%
C413
1
R29
1
R31
16 VGA_CRT_VSYNC
5
1
C15
1
L26
C411
+CRT_VCC
U1
SN74AHCT1G125GW_SOT353-5
+3VS
2
R266
GM@
1
0_0402_5%
9 GMCH_CRT_DATA
1
10K_0402_5%
C8
10P_0402_50V8J
5
1
P
OE#
CRT_HSYNC
2
PM@ 0_0402_5%
2
GM@ 39_0402_5%
2
R4
10P_0402_50V8J
9 GMCH_CRT_HSYNC
1
R30
1
R32
16 VGA_CRT_HSYNC
2
0.1U_0402_16V4Z
16
17
R1
4.7K_0402_5%
2
R267
PM@
1
0_0402_5%
2
R268
DSUB_12_DATA
Q26
2N7002_SOT23
DSUB_15_CLK
1
D
1
0_0402_5%
9 GMCH_CRT_CLK
3
S
GM@
1
D
2
R265
1
0_0402_5%
16 VGA_DDC_CLK
R2
4.7K_0402_5%
2
PM@
16 VGA_DDC_DATA
R3
R5
CRT_B_L
C14
C18
R6
CRT Conn.
68P_0402_50V8K
DAN217_SC59
@
68P_0402_50V8K
R274
CRT_G
CH491D_SC59
1
1A_6VDC_MINISMDC110 C13
6P_0402_50V8K
9 GMCH_CRT_B
2
PM@ 0_0402_5%
2
GM@ 0_0402_5%
CRT_G_L
6P_0402_50V8K
R273
R276
16 VGA_CRT_B
CRT_R
6P_0402_50V8K
9 GMCH_CRT_G
2
PM@ 0_0402_5%
2
GM@ 0_0402_5%
6P_0402_50V8K
R275
6P_0402_50V8K
16 VGA_CRT_G
6P_0402_50V8K
R278
2
1
150_0402_1%
R277
9 GMCH_CRT_R
2
1
150_0402_1%
16 VGA_CRT_R
L3
1
2
BK1608LL121-T_0603
2
1
150_0402_1%
DAN217_SC59
@
+CRT_VCC
F1
2
+3VS
DAN217_SC59
@
+R_CRT_VCC
D3
+5VS
D25
Q27
2N7002_SOT23
D9
@ DAN217_SC59
D10
@ DAN217_SC59
+3VS
1
16 VGA_TV_CRMA
9 GMCH_TV_CRMA
1
R42
1
R43
2
PM@
2
GM@
1
R38
1
R39
2
PM@
2
GM@
0_0402_5%
TV_LUMA
L15 1
2
FBM-11-160808-121T_0603
TV_CRMA
L14 1
2
FBM-11-160808-121T_0603
0_0402_5%
0_0402_5%
0_0402_5%
JP17
9 GMCH_TV_LUMA
16 VGA_TV_LUMA
2 C145
@ 22P_0402_50V8J
R77
150_0402_1%
1
C131
100P_0402_50V8J
R71
150_0402_1%
C143
100P_0402_50V8J
2 C142
@ 22P_0402_50V8J
1
TV_CRMA_L
TV_LUMA_L
1
C141
C153
2
100P_0402_50V8J
2
100P_0402_50V8J
4
3
2
1
6
5
ALLTO_C10877-104A1-L_4P
TV-OUT Conn.
1.
2.
3.
4.
Y
C
Y
C
ground
ground
(luminance+sync)
(crominance)
2006/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Security Classification
Issued Date
4
3
2
1
Title
Document Number
Rev
0.3
Sheet
15
of
38
+LCDVDD
2
1
3
3
C418
1
C414
W=60mils
C416
0.1U_0402_16V4Z
1
JP14
TXOUT1+
TXOUT1-
15 VGA_TV_CRMA
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
DISPOFF#
0.1U_0603_25V7K
BKOFF#
INVPWR_B+
4.7K_0402_5%
1 C417 +LCDVDD_LCD
0.1U_0402_16V4Z
+3VS_LCD
1 C415
0.1U_0402_16V4Z
VGA_TV_CRMA
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
R262
26
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
TXCLK+
TXCLK-
+3VS
D26
RB751V_SOD323
PCIE_GTX_C_MRX_P[0..15]
9 PCIE_GTX_C_MRX_P[0..15]
+LCDVDD
AOS 3401_SOT23
2.2K_0402_5%
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
9 PCIE_GTX_C_MRX_N[0..15]
1000P_0402_50V7K
BSS138_SOT23
VGA_ENVDD 2
G
Q30
R289
2
GM@
Q28
100K_0402_5%
S
D
R264 1
0_0402_5%
9 PCIE_MTX_C_GRX_P[0..15]
4.7U_0805_10V4Z
1
1 2
2
G
PCIE_MTX_C_GRX_N[0..15]
9 PCIE_MTX_C_GRX_N[0..15]
W=60mils
Q29
2N7002_SOT23
C23
B+
L4
KC FBM-L11-201209-221LMAT_0805
C24
68P_0402_50V8K
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
JP1
+3VS_LCD
2 R271
FBMA-L11-201209-121LMT 0805
26
26
DAC_BRIG
INVT_PWM
LCD_CLK
LCD_DATA
DAC_BRIG
INVT_PWM
DISPOFF#
INVPWR_B+
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
TXCLKTXCLK+
LCD_DATA
DAC_BRIG
TXOUT0TXOUT0+
TXOUT2TXOUT2+
1
C667
2
TXOUT1TXOUT1+
1
C668
2
6P_0402_50V8K
+3VS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
LCD_CLK
6P_0402_50V8K
+LCDVDD
+LCDVDD_LCD
1 R270
FBMA-L11-321611-121LMA30T_1206
INVT_PWM
DISPOFF#
1
C805
1
C806
1
C807
1
C808
1
C809
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
2
@ 47P_0402_50V8J
2
@ 47P_0402_50V8J
2
@ 220P_0402_50V7K
2
@ 220P_0402_50V7K
2
@ 220P_0402_50V7K
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
INVPWR_B+
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
ACES_88242-3000
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
+3VALW
12
13
15 VGA_CRT_VSYNC
U24D
15 VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_CRT_HSYNC
14
11
PLTRSTR#
15 VGA_CRT_B
7,18,22,25 PLT_RST#
+3VS
R269
9 GMCH_ENVDD
R272
1M_0402_5%
R263
470_0805_5%
+5VALW
15 VGA_CRT_G
15 VGA_CRT_R
VGA_CRT_B
VGA_CRT_G
VGA_CRT_R
SN74LVC32APWLE_TSSOP14
+1.8VS
B+
I = 1.5 A (Max)
+B_L
1
2
PM@ L28
FBM-L11-201209-121LMT_0805
1
2
PM@ L27
FBM-L11-201209-121LMT_0805
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
TXOUT2+
TXOUT2TXOUT0+
TXOUT0VGA_TV_LUMA
VGA_TV_LUMA 15
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
C
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
CLK_PCIE_VGA
CLK_PCIE_VGA#
R542
R543
1
1
CLK_PCIE_VGA 14
CLK_PCIE_VGA# 14
VGA_LCD_DATA
VGA_LCD_CLK
VGA_ENVDD
VGA_DDC_CLK
VGA_DDC_CLK 15
VGA_DDC_DATA
VGA_DDC_DATA 15
VGA_ENBKL
VGA_ENBKL 26
SUSP#
SUSP# 23,26,27,29,34,35
PLTRSTR#
2 PM@ 0_0402_5%
EC_SMB_CK2 4,26
2 PM@ 0_0402_5%
EC_SMB_DA2 4,26
+5VALW
+1.8VS
+1.5VS
I = 600mA
+2.5VS
+3VS
I = 460mA
PM@ ACES_88081-1600
LCD_CLK
LCD_DATA
R608
R609
R7
R8
2
2
2
2
1PM@
1PM@
1GM@
1GM@
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
VGA_LCD_CLK
VGA_LCD_DATA
TXOUT0TXOUT0+
R12
R13
1
1
2GM@ 0_0402_5%
2GM@ 0_0402_5%
GMCH_TXOUT0- 9
GMCH_TXOUT0+ 9
TXOUT1TXOUT1+
R23
R22
1
1
2GM@ 0_0402_5%
2GM@ 0_0402_5%
GMCH_TXOUT1- 9
GMCH_TXOUT1+ 9
TXOUT2TXOUT2+
R25
R24
1
1
2GM@ 0_0402_5%
2GM@ 0_0402_5%
GMCH_TXOUT2- 9
GMCH_TXOUT2+ 9
TXCLKTXCLK+
R21
R20
1
1
2GM@ 0_0402_5%
2GM@ 0_0402_5%
GMCH_TXCLK- 9
GMCH_TXCLK+ 9
GMCH_LCD_CLK 9
GMCH_LCD_DATA 9
2006/10/03
Issued Date
Security Classification
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Document Number
Rev
0.3
Sheet
16
of
38
JP9
NC
IN
R180
NC
OUT
10M_0402_5%
ICH_RTCRST# AA3
2
R168
J1
1
@
1
2
1M_0402_5%
+RTCVCC
ICH_INTVRMEN W4
SM_INTRUDER# Y5
2 L41
1
0_0402_5%
25 ACZ_BITCLK_MDC
BITCLK_MDC 1
2 R189
47_0402_5%
2
1
22P_0402_50V8J C589
2
1
22P_0402_50V8J C590
2 L42
23 ICH_SYNC_AUDIO
33_0402_5% 2
1 R201
25 ACZ_RST#_MDC
33_0402_5% 1
23 ICH_RST_AUDIO#
33_0402_5% 2
25 ACZ_SYNC_MDC
BITCLK_AUDIO1
2 R202
LAN_CLK
U3
LAN_RSTSYNC
U5
V4
T5
LAN_RXD0
LAN_RXD1
LAN_RXD2
2 R211
ACZ_BCLK
ACZ_SYNC
1 R210
ACZ_RST#
R5
ACZ_RST#
ACZ_SDIN0
ACZ_SDIN1
T2
T3
T1
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
33_0402_5% 2
33_0402_5% 2
2
+3VS
PHDD_LED#
1 R197
1 R198
1 R348
20K_0402_5%
ACZ_SDOUT
PHDD_LED#
R152
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA_RXN1_C
SATA_RXP1_C
SATA_TXN1_C
SATA_TXP1_C
AF7
AE7
AG6
AH6
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
R148
2
LPC_FRAME#
A20GATE
A20M#
AE22
AH28
CPUSLP#
AF24
AH25
H_DPSLP#
4.7K_0402_5% 2
8.2K_0402_5% 2
+3VS
R150
1 R166
1 R165
H_FERR#
AG24
H_PW RGOOD
IGNNE#
INIT3_3V#
INIT#
INTR
AG22
AG21
AF22
AF25
H_IGNNE#
AG16
AH16
AF16
AH15
AF15
IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#
C609
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
1 R349 10K_0402_5%
GATEA20 26
H_A20M# 4
1 56_0402_5%
H_FERR# 4
H_INIT#
H_INTR
RCIN#
AG23
SMI#
NMI
AF23
AH24
H_SMI#
H_NMI
+3VS
+5VS
STPCLK#
AH22
H_STPCLK#
THERMTRIP#
AF26
THRMTRIP_ICH#
H_DPRSTP# 4,36
H_DPSLP# 4
+VCCP
DCS1#
DCS3#
AE16
AD16
PD_CS#1
PD_CS#3
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
PD_D0
PD_D1
PD_D2
PD_D3
PD_D4
PD_D5
PD_D6
PD_D7
PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15
DDREQ
AE15
PD_DREQ
C274
C266
10U_0805_10V4Z
2
+5VS
C267
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
SUYIN_127072FR022G210ZR_RV
C268
0.1U_0402_16V4Z
2
2
4
4
0.1U_0402_16V4Z
+3VS +VCCP
H_STPCLK# 4
R160
4
4
JP31
56_0402_5%
1 R159
2
24.9_0402_1%
SATA_TXP1_C
2
3900P_0402_50V7K
SATA_TXN1_C
2
3900P_0402_50V7K
SATA_RXN1_C
2
3900P_0402_50V7K
SATA_RXP1_C
2
3900P_0402_50V7K
H_THERMTRIP# 4,7
PD_A0
PD_A1
PD_A2
C611
0.1U_0402_16V4Z
1 10K_0402_5%
EC_KBRST# 26
H_SMI#
H_NMI
AH17
AE17
AF17
C610
GND
A+
AGND
BB+
GND
H_IGNNE# 4
H_INIT#
H_INTR
DA0
DA1
DA2
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
H_PWRGOOD 4
R345 2
EC_KBRST#
IDE
SATA_TXP0
SATA_TXN0
SATA_RXN0
SATA_RXP0
+3VS
1
C712
1
C713
1
C714
1
C715
2HDD@
1
2
3
4
5
6
7
SATA_TXP1
SATA_TXN1
2HDD@
SATA_RXN1
SATA_RXP1
2HDD@
2HDD@
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3VS
1
1
C716
C717
2HDD@
10U_0805_10V4Z 2HDD@
2
2
0.1U_0402_16V4Z
+5VS
1
C718
C719
2HDD@
0.1U_0402_16V4Z2HDD@
2
2
0.1U_0402_16V4Z
+5VS
C720
1
C722
C723
2HDD@
2HDD@
0.1U_0402_16V4Z
2
2
C721
10U_0805_10V4Z
2HDD@
2 2HDD@
2
0.1U_0402_16V4Z
2HDD@
C
GND
A+
AGND
BB+
GND
VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
VCC12
VCC12
SUYIN_127043FB022G208ZR_22P_RV
0.1U_0402_16V4Z
B
@ 0_0402_5%
PD _IORDY
PD_IRQ
PD_DACK#
PD_IOW#
PD_IOR#
C608
1
R158 2
AG26
SATARBIASN
SATARBIASP
1
2
3
4
5
6
7
LPC_FRAME# 26,29
2
FERR#
AH10
AG10
LPC_DRQ#1 29
GATEA20
H_A20M#
TP1 / DPRSTP#
TP2 / DPSLP#
24.9_0402_1%
26,29
26,29
26,29
26,29
10U_0805_10V4Z
AG27
SATA_CLKN
SATA_CLKP
ICH_INTVRMEN
AB3
SATALED#
AF3
AE3
AG2
AH2
332K_0402_1%
LPC_DRQ#1
LFRAME#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
GPIO49 / CPUPWRGD
ACZ_SDOUT
SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C
CLK_PCIE_SATA# AF1
CLK_PCIE_SATA AE1
14 CLK_PCIE_SATA#
14 CLK_PCIE_SATA
AF18
LDRQ0#
LDRQ1# / GPIO23
AC3
AA5
SATA
+RTCVCC
T4
AA6
AB5
AC4
Y6
LAN_TXD0
LAN_TXD1
LAN_TXD2
U1
R6
23 ICH_SDOUT_AUDIO
25 ACZ_SDOUT_MDC
26
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
ACZ_BITCLK
ACZ _SYNC
23 ICH_AC_SDIN0
25 ACZ_SDIN1
INTVRMEN
INTRUDER#
V3
U7
V6
V7
2 R183
47_0402_5%
RTCRST#
1
C264
1
C272
1
C242
1
C244
+3VS
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LAD0
LAD1
LAD2
LAD3
AC-97/AZALIA
1
0_0402_5%
33_0402_5% 1
RTXC1
RTCX2
LAN
W1
Y1
Y2
W3
JUMP_43X79
C246
1U_0402_6.3V4Z
1
2
23 ICH_BITCLK_AUDIO
AB1
AB2
R149 1
20K_0402_5%
+RTCVCC
ICH_RTCX2
1 15P_0402_50V8J
RTC
C287
+3VS
U16A
32.768KHZ_12.5P_1TJS125BJ2A251
ICH_RTCX1
LPC
Y4
CPU
C298
2
3900P_0402_50V7K
SATA_TXN0_C
2
3900P_0402_50V7K
SATA_RXN0_C
2
3900P_0402_50V7K
SATA_RXP0_C
2
3900P_0402_50V7K
ICH7_BGA652~D
ICH7R3@
ODD CONN
JP19
RTC Battery
Layout Note:
1. Under BATT1 battery Body, no Trace no Via
2. BATT1 + - PIN keep out 80mil from other component ,trace and via
18
+RTCBATT
PD_D7
PD_D6
PD_D5
PD_D4
PD_D3
PD_D2
PD_D1
PD_D0
+5VS
1
C549
BATT1
ODD_RST#
10U_0805_10V4Z
2
1
C159
1
C155
1
C158
0.1U_0402_16V4Z
2
PD_IOW#
PD _IORDY
PD_IRQ
PD_A1
PD_A0
PD_CS#1
+RTCBATT
0.1U_0402_16V4Z
0.1U_0402_16V4Z
45@ RTCBATT
D11
A
R87
2
1
100K_0402_5% +5VS
+5VS
BAS40-04_SOT23
2
SEC_CSEL
470_0402_5%
Security Classification
C223
0.1U_0402_16V4Z
2006/10/03
Issued Date
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
54
PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15
PD_DREQ
PD_IOR#
1
R110
2
@ 0_0603_5%
PD_DACK#
PDIAG#
R83
PD_A2
PD_CS#3
W=80mils
2
100K_0402_5%
+5VS
+5VS
+5VS
+5VS
C156 0.1U_0402_16V4Z
OCTEK_CDR-50JD1
+CHGRTC
R78
+RTCVCC
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
53
Title
Size
Document Number
Rev
0.3
Sheet
1
17
of
38
+3VALW
AF19
AH18
AH19
AE19
R145
R163
R162
R144
CLK14
CLK48
AC1
B2
CLK_14M_ICH
CLK_48M_ICH
SUSCLK
C20
SLP_S3#
SLP_S4#
SLP_S5#
B24
D23
F22
PM_SLP_S3#
SLP_S4#
SLP_S5#
PWROK
AA4
PWROK
AC22
DPRSLPVR
GPIO21 / SATA0GP
GPIO19 / SATA1GP
GPIO36 / SATA2GP
GPIO37 / SATA3GP
1
1
1
1
2
2
2
2
GPIO0 / BM_BUSY#
B23
H_STP_PCI#
H_STP_CPU#
GPIO18 / STPPCI#
GPIO20 / STPCPU#
A21
27 SB_INT_FLASH_SEL#
PM_CLKRUN#
GPIO27
GPIO28
AG18
GPIO32 / CLKRUN#
25 MDC_RST#
17 ODD_RST#
AC19
U2
GPIO33 / AZ_DOCK_EN#
GPIO34 / AZ_DOCK_RST#
26
SIRQ
EC_THERM#
F20
AH21
AF20
WAKE#
SERIRQ
THRM#
VGATE
AD22
VRMPWRGD
EC_SWI#
20,26,29
SIRQ
26 EC_THERM#
14,26,36
GPIO26
B21
E23
VGATE
26
EC_SMI#
EC_SMI#
AC21
AC18
E21
GPIO
GPIO6
GPIO7
GPIO8
GPIO16 / DPRSLPVR
TP0 / BATLOW#
C21
PWRBTN#
C23
LAN_RST#
C19
RSMRST#
Y4
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35 / SATAREQ#
GPIO38
GPIO39
PM_SLP_S3# 26
DBRESET#
R351
ICH_LOW_BAT#
PWROK
2
10K_0402_5%
7,26
PBTN_OUT# 26
E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20
EC_SCI#
1K_0402_5%
2
1 R606
2HDD@
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3
0.1U_0402_16V7K
0.1U_0402_16V7K
PERn3
PERp3
PETn3
PETp3
M26
M25
L28
L27
PERn4
PERp4
PETn4
PETp4
P26
P25
N28
N27
PERn5
PERp5
PETn5
PETp5
T25
T24
R28
R27
PERn6
PERp6
PETn6
PETp6
SPI_CS#
R2
P6
P1
SPI_CLK
SPI_CS#
SPI_ARB
SPI_MOSI
SPI_MISO
P5
P2
SPI_MOSI
SPI_MISO
D3
C4
D5
D4
E5
C3
A2
B3
OC0#
OC1#
OC2#
OC3#
OC4#
OC5# / GPIO29
OC6# / GPIO30
OC7# / GPIO31
10K_0402_5%
2
1 R610
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
SPI
+3VALW
K26
K25
J28
J27
USB
22
22
22
22
PERn2
PERp2
PETn2
PETp2
PCI-EXPRESS
0.1U_0402_16V7K
0.1U_0402_16V7K
H26
H25
G28
G27
V26
V25
U28
U27
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
Y26
Y25
W28
W27
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
AB26
AB25
AA28
AA27
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
AD25
AD24
AC28
AC27
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
DMI_CLKN
DMI_CLKP
AE28
AE27
CLK_PCIE_ICH#
CLK_PCIE_ICH
C25
D25
DMI_IRCOMP
DMI_ZCOMP
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBRBIAS#
USBRBIAS
ICH7_BGA652~D
F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3
D2
D1
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USBRBIAS
10K_0402_5% @
2
1 R200
EC_SWI#
1K_0402_5%
2
1 R231
CLK_PCI_ICH
R223
@ 10_0402_5%
C365
@15P_0402_50V8J
+3VS
R496 1
2
8.2K_0402_5%
R497 1
2
8.2K_0402_5%
R493 1
2
8.2K_0402_5%
8.2K_0804_8P4R_5%
RP38
PCI_PIRQG#
1
8
PCI_PLOCK#
2
7
PCI_REQ0#
3
6
PCI_REQ5#
4
5
100K_0402_5%
2HDD_DET# 1
2 R607
ICH_GPIO48
PCI_REQ4#
PCI_REQ1#
8.2K_0804_8P4R_5%
PM_SLP_S5# 26
20 PCI_AD[0..31]
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
7
7
7
7
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
7
7
7
7
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
7
7
7
7
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
7
7
7
7
CLK_PCIE_ICH# 14
CLK_PCIE_ICH 14
R387 24.9_0402_1%
1
2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
25
25
28
28
25
25
27
27
28
28
25
25
25
25
20
20
20
20
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
U16B
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
R217 22.6_0402_1%
1
2
ICH7R3@
E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4# / GPIO22
GNT4# / GPIO48
GPIO1 / REQ5#
GPIO17 / GNT5#
D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8
PCI_REQ0#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
B15
C12
D12
C15
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
A7
E10
B18
A12
C9
E11
B10
F15
F14
F16
PCI _IRDY#
PCI_PAR
PLTRST#
PCICLK
PME#
C26
A9
B19
PLT_RST#
CLK_PCI_ICH
G8
F7
F8
G7
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI
Interrupt
A3
B4
C5
B5
PIRQA#
PIRQB#
PIRQC#
PIRQD#
AE5
AD5
AG4
AH4
AD9
RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]
MISC
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
MCH_SYNC#
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PCI_REQ1#
PCI_REQ2#
PCI_GNT2#
PCI_REQ3#
PCI_REQ2# 20
PCI_GNT2# 20
PCI_REQ4#
ICH_GPIO48
PCI_REQ5#
B
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
20
20
20
20
PCI_IRDY# 20
PCI_PAR 20
PCI_RST# 20,26,29
PCI_DEVSEL# 20
PCI_PERR# 20
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PCI_SERR# 20
PCI_STOP# 20
PCI_TRDY# 20
PCI_FRAME# 20
PLT_RST# 7,16,22,25
CLK_PCI_ICH 14
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
AE9
AG8
AH8
F21
AH20
20
20
20
20
MCH_ICH_SYNC# 7
ICH7R3@
I/F
GPIO2 / PIRQE#
GPIO3 / PIRQF#
GPIO4 / PIRQG#
GPIO5 / PIRQH#
ICH7_BGA652~D
Issued Date
8.2K_0804_8P4R_5%
RP33
PCI_REQ3#
1
8
PCI_PIRQH#
2
7
PCI_REQ2#
3
6
PCI_FRAME#
4
5
10K_0402_5% @
2
1 R203
U20A
Security Classification
PCI_DEVSEL#
PCI_STOP#
PCI_SERR#
PCI_TRDY#
8
7
6
5
8.2K_0804_8P4R_5%
RP34
PCI_PIRQE#
1
8
PCI_PIRQF#
2
7
PCI _IRDY#
3
6
PCI_PERR#
4
5
SLP_S5#
SPI_MISO
EC_FLASH# 27
SATA_CLKREQ# 14
PCM_DISABLE# 21
U16D
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P2
@ 15P_0402_50V8J
8.2K_0804_8P4R_5%
RP37
PCI_PIRQB#
1
8
PCI_PIRQA#
2
7
PCI_PIRQC#
3
6
PCI_PIRQD#
4
5
10K_0402_5% @
SPI_MOSI 2
1 R199
SPK_SEL_SB 26
2HDD_DET#
EC_FLASH#
SATA_CLKREQ#
SLP_S4#
SPI_CS#
EC_SCI# 26
ACIN
26,28,30
BT_DET# 27
EC_LID_OUT# 26
BT_DET#
EC_LID_OUT#
SN74LVC08APW_TSSOP14
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
8.2K_0402_5%
R I# 2
1 R220
EC_RSMRST# 26
0.1U_0402_16V4Z
25
25
25
25
C281
RP32
1
2
3
4
8.2K_0402_5%
ICH_LOW_BAT# 1
2 R230
PLT_RST#
C354 2
PCIE_PTX_C_IRX_N2
KS@
PCIE_PTX_C_IRX_P2
2
1 C334 PCIE_ITX_PRX_N2
C344 PCIE_ITX_PRX_P2
2
1
KS@
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
2
1 C321 PCIE_ITX_PRX_N3
C329 PCIE_ITX_PRX_P3
2
1
@ 15P_0402_50V8J
+3VS
10K_0402_5%
2
1 R229
10K_0402_5%
OCP# 2
1 R228
DPRSLPVR 7,36
1
@ 100K_0402_5%
+3VALW
PERn1
PERp1
PETn1
PETp1
C364
10K_0402_5%
LINKALERT# 2
1 R225
R182
ICH7_BGA652~D
ICH7R3@
F26
F25
E28
E27
@ 10_0402_5%
+3VALW
GPIO11 / SMBALERT#
AC20
AF21
CLK_14M_ICH 14
CLK_48M_ICH 14
14
H_STP_PCI#
H_STP_CPU#
AB18
OCP#
GPIO
14
14
OCP#
SPKR
SUS_STAT#
SYS_RST#
SYS
DBRESET#
PM_BMBUSY#
RI#
A19
A27
A22
R176
@ 10_0402_5%
DBRESET#
4
7
4
SB_SPKR
R224
SB_SPKR
POWER MGT
23
Remove SUS_STAT#
A28
Clocks
R I#
100K_0402_5%
BT_DET# 1
2 R146
100_0402_5%
100_0402_5%
100_0402_5%
100_0402_5%
CLK_14M_ICH
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1
CLK_48M_ICH
C22
B22
A26
B25
A25
SATA
GPIO
1 10K_0402_5%
1 10K_0402_5%
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
SMB
+3VALW
ICH_SMBCLK
ICH_SMBDATA
R226 2
R227 2
U16C
2.2K_0402_5%
2
2.2K_0402_5%
10K_0402_5%
2
1 R161
8.2K_0402_5%
PM_CLKRUN# 2
1 R164
R394
R395
14,25 ICH_SMBCLK
14,25 ICH_SMBDATA
SIRQ
+3VS
Title
Size
Document Number
Rev
0.3
Sheet
18
of
38
+VCCP
U16F
F6
0.1U_0402_16V4Z
+5VS
+3VS
C579
C559
C574
C304
R147
D12
RB751V_SOD323
+ICH_V5REF_RUN
1
C576
0.1U_0402_16V4Z
0.1U_0402_16V4Z
220U_D2_4VM
100_0402_5%
2
AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28
D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23
J22
J23
K22
K23
L22
L23
M22
M23
N22
N23
P22
P23
R22
R23
R24
R25
R26
T22
T23
T26
T27
T28
U22
U23
V22
V23
W22
W23
Y22
Y23
2
0.1U_0402_16V4Z
C561
0.1U_0402_16V4Z
+5VALW +3VALW
R232
D14
RB751V_SOD323
10_0402_5%
+ICH_V5REF_SUS
C361
0.1U_0402_16V4Z
+3VS
C580
0.1U_0402_16V4Z
0.5_0805_1%
2
0_0805_5%
C258
+3VALW
C347
0.1U_0402_16V4Z
C261
0.1U_0402_16V4Z
+3VS
1
+1.5VS
1
C255
1U_0603_10V4Z
+1.5VS
+USBPLL
1
2
L30
1
CHB1608U301_0603 C356
0.1U_0402_16V4Z
1
A
Vcc3_3 / VccHDA
U6
VccSus3_3/VccSusHDA
R7
Vcc3_3[1]
VccDMIPLL
AD2
VccSATAPLL
AH11
Vcc3_3[2]
AB10
AB9
AC10
AD10
AE10
AF10
AF9
AG9
AH9
Vcc1_5_A[10]
Vcc1_5_A[11]
Vcc1_5_A[12]
Vcc1_5_A[13]
Vcc1_5_A[14]
Vcc1_5_A[15]
Vcc1_5_A[16]
Vcc1_5_A[17]
Vcc1_5_A[18]
E3
VccSus3_3[19]
C1
VccUSBPLL
V5
V1
W2
W7
+3VALW
Vcc1_5_B[1]
Vcc1_5_B[2]
Vcc1_5_B[3]
Vcc1_5_B[4]
Vcc1_5_B[5]
Vcc1_5_B[6]
Vcc1_5_B[7]
Vcc1_5_B[8]
Vcc1_5_B[9]
Vcc1_5_B[10]
Vcc1_5_B[11]
Vcc1_5_B[12]
Vcc1_5_B[13]
Vcc1_5_B[14]
Vcc1_5_B[15]
Vcc1_5_B[16]
Vcc1_5_B[17]
Vcc1_5_B[18]
Vcc1_5_B[19]
Vcc1_5_B[20]
Vcc1_5_B[21]
Vcc1_5_B[22]
Vcc1_5_B[23]
Vcc1_5_B[24]
Vcc1_5_B[25]
Vcc1_5_B[26]
Vcc1_5_B[27]
Vcc1_5_B[28]
Vcc1_5_B[29]
Vcc1_5_B[30]
Vcc1_5_B[31]
Vcc1_5_B[32]
Vcc1_5_B[33]
Vcc1_5_B[34]
Vcc1_5_B[35]
Vcc1_5_B[36]
Vcc1_5_B[37]
Vcc1_5_B[38]
Vcc1_5_B[39]
Vcc1_5_B[40]
Vcc1_5_B[41]
Vcc1_5_B[42]
Vcc1_5_B[43]
Vcc1_5_B[44]
Vcc1_5_B[45]
Vcc1_5_B[46]
Vcc1_5_B[47]
Vcc1_5_B[48]
Vcc1_5_B[49]
Vcc1_5_B[50]
Vcc1_5_B[51]
Vcc1_5_B[52]
Vcc1_5_B[53]
Vcc1_5_A[1]
Vcc1_5_A[2]
Vcc1_5_A[3]
Vcc1_5_A[4]
Vcc1_5_A[5]
Vcc1_5_A[6]
Vcc1_5_A[7]
Vcc1_5_A[8]
Vcc1_5_A[9]
AA2
Y7
V5REF_Sus
AB7
AC6
AC7
AD6
AE6
AF5
AF6
AG5
AH5
AG28
+1.5VS
+SATAPLL
1
2
L17
CHB1608U301_0603
0.1U_0402_16V4Z
+1.5VS
B27
+1.5VS_DMIPLL
C259
0.1U_0402_16V4Z
C279
10U_0805_10V4Z
R169
1
C280
0.01U_0402_16V7K
+1.5VS_DMIPLLR
+1.5VS
V5REF[2]
VccSus1_05/VccLAN1_05[1]
VccSus1_05/VccLAN1_05[2]
1
C257
Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]
A5
B13
B16
B7
C10
D15
F9
G11
G12
G16
VccSus3_3[2]
VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]
A24
C24
D19
D22
G19
VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]
VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]
Vcc1_5_A[24]
Vcc1_5_A[25]
AB8
AC8
C28
G20
+VCCP
C310
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C562
0.1U_0402_16V4Z
1
2
C565
0.1U_0402_16V4Z
C286
4.7U_0805_10V4Z
+3VS
+RTCVCC
T7
F17
G17
Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]
AB17
AC17
VccSus1_05[2]
VccSus1_05[3]
330U_D2E_2.5VM_R9
+3VS
1
Vcc1_5_A[19]
Vcc1_5_A[20]
VccSus1_05[1]
C556
1
2
K7
C243
+3VS
AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
P7
+3VALW
Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]
Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]
W5
1U_0603_10V4Z
AE23
AE26
AH26
VccRTC
C256
V_CPU_IO[1]
V_CPU_IO[2]
V_CPU_IO[3]
VccSus3_3[1]
C577
0.1U_0402_16V4Z
C333
0.1U_0402_16V4Z
+3VALW
C582
0.1U_0402_16V4Z
C251
0.1U_0402_16V4Z
+ICH_V5REF_SUS
0.1U_0402_16V4Z
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
C260
0.1U_0402_16V4Z
+1.5VS
D
Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]
C362
0.1U_0402_16V4Z
AD17
U16E
V5REF[1]
C578
0.1U_0402_16V4Z
G10
C581
0.1U_0402_16V4Z
+ICH_V5REF_RUN
+3VALW
C340
0.1U_0402_16V4Z
+1.5VS
C567 0.1U_0402_16V4Z
A1
H6
H7
J6
J7
+1.5VS
1
C363
0.1U_0402_16V4Z
VccSus3_3/VccLAN3_3[1]
VccSus3_3/VccLAN3_3[2]
VccSus3_3/VccLAN3_3[3]
VccSus3_3/VccLAN3_3[4]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27
ICH7_BGA652~D
C306
A
ICH7R3@
0.1U_0402_16V4Z
Issued Date
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
ICH7_BGA652~D
Security Classification
A4
A23
B1
B8
B11
B14
B17
B20
B26
B28
C2
C6
C27
D10
D13
D18
D21
D24
E1
E2
E4
E8
E15
F3
F4
F5
F12
F27
F28
G1
G2
G5
G6
G9
G14
G18
G21
G24
G25
G26
H3
H4
H5
H24
H27
H28
J1
J2
J5
J24
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26
M3
M4
M5
M12
M13
M14
M15
M16
M17
M24
M27
M28
N1
N2
N5
N6
N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
P3
P4
P12
P13
P14
P15
P16
P17
P24
P27
Title
Size
Document Number
Rev
0.3
Sheet
19
of
38
+3VS
C745
C746
C747
10U_0805_10V4Z
1
C748
+3VS
0.1U_0402_16V4Z
1
SD_CD#
MS_CD#
E9
A8
B8
SD_CD#
MS_CD#
SM_CD#
A7
E8
B6
A6
C7
B7
MS_CLK/SD_CLK/SM_EL_WP#
MS_BS/SD_CMD/SM_WE#
MS_DATA3/SD_DAT3/SM_D3
MS_DATA2/SD_DAT2/SM_D2
MS_DATA1/SD_DAT1/SM_D1
MS_SDIO(DATA0)/SD_DAT0/SM_D0
SMRE
SDCMD_SMALE
SDD0_SMD4
SDD1_SMD5
SDD2_SMD6
SDD3_SMD7
SDWP#_SMCE#
A4
C5
C6
A5
B5
E6
E7
SD_CLK/SM_RE#
SD_CMD/SM_ALE
SD_DAT0/SM_D4
SD_DAT1/SM_D5
SD_DAT2/SM_D6
SD_DAT3/SM_D7
SD_WP/SM_CE#
CLK_48M_CB
R555
@ 10_0402_5%
P1
W8
K1
K19
VCCP
VCCP
2
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
M1
M2
M3
M6
M5
N1
N2
N3
P3
R1
R2
P5
R3
T1
T2
W4
W7
R8
U8
V8
W9
V9
U9
R9
V10
U10
R10
W11
V11
U11
P11
R11
C755
G5
SC_PWR_CTRL
B4
A3
SM_CLE
XD_CD#/SM_PHYS_WP#
C/BE3#
C/BE2#
C/BE1#
C/BE0#
P2
U5
V7
W10
@ 10P_0402_50V8K
R557 1
14
CLK_48M_CB
AMP_440168-2
1
2
R561
56.2_0603_1%
1
2
R560
56.2_0603_1%
R562
1
6.34K_0402_1%
T18
2
T19
R13
V14
W14
V13
W13
W17
V16
W16
V15
W15
R12
XTPBIAS0
XTPA0+
XTPA0XTPB0+
XTPB01
2
C760
1U_0603_10V4Z
1K_0402_5%
R566
1
2
R567
1
2
1K_0402_5%
CPS
R572
R564
5.1K_0603_1% 56.2_0603_1%
2
1
2
1
4
3
2
1
C759
1U_0603_10V4Z
5
6
7
8
C761
R563
220P_0402_50V7K 56.2_0603_1%
2
1
1
JP20
P12
F1
2 4.7K_0402_5% P17
R558 1
+3VS
2
2 1K_0402_5%
X_OUT R18
X_IN
R19
R0
R1
TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N
TPBIAS1
TPA1P
TPA1N
TPB1P
TPB1N
CPS
L1
K3
K5
L5
SUSPEND#
J5
R575 1
2 CPS
4.7K_0402_5%
AGND
AGND
AGND
R14
U13
U14
2
X3
24.576MHz_16P_3XG-24576-43E1
SPKROUT
H3
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
G1
H5
H2
H1
J1
J2
J3
SCL
SDA
G2
G3
VR_EN#
K2
PCI7412ZHK_PBGA257
2
0.01U_0402_16V7K
C753
1U_0603_10V4Z
Q63
5IN1_LED
2
G
7412@
2N7002_SOT23
R547
10K_0402_5%
7412@
+VCC_5IN1
7412@
MSBS_SDCMD_SMWE#
1
R548
2
100K_0402_5%
7412@
SMRE
1
R549
SDWP#_SMCE#
1
R550
SM_RB
1
R552
2
100K_0402_5%
7412@
2
100K_0402_5%
7412@
2
22K_0402_5%
CLK_PCI_PCM
R554
@ 10_0402_5%
+3VS
C754
+VCC_5IN1
@ 15P_0402_50V8J
R556
10K_0402_5%
7412@
PCI_PAR 18
PCI_FRAME# 18
PCI_TRDY# 18
PCI_IRDY# 18
PCI_STOP# 18
PCI_DEVSEL# 18
2 R559
1 PCI_AD20
100_0402_5%
PCI_PERR#
PCI_SERR#
PCI_REQ2#
PCI_GNT2#
CLK_PCI_PCM
PCI_RST#
MC_PWRON#
U43
1
2
3
4
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
8
7
6
5
4.7U_0805_10V4Z
1
7412@
C756
0.1U_0402_16V4Z
G528_SO8
7412@
18
18
18
18
C758
C757 7412@ 7412@
2
2
1U_0603_10V4Z
6 in 1 CardReader Conn.
CLK_PCI_PCM 14
PCI_RST# 18,26,29
JP10
R565
1
2
43K_0402_5%
+3VS
R568 1
PIRQA R569 2
PIRQB R570 2
PIRQC R571 2
2
1
1
1
PIRQD R573 2
5IN1_LED
1 0_0402_5%
1
1 R576
R577
PCM_SPK 23
43K_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
2
R574
2
2 300_0402_5%
300_0402_5%
1
R578
1K_0402_5%
+VCC_5IN1
2
C752
PCI_PIRQA# 18
PCI_PIRQB# 18
PCI_PIRQC# 18
SIRQ
18,26,29
PCI_PIRQD# 18
1
10K_0402_5%
+3VS
+VCC_5IN1
41
XD-VCC
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
SDD0_SMD4
SDD1_SMD5
SDD2_SMD6
SDD3_SMD7
33
34
35
36
37
38
39
40
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
MSBS_SDCMD_SMWE#
SMELWP#
SDCMD_SMALE
XD_CD#
SM_RB
SMRE
SDWP#_SMCE#
SMCLE
30
31
29
23
25
26
27
28
XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
32
24
XD-GND
XD-GND
42
18
47
48
N.C.
N.C.
SHIELD
SHIELD
C763
0.1U_0402_16V4Z
X_IN
1
C764
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
VSSPLL
1
18P_0402_50V8J
PCLK
PRST#
GRST#
RI_OUT#/PME#
XO
XI
X_OUT
C762
U7
R6
W5
V5
V6
U6
N5
R7
W6
L3
L2
+3VS
2
0.1U_0402_16V4Z
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
C751
PAR
FRAME#
TRDY#
IRDY#
STOP#
DEVSEL#
IDSEL
PERR#
SERR#
REQ#
GNT#
TEST0
CLK_48
PHY_TEST_MA
CLOSE TO CHIP
18P_0402_50V8J
PCI7412
C750
7412@
HT-191NB_BLUE_0603
SMCLE
XD_CD#
VSSPLL
C749
R17
MC_PWR_CTRL_0
MC_PWR_CTRL_1/SM_R/B#
MSCLK_SDCLK_SMELWP#
MSBS_SDCMD_SMWE#
MSD3_SDD3_SMD3
MSD2_SDD2_SMD2
MSD1_SDD1_SMD1
MSD0_SDD0_SMD0
7412@
R553
2
1
33_0402_5%
SMELWP#
C8
F8
0.01U_0402_16V7K
1
33_0402_5% R551
MSCLK_SDCLK 2
1
7412@
MC_PWRON#
SM_RB
VR_PORT
VR_PORT
PCI_CBE#[0..3]
VDDPLL_33
VDDPLL_15
P13
P14
U15
AVDD_33
AVDD_33
AVDD_33
PCI_AD[0..31]
18 PCI_AD[0..31]
18 PCI_CBE#[0..3]
U19
P15
0.01U_0402_16V7K
U31B
D20
2
1U_0603_10V4Z
1 1
R546
120_0402_5%
7412@
C744
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
0.01U_0402_16V7K
0.01U_0402_16V7K
C742
1
2 VSSPLL
0.1U_0402_16V4Z
+5VS
C741
0.1U_0402_16V4Z
C743
D
C740
L44
0.1U_0402_16V4Z
10U_0805_10V4Z
CHB1608U301_0603
2
1
C739
+3VS
C738
L43
2 2
C737
+AVDD_7412
6 IN 1 LED
CHB1608U301_0603
1
2
0.01U_0402_16V7K
4 IN 1 CONN
SD-VCC
MS-VCC
15
9
SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-CMD
SD-CD-SW
SD-CD-COM
SD-WP-SW
SD-WP-COM
16
19
20
11
12
13
21
22
43
44
MSCLK_SDCLK
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
MSBS_SDCMD_SMWE#
SD_CD#
MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS
SD-GND
SD-GND
MS-GND
MS-GND
8
4
3
5
7
6
2
14
17
1
10
MSCLK_SDCLK
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
MS_CD#
MSBS_SDCMD_SMWE#
+VCC_5IN1
SDWP#_SMCE#
7412@
R579
1 2
+3VS
A
470_0805_5%
7412@
0.1U_0402_16V4Z
Q64
1
S
C765
PIRQA
PIRQB
PIRQC
PIRQD
C766
2
4.7U_0805_10V4Z
R580
R581
R582
R583
2
2
2
2
@
@
@
@
1
1
1
1
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
TAITW_R007-530-L3
18
18
18
18
Security Classification
2006/10/03
Issued Date
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
MC_PWRON#
2
G
2N7002_SOT23
7412@
Title
Rev
0.3
Sheet
20
of
38
U44
9
+S1_VCC
VCC
VCC
VCC
12V
13
12
11
40mil
+3VS
+S1_VPP
0.1U_0402_16V4Z
C774
C775
E13
E18
H18
L17
CC/BE3#/REG#
CC/BE2#/A12
CC/BE1#/A8
CC/BE0#/CE1#
H14
E19
G15
F17
G18
F19
H15
G19
C12
C14
G17
A12
A11
F18
E12
CPAR/A13
CFRAME#/A23
CTRDY#/A22
CIRDY#/A15
CSTOP#/A20
CDEVSEL#/A21
CBLOCK#/A19
CPERR#/A14
CSERR#/WAIT#
CREQ#/INPACK#
CGNT#/WE#
CSTSCHG/BVD1(STSCHG#/RI#)
CCLKRUN#/WP(IOIS16#)
CCLK/A16
CINT#/READY(IREQ#)
S1_RST
C15
CRST#/RESET
S1_BVD2
B12
CAUDIO/BVD2(SPKR#)
S1_CD1#
S1_CD2#
S1_VS1
S1_VS2
N15
B11
A13
B16
CCD1#/CD1#
CCD2#/CD2#
CVS1/VS1#
CVS2/VS2#
E10
A_USB_EN#
S1_A13
S1_A23
S1_A22
S1_A15
S1_A20
S1_A21
S1_A19
S1_A14
S1_WAIT#
S1_INPACK#
S1_WE#
S1_BVD1
R588
S1_WP
1
2 S1_A16
33_0402_5% S1_RDY#
S1_A16_C
S1_CD1#
1
100P_0402_50V8J
2
C785
S1_CD2#
1
100P_0402_50V8J
F6
F9
F12
F14
J6
J14
L6
L14
P6
P8
P10
C779
VPPD1
VCCD0#
VPPD0
R584
10K_0402_5%
3.3V
3.3V
B9
A9
C9
3
4
1
2
15
14
OC
0.1U_0402_16V4Z
2
10U_0805_10V4Z
2
0.01U_0402_16V7K
2
1U_0603_10V4Z
VCCD0#
VCCD1#
VPPD0
VPPD1
TPS2211AIDBR_SSOP16
R585
0_0402_5%
2
PCM_DISABLE# 18
***
PCI 7412
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
B10 S1_D2
C4
D1
E1
E2
E3
F2
F3
R587
F5
G6
2
H17 S1_A18
M19 S1_D14
JP8
VCCD1#
2
RSVD/D2
RSVD/VD0/VCCD1#
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
F7
F10
F13
G14
H6
K6
K14
M14
N6
P7
P9
2
C784
DATA/VD2/VPPD1
CLOCK/VD1/VCCD0#
LATCH/VD3/VPPD0
C778
4.7U_0805_10V4Z
VCCD0
VCCD1
VPPD0
VPPD1
20mil
C768
1
C769
1
C770
1
C771
5V
5V
+3VS
0.1U_0402_16V4Z
10
SHDN
S1_REG#
S1_A12
S1_A8
S1_CE1#
5
6
GND
CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3
C777
C10
A10
F11
E11
C11
B13
C13
A14
B14
B15
E14
A16
D19
E17
F15
H19
J17
J15
J18
K15
K17
K18
L15
L18
L19
M17
M18
N19
M15
N17
N18
P19
C772
4.7U_0805_10V4Z
0.1U_0402_16V4Z
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCCB
VCCB
U31A
A15
J19
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C776
C773
VPP
+3VS
0_0402_5%
1
A2
A17
A18
B1
B2
B3
B17
B18
B19
C1
C2
C3
C16
C17
C18
C19
D2
D3
D17
D18
E5
N14
P18
T3
T17
U1
U2
U3
U4
U12
U16
U17
U18
V1
V2
V3
V4
V12
V17
V18
V19
W2
W3
W12
W18
R586
43K_0402_5%
1
0.1U_0402_16V4Z
+5VS
16
1
2
C767 0.1U_0402_16V4Z
C780
10U_0805_10V4Z
C781
0.1U_0402_16V4Z
+S1_VPP
C782
10U_0805_10V4Z
C783
0.1U_0402_16V4Z
PCI7412ZHK_PBGA257
69
70
GND
GND
DATA3
CD1#
DATA4
DATA11
DATA5
DATA12
DATA6
DATA13
DATA7
DATA14
CE1#
DATA15
ADD10
CE2#
OE#
VS1#
ADD11
IORD#
ADD9
IOWR#
ADD8
ADD17
ADD13
ADD18
ADD14
ADD19
WE#
ADD20
READY
ADD21
VCC
VCC
VPP
VPP
ADD16
ADD22
ADD15
ADD23
ADD12
ADD24
ADD7
ADD25
ADD6
VS2#
ADD5
RESET
ADD4
WAIT#
ADD3
INPACK#
ADD2
REG#
ADD1
BVD2
ADD0
BVD1
DATA0
DATA8
DATA1
GND DATA9
GND DATA2
DATA10
WP
CD2#
GND
GND
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68
S1_D3
S1_CD1#
S1_D4
S1_D11
S1_D5
S1_D12
S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15
S1_A10
S1_CE2#
S1_OE#
S1_VS1
S1_A11
S1_IORD#
S1_A9
S1_IOWR#
S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19
S1_WE#
S1_A20
S1_RDY#
S1_A21
+S1_VCC
+S1_VCC
+S1_VPP
S1_A16_C
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24
S1_A7
S1_A25
S1_A6
S1_VS2
S1_A5
S1_RST
S1_A4
S1_WAIT#
S1_A3
S1_INPACK#
S1_A2
S1_REG#
S1_A1
S1_BVD2
S1_A0
S1_BVD1
S1_D0
S1_D8
S1_D1
S1_D9
S1_D2
S1_D10
S1_WP
S1_CD2#
+S1_VPP
B
SANTA_130606-1_LT
Security Classification
2006/10/03
Issued Date
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
0.3
Sheet
21
of
38
2
+3VALW
R33
3.6K_0402_5%
+3VALW
U5
U4
2 0.1U_0402_16V4Z
PCIE_PTX_IRX_P3
29
HSOP
2 0.1U_0402_16V4Z
PCIE_PTX_IRX_N3
30
HSON
EEDO
EDDI/AUX
EESK
EECS
18 PCIE_ITX_C_PRX_P3
23
HSIP
18 PCIE_ITX_C_PRX_N3
24
HSIN
14 CLK_PCIE_LAN
26
REFCLK_P
14 CLK_PCIE_LAN#
27
REFCLK_N
7,16,18,25 PLT_RST#
20
PERSTB
LAN_CTRL18
VCTRL18
LAN_CTRL15
63
54
55
56
57
LAN_LINK#
LAN_ACTIVITY#
MDIP0
MDIN0
MDIP1
MDIN1
3
4
6
7
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-
MDIP2
MDIN2
MDIP3
MDIN3
9
10
12
13
LAN_MDI2+
LAN_MDI2LAN_MDI3+
LAN_MDI3-
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
15
21
32
33
38
41
43
49
52
58
LED3
LED2
LED1
LED0
RSET
19
LANWAKEB
36
+3VS
ISOLATEB
LAN_X1
60
CKXTAL1
LAN_X2
61
CKXTAL2
62
GVDD
2 1K_0402_1%
R301
15K_0402_5%
C50
1U_0603_10V4Z
C
C48
0.1U_0402_16V4Z
65
EXPOSE_PAD
25
EGND
VDD33
VDD33
VDD33
VDD33
31
EGND
AVDD33
Y1
LAN_X2
25MHZ_20P_6X25000017
C45
27P_0402_50V8J
17
18
35
34
39
40
42
50
51
C47
27P_0402_50V8J
GND
NC
NC
VCC
5
6
7
8
C44
2
+3VALW
1
0.1U_0402_16V4Z
C76
0.1U_0402_16V4Z
C51
0.1U_0402_16V4Z
C465
0.1U_0402_16V4Z
C63
0.1U_0402_16V4Z
NC
NC
NC
NC
NC
NC
NC
NC
NC
59
5
8
11
14
EVDD18
22
EVDD18
28
1
2
BLM18AG601SN1D_0603
2
C470
0.1U_0402_16V4Z
C474
0.1U_0402_16V4Z
C69
0.1U_0402_16V4Z
C475
0.1U_0402_16V4Z
C479
0.1U_0402_16V4Z
RTL8111B_QFN64
C93
0.1U_0402_16V4Z
+LAN_VDD15
+3VALW
1
+3VALW
L6
1
2
BLM18AG601SN1D_0603
2
C46
+AVDD33
AVDD18
AVDD18
AVDD18
AVDD18
+AVDD18
+LAN_VDD15
16
37
53
46
AVDD33
L12
C49
10U_0805_10V4Z
+AVDD18 2
C82
0.1U_0402_16V4Z
C464
0.1U_0402_16V4Z
C466
0.1U_0402_16V4Z
C52
0.1U_0402_16V4Z
C75
0.1U_0402_16V4Z
C486
0.1U_0402_16V4Z
+3VALW
+3VALW
0.1U_0402_16V4Z
LAN_CTRL18
LAN_CTRL15
Q4
MMJT9435T1G_SOT223
1000M@
40mil
Q3
MMJT9435T1G_SOT223
1000M@
40mil
2
4
LAN_X1
DO
DI
SK
CS
+LAN_VDD18
VCTRL15
64
25,26 EC_PME#
R300 1
4
3
2
1
AT93C46-10SI-2.7_SO8
1
2
R285 100M@ 2K_0402_1%
45
47
48
44
C86
2
4
C85
18 PCIE_PTX_C_IRX_P3
18 PCIE_PTX_C_IRX_N3
+LAN_VDD18
L13
100M@
1
2
1 BLM18AG601SN1D_0603
C100
1000M@
C102
10U_0805_10V4Z
100M@ 2
22U_0805_6.3V6M
L11
100M@
1
2
1 BLM18AG601SN1D_0603
C71
40mil
+LAN_VDD18
1
C106
C61
10U_0805_10V4Z
100M@ 2
0.1U_0402_16V4Z
22U_0805_6.3V6M
40mil
+LAN_VDD15
1
C72
0.1U_0402_16V4Z
+LAN_VDD18
C30
R15 2
R14 2
100M@
2
1
C31
100M@
R10
0_0402_5%
1 49.9_0402_1%
1 49.9_0402_1%
LAN_MDI1LAN_MDI1+
100M@
0_0402_5%
L45
R17 2
R16 2
100M@
2
1
0.01U_0402_16V7K
RJ45_MIDI3RJ45_MIDI3+
100M@
RJ45_MIDI3-_L
RJ45_MIDI3+_L
B
LAN Conn.
@ WCM2012F2S-900T04_0805
R679
0_0402_5%
100M@
R11
0_0402_5%
LAN_MDI0LAN_MDI0+
100M@
0.01U_0402_16V7K
1 49.9_0402_1%
1 49.9_0402_1%
JP11
R680
U30
TCT2
TD2+
TD2-
MCT2
MX2+
MX2-
21
20
19
RJ45_MIDI2RJ45_MIDI2+
7
8
9
TCT3
TD3+
TD3-
MCT3
MX3+
MX3-
18
17
16
RJ45_MIDI1RJ45_MIDI1+
10
11
12
TCT4
TD4+
TD4-
MCT4
MX4+
MX4-
15
14
13
RJ45_MIDI0RJ45_MIDI0+
RJ45_MIDI3RJ45_MIDI3+
C26
0.01U_0402_16V7K
R259
RJ45_MIDI1-_L
RJ45_MIDI1+_L
2
68P_0402_50V8K
LAN_LINK#
C697
1
2
R257
0_0402_5%
75_0402_1%
4
1
RJ45_GND
4
1
3
2
PR4-
PR4+
RJ45_MIDI1-_L
PR2-
RJ45_MIDI2-_L
PR3-
RJ45_MIDI2+_L
PR3+
RJ45_MIDI1+_L
PR2+
RJ45_MIDI0-_L
PR1-
RJ45_MIDI0+_L
PR1+
+3VALW
C3
1
RJ45_MIDI0-_L
RJ45_MIDI0+_L
2009/10/03
Title
16
SHLD1
15
SHLD2
14
SHLD1
13
Green LED+
TYCO_3-440470-4
LANGND
2
1
Deciphered Date
SHLD2
Green LED-
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
10
1000P_1206_2KV7K
300_0402_5%
@ WCM2012F2S-900T04_0805
R685
0_0402_5%
Issued Date
Amber LED-
RJ45_MIDI3+_L
RJ45_GND
Amber LED+
11
8
C696
2
12
RJ45_MIDI3-_L
0_0402_5%
Security Classification
68P_0402_50V8K
1 300_0402_5%
L48
RJ45_MIDI0RJ45_MIDI0+
R258
75_0402_1%
R684
75_0402_1%
C27
0.01U_0402_16V7K
RJ45_MIDI2-_L
RJ45_MIDI2+_L
@ WCM2012F2S-900T04_0805
R683
0_0402_5%
C25
0.01U_0402_16V7K
R260
75_0402_1%
1
2
R256
L47
R261
NS892402
1000M@
C28
0.01U_0402_16V7K
+3VALW
LAN_ACTIVITY#
@ WCM2012F2S-900T04_0805
R681
0_0402_5%
RJ45_MIDI1RJ45_MIDI1+
R682
LAN_MDI0LAN_MDI0+
24
23
22
LAN_MDI2LAN_MDI2+
4
5
6
LAN_MDI1LAN_MDI1+
MCT1
MX1+
MX1-
TCT1
TD1+
TD1-
1
2
3
RJ45_MIDI2RJ45_MIDI2+
LAN_MDI3LAN_MDI3+
0_0402_5%
L46
C4
0.1U_0402_16V4Z
C5
4.7U_0805_10V4Z
Rev
0.3
Sheet
1
22
of
38
HD Audio Codec
+AVDD_AC97
1
C373
1
C370
1
2
WM-64PCY_2P
45MIC@
24
MIC1_L
24
MIC1_R
MIC1_L
MIC1_R
1
C704
1
C379
1
C381
1
C705
1
C706
2 100P_0402_50V8J
268_HP_L
268_HP_R
23
LINE1_L
SIDESURR_OUT_L
45
24
LINE1_R
SIDESURR_OUT_R
46
18
CD_L
CEN_OUT
43
20
CD_R
LFE_OUT
44
19
CD_GND
BIT_CLK
SDATA_IN
MONO_IN
12
PCBEEP
11
RESET#
10
SYNC
17 ICH_SDOUT_AUDIO
26 SPK_SEL_CODEC
2
3
13
34
GPIO0
GPIO1
SENSE A
SENSE B
47
EAPD
48
SPDIFO
4
7
DVSS1
DVSS2
NC
37
NC
29
LINE2_VREFO
31
EC Beep
C389
26
10P_0402_50V8J
C367 1
1U_0402_6.3V4Z
BEEP#
R236
1
2
560_0402_5%
PCI Beep
AMP_LHPIN
2
2.2U_0603_6.3V6K
AMP_RHPIN
2
2.2U_0603_6.3V6K
AMP_LHPIN 24
18
C375 1
1U_0402_6.3V4Z
SB_SPKR
R240
1
2
560_0402_5%
CardBus Beep
C369 1
1U_0402_6.3V4Z
PCM_SPK
R235
1
2
560_0402_5%
2
R618
0_0402_5%
AMP_RHPIN 24
20
1
2
R544
22_0402_5%
2 R418
1 C591 1
@ 10_0402_5%
@
1
2
R237
33_0402_5%
ICH_BITCLK_AUDIO 17
C368
0.01U_0402_16V7K
R241
10K_0402_5%
2
10P_0402_50V8J
ICH_AC_SDIN0 17
26
2
1U_0402_6.3V4Z
@
C371
1
2
AMP_LEFT 24
AMP_RIGHT 24
2
G
Q61
2N7002_SOT23
NSE_DPR
MONO_IN
1U_0402_6.3V4Z
C
1
2
Q23
R238
MMBT3904_SOT23 2.4K_0402_5%
E
2
B
D17
RB751V_SOD323
R528
10mil
10mil
10mil
MIC1_VREFO_L
28
32
MIC2_VREFO
30
VREF
27
ACZ_VREF
JDREF
40
ACZ_JDREF 20K_0402_1%
NC
33
AVSS1
AVSS2
26
42
+MIC1_VREFO_L
Q62
MMBT3904_SOT23
2
B
+S1_VCC
MIC1_VREFO_R
2.2K_0402_5%
+MIC1_VREFO_R
+MIC2_VREFO
10mil
10U_0805_10V4Z
1
1
C390
100P_0402_50V8J
C707
SDATA_OUT
1
@ C793
1
@ C792
1
C377
R239
10K_0402_5%
39
41
2 100P_0402_50V8J
1
DVDD1
SURR_OUT_L
SURR_OUT_R
MIC1_R
EAPD
AMP_RIGHT
MIC2_R
MIC1_L
24,26
FRONT_OUT_R
36
MIC2_L
22
SENSE_A
SENSE_B
35
17
MIC1_C_R
HIGH: HARMAN
LOW: NO-BRAND
FRONT_OUT_L
16
2 1U_0402_6.3V4Z
10P_0402_50V8J
AMP_LEFT
LINE2_R
21
R245
10K_0402_5%
100P_0402_50V8J
680P_0402_50V7K
C388
15
MIC1_C_L
2 100P_0402_50V8J
17 ICH_RST_AUDIO#
DVDD2
38
LINE2_L
2 1U_0402_6.3V4Z
17 ICH_SYNC_AUDIO
SPK_SEL
14
1 FBM-L11-160808-800LMT_0603
MIC1
861_HP_L
2
2.2U_0603_6.3V6K
861_HP_R
2
2.2U_0603_6.3V6K
2
100P_0402_50V8J
MIC2_L
2
1U_0402_6.3V4Z
MIC2_R
2
1U_0402_6.3V4Z
2
100P_0402_50V8J
2
1U_0402_6.3V4Z
2
100P_0402_50V8J
C607
+MIC2_VREFO
1
C811
AMP_RHPIN
1
C812
1
C735
INT_MIC
1
2
1
R545
4.7K_0402_5%
MIC@ C729
MIC@
1
MIC@ C730
2
1
1
C731 MIC@
C736
220P_0402_50V7K
1
C702
1
C703
AVDD2
AMP_LHPIN
AVDD1
U38
25
0.1U_0402_16V4Z
C606
C699
1
C374
+3VS
20mil
C700
2
100P_0402_50V8J
2
0.1U_0402_16V4Z
680P_0402_50V7K
C669
10U_0805_10V4Z
C382
L34
0.1U_0402_16V4Z
+VDDA
+3VS_DVDD
40mil
680P_0402_50V7K
C391
10U_0805_10V4Z
0.1U_0402_16V4Z
1
1
C386
L24 1
2
FBM-L11-160808-800LMT_0603
+VDDA
SENSE_B
+5VALW
Adjustable Output
+5VALW_VDDA
SENSE_A
39.2K
20K
10K
5.1K
39.2K
20K
10K
5.1K
GND
SD
SI9182DH-AD_MSOP8
1
R247
1
R243
1
R244
1
R242
R412
69.8K_0603_1%
R408
24K _0402_1%
2
0_0805_5%
2
0_0805_5%
2
0_0805_5%
2
0_0805_5%
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
CNOISE
Moat Bridge
Security Classification
ERROR
+VDDA
2
C585
Issued Date
SENSE or ADJ
2
1
R406
0_0402_5%
2
1
R409 @ 0_0402_5%
26,28,34 SYSON
16,26,27,29,34,35 SUSP#
SENSE B
C584
DELAY
4.7U_0805_10V4Z
Codec Signals
VOUT
C588
SENSE A
Impedance
VIN
Sense Pin
@
SENSE_B
1
2
R673 MIC@ 20K_0402_1%
+VDDA
U29
L37 1
2
FBM-L11-160808-800LMT_0603
2
1
R620 39.2K_0402_1%
2
1
R253 39.2K_0402_1%
SENSE_A
0.1U_0402_16V4Z
2
20K_0402_1%
C586
AGND
0.1U_0402_16V4Z
24,26 NBA_PLUG
3
R498
4.7U_0805_10V4Z
24 MIC_SENSE
100P_0402_50V8J
DGND
C708
R246
Title
Rev
0.3
Date:
Sheet
23
H
of
38
23 AMP_RHPIN
23 AMP_LHPIN
+5VS
1 R603
2
24K_0402_5%
R591 1
24
INR _H
INL_H
4
6
1 R602
2
24K_0402_5%
AMP_SD# 26
2 100K_0402_5%
1
2 AMP_BEEP
C819 1U_0402_6.3V4Z
AMP_CP+
AMP_CP1
2
2.2U_0603_6.3V6K
C804
AMP_BIAS
2
1
C797
2.2U_0603_6.3V6K
2
1
C801
0.1U_0402_16V4Z
28
HP_R
HP_L
INR_H
INL_H
/SD
CP+
CP-
25
BIAS
HP_R
HP_L
15
VSS
16
GND
PGND
PGND
CGND
2
23
7
13
1
2
2
1
C393
2
D38
C796
2.2U_0603_6.3V6K
HEADPHONE
OUT JACK
5
EC_EAPD
2 R592
@ 0_0402_5%
2 20_0402_5%
HPL
1
C399
1
C395
8
3
6
2
1
R677
R598
0_0402_5%
@
7
FOX_JA6033L-5S1-TR
D39
@
AGND
SM05_SOT23
1
1
2
R597
0_0402_5%
@
HPR
10P_0402_50V8J
C818
0.1U_0402_16V4Z
@
10P_0402_50V8J
HP_L
20_0402_5%
L22 1
2
1
KC FBM-L11-160808-121LMT 0603
L23 1
2
1
KC FBM-L11-160808-121LMT 0603
23,26 NBA_PLUG
R676
HP_R
1
2
G
Q67
2N7002_SOT23
26
AGND
PJ17
JUMP_43X39
@
JP28
HP_EN
PJ16
JUMP_43X39
@
CVSS
APA2056_TSSOP28
2 R619
@ 0_0402_5%
FOX_JA6033L-5S1-TR
1
INTSPK_L1
INTSPK_L2
CVSS
BEEP
12
14
8
9
17
18
C392
LOUT+
LOUT-
HP EN
INTSPK_R1
INTSPK_R2
/AMP EN
22
21
3
6
2
1
ROUT+
ROUT-
19
1
VDD
INR_A
INL_A
MIC1_R_1
MIC1_L_1
HP_EN
MIC1_R
L21
1
2
KC FBM-L11-160808-121LMT 0603
MIC1_L
L20
1
2
KC FBM-L11-160808-121LMT 0603
SM05_SOT23
AMP_EN#27
2 100K_0402_5%
MIC1_L
AMP_RHPIN
AMP_LHPIN
2 100K_0402_5%
MIC1_R
23
R590 1
MIC_SENSE
23
+5VS
3
5
23
AMP_LEFT
2 AMPR
0.22U_0402_6.3V6K
2 AMPL
0.22U_0402_6.3V6K
R589 1
U47
5
4
220P_0402_50V7K
23
1
C790
1
C791
AMP_RIGHT
4.7K_0402_5%
R249
220P_0402_50V7K
23
MICROPHONE
IN JACK
10mil
JP29
CVDD
R248
4.7K_0402_5%
20
10
PVDD
PVDD
C679
11
HVDD
C678
10U_0805_10V4Z
1U_0402_6.3V4Z
C677
0.1U_0402_16V4Z
680P_0402_50V7K
C724
10mil
+5VS
W=40mil
AMP_SD#
1
1
C814
0.1U_0402_16V4Z
@
SM05_SOT23 D5
2
1
INTSPK_R1
INTSPK_R2
L7 1
L10 1
3
@
HLMA-160808-39NKT
HLMA-160808-39NKT
2
2
JP2
SPK_R1
SPK_R2
1
2
ACES_85204-0200
JP34
L8 1
L9 1
HLMA-160808-39NKT
HLMA-160808-39NKT
2
2
SPK_L1
SPK_L2
1
2
ACES_85204-0200
3
1
@
SM05_SOT23 D4
Volume Control
+3VS
0.1U_0402_16V4Z
1
2
C787
G
1
C788
2006/10/03
U45
1
2
3
4
5
6
7
1
C786
CD1#
D1
CP1
SD1#
Q1
Q1#
GND
VCC
CD2#
D2
CP2
SD2#
Q2
Q2#
14
13
12
11
10
09
08
C789
1
74LCX74MTC_TSSOP14
ENCODER_DIR 26
ENCODER_PULSE 26
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Security Classification
Issued Date
1
2
R250 10K_0402_5%
SW_XRE094_3P
74LVC1G14GW_SOT353-5
0.1U_0402_16V4Z
NC
P
B
+3VS
0.1U_0402_16V4Z
C798
U46
DIP
COM
1
2
R251 10K_0402_5%
0.01U_0402_16V7K
0.01U_0402_16V7K
+3VS
R255
10K_0402_5%
R305
10K_0402_5%
DIP
SW6
R593
100K_0402_5%
+3VS
Title
AMP/VR/Audio Jack/MIC
Rev
0.3
Date:
Sheet
24
of
38
Finger printer
CIR
+3VS
USB Board
C725
ACES_85201-1205
0.1U_0402_16V4Z
JP32
18 USB20_N6
18 USB20_P6
+USB_VCCC
U42
C726
U41
4.7U_0805_10V4Z CIR@
ACES_85201-0505
FP@
D40
@ SM05_SOT23
1.4A
+5VALW
1
2
3
4
5
100_0805_5%
2
+5VALW
26
CIR@ R540
1
+5VALW_CIR
CIR_IN
GND
GND
26,28
VCC
ROUT
1
2
3
4
USB_EN#
4.7U_0805_10V4Z
OUT
OUT
OUT
FLG
8
7
6
5
1
C727 G528_SO8
Close to JP21
TSOP6238TR_4P
CIR@
GND
IN
IN
EN#
18
18
USB20_P2
USB20_N2
18
18
USB20_P0
USB20_N0
12
11
10
9
8
7
6
5
4
3
2
1
JP33
C728
4.7U_0805_10V4Z
2
+USB_VCCC
Mini-Express Card
+3VS +1.5VS
+3VS
C262
0.01U_0402_16V7K
C575
0.1U_0402_16V4Z
KS@
C327
4.7U_0805_10V4Z
KS@
C326
0.01U_0402_16V7K
KS@
C572
0.1U_0402_16V4Z
KS@
C275
4.7U_0805_10V4Z
KS@
KS@
R422 0_0402_5%
2
1 MINI_WAKE#
+3VALW
+1.5VS
C570
0.1U_0402_16V4Z
KS@
22,26 EC_PME#
27 WLAN_BT_DATA
27 WLAN_BT_CLK
14 MINI_CLKREQ#
14 CLK_PCIE_MCARD#
14 CLK_PCIE_MCARD
MINI_CLKREQ#
CLK_PCIE_MCARD#
CLK_PCIE_MCARD
KS@
18 PCIE_PTX_C_IRX_N2
18 PCIE_PTX_C_IRX_P2
18 PCIE_ITX_C_PRX_N2
18 PCIE_ITX_C_PRX_P2
KILL_SW#
WL_OFF#
KILL_SW#
12
13
U20D
O
26,28
WL_OFF#
26
D33
14
+3VALW
11
2 XMIT_OFF#
KS@
1
RB751V_SOD323
SN74LVC08APW_TSSOP14
***
JP24
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
XMIT_OFF#
PLT_RST#
PLT_RST# 7,16,18,22
+3VALW
+1.5VS
ICH_SMBCLK 14,18
ICH_SMBDATA 14,18
USB20_5N
USB20_5P
R687
@ WCM2012F2S-900T04_0805
+1.5VS
+3VS
USB20_N5 18
4
L49
USB20_P5 18
R686
FOX_AS0B226-S40N-7F~D
KS@
+3VALW
U20B
O
MDC_RESET#
17 ACZ_SDOUT_MDC
ACZ_SDOUT_MDC
17 ACZ_SYNC_MDC
17
ACZ_SDIN1
ACZ_SYNC_MDC
ACZ_SDIN1_MDC
MDC_RESET#
R209 1
2
33_0402_5%
SN74LVC08APW_TSSOP14
1
3
5
7
9
11
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
1
C314
+3VALW
TYCO_1-1775149-2~D
2
4
6
8
10
12
1000P_0402_50V7K
2
C315
C313
@ 4.7U_0805_10V4Z
2
2
0.1U_0402_16V4Z
ACZ_BITCLK_MDC
ACZ_BITCLK_MDC 17
R419
2
GND
GND
GND
GND
GND
GND
JP25
1 1
13
14
15
16
17
18
ACZ_RST#_MDC
MDC_RST#
14
+3VALW
17 ACZ_RST#_MDC
0_0402_5%
0_0402_5%
Issued Date
Security Classification
2006/10/03
Deciphered Date
2009/10/03
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
FP/CIR/USB-B/MDC/Mini_Card
Size
Document Number
Rev
0.3
Sheet
25
of
38
+3VALW
KSI[0..7]
C254
28
IE_BTN#
+3VALW
2
R171
1
@ 10K_0402_5%
KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK
TP_DATA
4.7K_0804_8P4R_5%
+5VS
2
R360
2
R362
1 TP_CLK
4.7K_0402_5%
1 TP_DATA
4.7K_0402_5%
27
27
27,31
27,31
4,16
4,16
+5VALW
RP28
1
2
3
4
8
7
6
5
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
TP_CLK
TP_DATA
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
18
27
4.7K_0804_8P4R_5%
EC_SCI#
BT_RST#
16 VGA_ENBKL
9 GMCH_ENBKL
R151 1
PM@
2
0_0402_5%
R167 1
GM@
2
0_0402_5%
R286
1
R375
1
R374
16
BKOFF#
32
FSTCHG
18
EC_SMI#
24 ENCODER_DIR
25
WL_OFF#
18
EC_SWI#
23,24 NBA_PLUG
23,24 EAPD
28
LID_SW#
28
MODE#
23,28,34 SYSON
16,23,27,29,34,35 SUSP#
36
VR_ON
ENBKL
2.2K_0402_5%
2 S YSON
100K_0402_5%
2 SUSP#
100K_0402_5%
27
18
C284
2
2
R177
1
47K_0402_5%
28
28
28
17
PADS_LED#
CAPS_LED#
NUM_LED#
PHDD_LED#
17
17
GATEA20
EC_KBRST#
EC_SCI#
BT_RST#
ENBKL
BKOFF#
FSTCHG
EC_SMI#
MODE#
S YSON
SUSP#
BT_DETACH
PADS_LED#
CAPS_LED#
NUM_LED#
55
54
23
41
19
5
6
31
95
96
Digital To Analog
99
100
101
102
1
42
47
174
* GPIO18/XIO8CS#
* GPIO19/XIO9CS#
*GPIO1A/XIOACS#
* GPIO1B/XIOBCS#
Expanded I/O * GPIO1C/XIOCCS#
* GPIO1D/XIODCS#
* GPIO1E/XIOECS#
* GPIO1F/XIOFCS#
GPIO
GPIO2E/TOUT1/FANFB1
DPLL_TP/GPIO06/FANFB3
FANTEST_TP/GPIO05/FAN3PWM
FnLock#/GPIO12 *
CapLock#/GPIO011 *
NumLock#/GPIO0A *
ScrollLock#/GPIO0F *
MISC
ECRST#
GA20/GPIO02
KBRST#/GPIO03
ECSCI#
85
86
91
92
93
94
97
98
171
12
11
Timer PinTOUT2/GPIO2F
175
E51IT0/GPIO00
E51IT1/GPIO01
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT
3
4
106
107
XCLKI
XCLKO
158
160
1 2
GPIO04
GPIO07
GPIO08
GPIO09
GPIO0D
GPIO0E
GPIO10
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
GPIO2D
GPODA0/DA0
GPODA1/DA1
GPODA2/DA2
GPODA3/DA3
GPODA4/DA4
GPODA5/DA5
GPODA6/DA6
GPODA7/DA7
SMBus
8
20
21
22
27
28
48
62
63
69
70
75
109
118
119
148
149
155
156
162
168
Analog To Digital
SCL1
SDA1
SCL2
SDA2
Interface
GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7
81
82
83
84
87
88
89
90
163
164
169
170
VCCA
16
34
45
123
136
157
166
PSCLK1
PSDAT1
PSCLK2
PSDAT2PS2
PSCLK3
PSDAT3
INVT_PWM 16
BEEP#
23
PWR_SUSP_LED 28
ACOFF 32
USB_EN# 25,28
EC_ON 28
EC_LID_OUT# 18
EC_EAPD 24
EC_EAPD
ON/OFFBTN# 28
KILL_SW#
PM_SLP_S3#
PM_SLP_S5#
D13
KILL_SW# 25,28
PM_SLP_S3# 18
PM_SLP_S5# 18
CIR_IN 25
EC_PME# 22,25
ENCODER_PULSE 24
EC_PME#
R173
100K_0402_5%
ACIN
ECAGND
2
1
C240 0.01U_0402_16V7K
BUTTON_ID
18,28,30
RB751V_SOD323
BATT_TEMPA 31
BUTTON_ID 28
BATT_OVP 32
ALI/MH# 31,32
SKU_ID
AD_BID0
1
R344
DAC_BRIG
BT_PWR
IR EF
EN_DFAN1
1
C248
DAC_BRIG 16
BT_PWR 27
IREF
32
EN_DFAN1 4
PWROK 7,18
2
100K_0402_5%
2
0.22U_0603_10V7K
ADP_I
32
EN_DFAN1
B
R512
1M_0402_5%
POWER_LED#
WL_BT_LED#
HDD_LED#
BATT_CHG_LOW_LED#
BATT_FULL_LED#
CB_PW R_OK
R365
SPK_SELR368
R604
R605
1
1
1
1
POWER_LED# 28
WL_BT_LED# 28
HDD_LED# 28
BATT_CHG_LOW_LED# 28
BATT_FULL_LED# 28
VGATE 14,18,36
R527
NSE_DPR 23
2
1
10K_0402_5%
SPK_SEL_CODEC 23
SPK_SEL_SB 18
EC_THERM# 18
RSMRST#
E51_RXD
E51_TXD
E51_RXD 29
E51_TXD 29
CRY2
CRY1
+S1_VCC
FAN_SPEED1 4
2 4.7K_0402_5%
2 4.7K_0402_5%
2 0_0402_5%
2@ 0_0402_5%
CRY1
1 R204
2 CRY2
@ 20M_0603_5%
1 C332
1
R181
2
100K_0402_5%
2
KB910Q B4_LQFP176
1 C324
17
35
46
122
137
167
+3VALW
0.1U_0402_16V4Z
1
BT_DETACH
PBTN_OUT#
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
110
111
114
115
116
117
Wake Up
+3VALW
SKU_ID 0:10(10E)
1:10C
2:10G
3:10GC
4:10J(10EJ)
5:10CJ
6:10GJ
7:10GCJ
+3VALW
SKU_ID
2
1
R343
100K_0402_5%
1
2
R342 GM@ 0_0402_5%
BUTTON_ID
2
R340
1
100K_0402_5%
AD_BID0
2
R141
1
R142
1
100K_0402_5%
2
8.2K_0402_5%
*
5
X2
10P_0402_50V8J
KB_CLK
KB_DATA
PS_CLK
PS_DATA
@ 2.2K_0402_5%
8
7
6
5
2
26
29
30
44
76
172
176
28
1
2
3
4
GPWU0
GPWU1
GPWU2
GPWU3
Pin
GPWU4
GPWU5
TIN1/GPWU6
TIN2/FANFB2/GPWU7
KSO17
IN
RP27
Pulse
R672
KSO17
OUT
+5VS
GPOW0/PWM0
GPOW1/PWM1
FAN2PWM/GPOW2/PWM2
GPOW3/PWM3
Width GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6
FAN1PWM/GPOW7/PWM7
32
33
36
37
38
39
40
43
D47A
@ BAV99DW-7_SOT363
NC
IE_BTN#
10K_0402_5%
EC_SMI#
2
10K_0402_5%
EC_PME#
2
10K_0402_5%
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
D47B
@
NC
1
R172
1
R140
1
R420
GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7
71
72
73
74
77
78
79
80
R671
@ 2.2K_0402_5%
+3VALW
C
X-BUS Interface
KBA1
1
R185
KBA4
1
R187
KBA5
1
R194
2
@ 10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
E51CS#/GPIO20/ISPEN
EC_RSMRST# 18
@ MMBT3906_SOT23
10P_0402_50V8J
+3VALW
150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
105
BAV99DW-7_SOT363
10K_0804_8P4R_5%
F RD#
F W R#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
IE_BTN#
EC_TINIT#
FREAD#
FW R#
FSEL#
Q46
RSMRST#
27
27
27
0_0402_5%
2
MODE#
F RD#
SELIO#
FSEL#
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
8
7
6
5
R670
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154
GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8
GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17
1
2
3
4
RP29
1U_0603_10V4Z
+3VALW
C343
RSMRST circuit
Internal Keyboard
18,20,29 SIRQ
LAD0
LAD1
LAD2
LAD3
LFRAME# LPC Interface
LRST#/GPIO2C
LCLK
SERIRQ
CLKRUN#/GPIO0C *
LPCPD#/GPIO0B *
@ ACES_85205-0400
0.1U_0402_16V4Z
14 CLK_PCI_EC
15
14
13
10
9
165
18
7
25
24
ENE-KB910-B4
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
+5VALW
E51_RXD
E51_TXD
17,29 LPC_AD0
17,29 LPC_AD1
17,29 LPC_AD2
17,29 LPC_AD3
17,29 LPC_FRAME#
18,20,29 PCI_RST#
0.1U_0402_16V4Z
GND
GND
GND
GND
GND
GND
@ 33_0402_5%
1
R179 2
VCC
VCC
VCC
VCC
VCC
VCC
VCC
C291
@ 22P_0402_50V8J
2
1
C323
1
2
3
4
1
2
3
4
C299
1000P_0402_50V7K
U13
JP23
KSO[0..15] 28
2
2
0.1U_0402_16V4Z
C263
1000P_0402_50V7K
1
1
For EC Tools
KSI[0..7] 28
KSO[0..15]
+3VALW
159
2
2
0.1U_0402_16V4Z
L16
ECAGND
1
2
FBM-L11-160808-800LMT_0603
C241
to 0 ohm
ECA GND
C303
R157 Change
1
2
0_0603_5%
BATGND
0.1U_0402_16V4Z
1
2
161
0.1U_0402_16V4Z
1
1 C322
1
C320
ADB[0..7] 27
VCCBAT
KBA[0..19] 27
ADB[0..7]
AGND
KBA[0..19]
Ra
Rb
32.768KHZ_12.5P_1TJS125BJ2A251
2006/10/03
Issued Date
Security Classification
Deciphered Date
2009/10/03
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
Title
ENE-KB910
Size
Document Number
R ev
0.3
Sheet
26
of
38
TP CONN.
ACES_85201-0605
4
SW5
SMT1-05_4P
C218
1
SW4
SMT1-05_4P
Right
26
2N7002_SOT23
Q14
BT@
2
G
BT_PWR
Left
R433
1
2
BT@ 100K_0402_5%
2
!!Confirm Pin
Direction
R112
1M_0402_5%
BT@
SM05_SOT23
2
D41
6
5
6
5
C527
68P_0402_50V8K
68P_0402_50V8K
C526
+3VS
C225
0.1U_0402_16V4Z
BT@
+5VS
TP_DATA
TP_CLK
1
2
3
4
5
6
JP5
SWR
SWL
26
26
BlueTooth Interface
+5VS
C130
0.1U_0402_16V4Z
Q15
BT@AO3413_SOT23
1000P_0402_50V7K
BT@
+BT_VCC
BT@
MARU_00-6210-320-340-800_20P
Module ID
Indication for polarity of reset
Reset input High Active --> Low ,
Reset input Low Active --> Open
18
26
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
BT_DET#
BT_DET#
BT_RST#
BT_RST#
26 BT_DETACH
25 WLAN_BT_CLK
18 USB20_P3
18 USB20_N3
25 WLAN_BT_DATA
1MBU22Flash ROM
GND0
GND1
23
39
RESET#
U24A
2
100K_0402_5%
+3VALW
18 SB_INT_FLASH_SEL#
+3VALW
INT_FSEL#
KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
SB_INT_FLASH_SEL#
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
+3VALW
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
+3VALW
R233
@ SUYIN_80065AR-040G2T
1
VCC
WP
SCL
SDA
FWE#
26
INT_FLASH_EN#
2
1 R401
100K_0402_5%
SUSP#
16,23,26,29,34,35
Q22
2N7002_SOT23
EC_FLASH# 18
26
FWR#
A0
A1
A2
GND
1
2
3
4
AT24C16N-10SI-2.7_SO8
2006/10/03
Issued Date
Security Classification
1 R221
2
100K_0402_5%
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
FSEL#
+3VALW
FSEL#
KBA0
SN74LVC32APWLE_TSSOP14
26,31 EC_SMB_CK1
26,31 EC_SMB_DA1
+3VALW
ADB3
ADB2
ADB1
ADB0
FREAD#
R222
100K_0402_5%
U23
2
0.1U_0402_16V4Z
KBA19
KBA10
ADB7
ADB6
ADB5
ADB4
8
7
6
5
SN74LVC32APWLE_TSSOP14
KBA17
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
U24B
2 C360
0.1U_0402_16V4Z
JP30
1
R219
C376
1
2
G
10
11
12
29
38
C358
0.1U_0402_16V4Z
RP#
NC
READY/BUSY#
NC0
NC1
+3VALW
1
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
SST39VF080-70_TSOP40
Bluetooth Connector
14
D0
D1
D2
D3
D4
D5
D6
D7
25
26
27
28
32
33
34
35
CE#
OE#
WE#
31
30
22
24
9
VCC0
VCC1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37
2
1
20K_0402_5%
INT_FSEL#
FREAD#
FWE#
JP7
(Top Contact)
+3VALW
14
FREAD#
+BT_VCC
C671
(MAX=200mA)
22P_0402_50V8J
1
C216
C215
BT@
BT@
BT@
10U_0805_10V4Z
0.1U_0402_16V4Z
2
26
C670
22P_0402_50V8J
BT@ 2
KBA[0..19]
ADB[0..7]
KBA[0..19]
ADB[0..7]
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
26
26
Title
BIOS/TP-PAD/BT
Size
Document Number
Rev
0.3
Sheet
1
27
of
38
+3VALW
ON/OFF
6
5
C406
SW2
SMT1-05_4P
SW3
ON/OFFBTN# 26
51_ON#
51_ON#
KS@
3
30
DAN202U_SC70
SMT1-05_4P
1
Q5
D8
RLZ20A_LL34
C123
0.01U_0402_25V7K
S 2N7002_SOT23
KILL_SW# 25,26
3
1BS003-1211L_3P
2
D34
@ DAN217_SC59
R49
10K_0402_5%
+3VALW
2
G
EC_ON
2
26
R413
1
2
100K_0402_5%
+3VALW
SW1
1
NC
NC
1
2
4
LID_SW# 26
10P_0402_50V8J
GND
C405
0.1U_0402_16V4Z
VDD OUTPUT
Kill SWITCH
100K_0402_5%
D6
LID_SW#
R46
R254
47K_0402_5%
U27
A3212EEH_MLP6
5
ON/OFF BUTTON
+3VALW
6
5
Lid SW
+3VALW
SW/LED Connector
WL&BT LED
+5VALW
KS@
1
HT-191UD_AMBER_0603
WL_BT_LED# 26
10K
D15
2
PWR_LED_0#
SYSON
Q35
2N7002_SOT23
MODEBTN#
23,26,34
2
1
3
2
G
POWER/SUSPEND LED
PWR_SUSPLED1#
SYSON
47K
1
HT-191UD_AMBER_0603
3
S
2
2
KS@300_0402_5%
R414
D35
+5VALW
MODE#
26
IEBTN#
51_ON#
D30
DAN202U_SC70
PWR_SUSP_LED 26
IE_BTN#
26
51_ON#
D31
DAN202U_SC70
D21
1
HT-191NB_BLUE_0603
Q36
DTA114YKA_SOT23
R392 1
2 300_0402_5%
R393 1
2 300_0402_5%
PW R_SUSPLED#
PWR_SUSPLED1#
R399
2
2
300_0402_5%
2
2
120_0402_5%
BATT_CHG_LOW_LED#
1
HT-191UD_AMBER_0603
BATT_CHG_LOW_LED# 26
BATT_FULL_LED#
1
HT-191NB_BLUE_0603
BATT_FULL_LED# 26
+5VALW
D22
SYSON
47K
2
G
HDD LED
10K
R397
2
2
120_0402_5%
1
HT-191NB_BLUE_0603
1
1
1
Q37
HT-191NB_BLUE_0603
2N7002_SOT23
2@ 220P_0402_50V7K
C506 1
2@ 220P_0402_50V7K
PWR_LED_1#
C510 1
2@ 220P_0402_50V7K
KSO17
26
PW R_SUSPLED#
C509 1
2@ 220P_0402_50V7K
IEBTN#
C504 1
KSI0
26
KSI1
26
KSI3
26
KSI2
26
BUTTON_ID 26
2@ 220P_0402_50V7K
MODEBTN#
C502 1
2@ 220P_0402_50V7K
EC_REVBTN#
C489 1
2@ 220P_0402_50V7K
EC_FRDBTN#
C490 1
2@ 220P_0402_50V7K
EC_PLAYBTN#
C500 1
2@ 220P_0402_50V7K
EC_STOPBTN#
C499 1
2@ 220P_0402_50V7K
BUTTON_ID
C810 1
2@ 220P_0402_50V7K
ACES_85201-1205
Q34
DTA114YKA_SOT23
R391 1
2 120_0402_5%
R390 1
2 120_0402_5%
2
2
120_0402_5%
C508 1
ON/OFF
PWR_LED_0#
PWR_LED_1#
ACIN
18,26,30
0_0402_5%
1
USB20_N1
USB20_P1
1
4
L51
R689
+USB_VCCB
JP12
USB20_1N
USB20_1P
0_0402_5%
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
@ WCM2012F2S-900T04_0805
SUYIN_020173MR004G565ZR
@ WCM2012F2S-900T04_0805
18
18
KEYBOARD CONN.
0_0402_5%
+USB_VCCA
18 USB20_N4
18 USB20_P4
4
L50
R688
JP21
1
2
3
4
5
6
7
8
USB20_4N
USB20_4P
0_0402_5%
VBUS
DD+
GND
GND
GND
GND
GND
SUYIN_020167MR004S511ZR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
+USB_VCCB
W=60mils
1
C408 +
150U_D2_6.3VM
C410
0.1U_0402_16V4Z
2
C551 +
150U_D2_6.3VM
1
W=60mils
C409
C232
0.1U_0402_16V4Z
2
1000P_0402_50V7K
C233
1000P_0402_50V7K
+USB_VCCB
U12
+USB_VCCA
+5VALW
U28
USB_EN#
C412
4.7U_0805_10V4Z
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
8
7
6
5
+5VALW
OUT
OUT
OUT
FLG
8
7
6
5
1.4A
NUM_LED#
PADS_LED#
CAPS_LED#
KSO15
KSO14
KSO10
KSO11
KSO8
KSO9
KSO13
KSI7
KSO3
KSO7
KSO12
KSI4
KSI6
KSI5
KSO6
KSO5
KSI3
KSI0
KSO0
KSO1
KSI1
KSI2
KSO2
KSO4
R88
1
300_0402_5%
NUM_LED# 26
PADS_LED# 26
CAPS_LED# 26
+3VS
2
R91
1
300_0402_5%
+3VS
1
R90
2
300_0402_5%
+3VS
KSO[0..15]
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
1PADS_LED#
C193
1 KSO14
C191
1 KSO11
C189
1 KSO9
C187
KSI7
1
C185
1 KSO7
C183
KSI4
1
C181
KSI5
1
C179
1 KSO5
C196
KSI0
1
C201
1 KSO1
C199
KSI2
1
C176
1 KSO4
C174
KSI[0..7]
26
KSO[0..15] 26
NUM_LED# 1
C194
CAPS_LED# 1
C195
KSO15
1
C192
KSO10
1
C190
KSO8
1
C188
KSO13
1
C186
KSO3
1
C184
KSO12
1
C182
KSI6
1
C180
KSO6
1
C178
KSI3
1
C198
KSO0
1
C200
KSI1
1
C177
KSO2
1
C175
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
ACES_88170-3400
G528_SOP8
C816
1.4A
Close to JP12
2
GND
IN
IN
EN#
G528_SOP8
C817
1
C245
1
4.7U_0805_10V4Z
USB_EN#
0.1U_0402_16V4Z
1
2
3
4
+5VALW
25,26
0.1U_0402_16V4Z
USB_EN#
1
2
3
4
KSI[0..7]
JP6
+USB_VCCA
2
G
R400
D18
1
POWER_LED# 26
HDD_LED# 26
AC IN LED
+5VALW
D19
+5VS
Q33
2N7002_SOT23
1
R398
PWR_LED_1#
PW R_SUSPLED#
ON/OFF
IEBTN#
KSO17
MODEBTN#
EC_PLAYBTN#
EC_STOPBTN#
EC_FRDBTN#
EC_REVBTN#
BUTTON_ID
1
2
3
4
5
6
7
8
9
10
11
12
D16
+5VALW
KSO17
JP3
Close to JP21
2006/10/03
Issued Date
Security Classification
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Title
USB/LID/KS/KB/LED/SW-B Conn
Size
Document Number
Rev
0.3
Sheet
1
28
of
38
LPC_AD0 17,26
10
CLK_PCI_SIO2
CLK_PCI_SIO2 14
H8
H_C276BC157D157
H25
H_S315D118
@
@
M1
M3
H_O150X126D150X126N H_C59D59N
M7
H_C122D122N
H18
H_C295D165
M4
H17
H_O276X177D276X177N H_C169D169N
C711
2 1
@
1
DEBUG_PAD
1
@
H4
H21
H_S394BS315D118 H_S315D118
H16
H_C276BC157D157
@
@
R537
H15
H_C295D165
LPC_AD0
H2
H_C256D126
H11
H_C256D126
LPC_FRAME#
LPC_AD2 17,26
H_C157BC276D157
H22
17,26 LPC_FRAME#
LPC_AD2
H19
H_C295D165
LPC_AD1
10_0402_5% 10P_0402_50V8J
FD4
FD6
FD5
@
1
@
CF4
CF8
1
@
FD2
@
CF2
1
@
1
@
FD1
FD3
CF7
17,26 LPC_AD1
LPC_AD3
PCI_RST# 18,20,26
17,26 LPC_AD3
1
R505
0_0402_5%
LPC_DRQ#1 17
H7
H_C276D197
H13
H14
H_R354BR354X315D118 H_C295D165
SIRQ
2 LPC_DRQ#1
R504
0_0402_5%
PCI_RST#
1
H26
H_S315D118
H28
H_S315D118
18,20,26 SIRQ
H27
H_S315D118
E51_TXD 26
E51_RXD
R502
@ 0_0402_5%
2 E51_TXD
26
H30
+3VALW
R503
@ 0_0402_5%
E51_RXD
1
2
H5
H_C157BC276D157
H_S394BS315D118
H24
H3
H_S315D118
H1
H_S315D118
H10
H_S315D118
CF1
1
@
CF5
1
@
CF10
1
@
1
@
CF3
CF9
1
@
1
@
H42
H_C236BC256D118
@
1
H32
H_C256BC160D157
@
1
@
1
@
1
H38
H31
H_C315D315N H_C256BC160D157
H33
H40
H41
H_C276BC157D157 H_R354x315D118 H_S315D118
@
H37
H_C256D126
H36
H_C197D91
@
1
@
1
H35
H_C197D91
H44
H34
H_C236BC160D157 H_C197D91
+1.8V
+1.8VS
S
2N7002_SOT23
2
G
C316
SUSP
S
2N7002_SOT23
1
SUSP
SUSP
Q66
2
G
PM@
2N7002_SOT23
C355
10U_0805_10V4Z
D
D
D
D
1
2
3
4
S
S
S
G
AO4422_SO8
Q2
10U_0805_10V4Z
RUNON
C335
R339
470_0805_5%
2
D
SUSP
2
G
2N7002_SOT23
C346
S PM@
1.8VS_ON
R615
PM@
0.1U_0402_16V4Z
U21
8
7
6
5
470_0805_5%
PM@
2
G
2N7002_SOT23
1 R614
2
PM@ 0_0402_5%
+3VS
R26
Q32
R513
0_0402_5%
+3VALW
C33
PM@
10U_0805_10V4Z
2 PM@
2
R613
820K_0402_1%
PM@
RUNON
C32
470_0805_5%
1
2
3
4
AO4456_SO8
PM@
+VSB
R218
S
S
S
G
C345
D
D
D
D
0.033U_0603_25V7K
C349
10U_0805_10V4Z
8
7
6
5
C29
10U_0805_10V4Z
PM@
AO4422_SO8
Q20
2
G
1
2
3
4
1 R196
D
S
S
S
G
0.1U_0402_16V4Z
D
D
D
D
0.033U_0603_25V7K
SUSP
R195
C317
10M_0402_5%
2
1
340K_0402_1%
2
1
+VSB
8
7
6
5
10U_0805_10V4Z
U19
1
0.1U_0402_16V4Z
U3
+5VS
10M_0402_5%
2
1
+5VALW
Q31
C813
PM@
Discharge Circuit
+2.5VS
+1.5VS
+VCCP
+0.9VS
+5VALW
1
470_0805_5%
470_0805_5%
470_0805_5%
470_0805_5%
10K_0402_5%
2
G
S
SUSP
SUSP
SUSP
35
Security Classification
Q18
2
G
Q7
2N7002_SOT23
SUSP
2
G
SUSP
Q11
2N7002_SOT23
2
G
Q8
2N7002_SOT23
SUSP
2N7002_SOT23
Q1
R184
R70
2
G
S
1
R93
R72
R27
2
1
2N7002_SOT23
SUSP#
16,23,26,27,34,35
2006/10/03
Issued Date
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Title
Size
Document Number
Rev
0.3
Sheet
29
of
38
VS
VIN
DC_IN_S2
PR2
5.6K_0402_5%
2
PACIN
LM393M_SO8
32,33
2
1
PR8
10K_0402_1%
Vin Detector
RTCVREF
3.3V
PD2
RLS4148_LLDS2
N1
PR10
68_1206_5%
1
2
PR11
1K_1206_5%
PR9
68_1206_5%
PQ1
TP0610K-T1-E3_SOT23
PR12
200_0603_5%
CHGRTCP 1
2
VS
PD4
2
VIN
PC8
0.1U_0603_25V7K
N3
RLS4148_LLDS2
1
2
PR13
1K_1206_5%
B+
2
PC7
0.22U_1206_25V7K
PR14
100K_0402_1%
2
PR15
22K_0402_1%
51_ON#
PACIN
PD3
2
RLS4148_LLDS2
28
18,26,28
PR7
10K_0402_1%
PD1
RLZ4.3B_LL34
ACIN
PC6
0.1U_0402_16V7K
VIN
BATT+
PR4
10K_0402_1%
1
2
PU1A
PC5
0.068U_0402_10V6K
PR6
20K_0402_1%
@ SINGA_2DW-0005-B03
PR5
22K_0402_1%
1
2
1
PC4
100P_0402_50V8J
PC3
1000P_0402_50V7K
PC2
100P_0402_50V8J
PC1
1000P_0402_50V7K
2
3
VS
PR3
84.5K_0402_1%
1
1
7A_24VDC_429007.WRML
PJP1
DC_IN_S1
PF1
DC301001M80
PR1
1M_0402_1%
1
2
VIN
PL1
FBMA-L18-453215-900LMA90T_1812
1
2
1
2
PR16
1K_1206_5%
2
2
PC13
1000P_0402_50V7K
1 VL
PR23
34K_0402_1%
PR25
66.5K_0402_1%
PC12
1000P_0402_50V7K
RB715F_SOT323
PR24
499K_0402_1%
PR26
191K_0402_1%
PC11
1000P_0402_50V7K
ACON
32
31,33 MAINPWON
PU1B
LM393M_SO8
PD6
PD5
RLZ16B_LL34
PC10
1U_0805_25V4Z
1
2
1
2
GND
PC9
10U_0805_10V4Z
PR20
499K_0402_1%
N2
IN
OUT
PR19
2.2M_0402_5%
2
1
3.3V
PR18
100K_0402_1%
1
2
VL
PR17
200_0603_5%
PU2
G920AT24U_SOT89
2
PR22
560_0603_5%
1
2
+CHGRTC
PR21
560_0603_5%
1
2
RTCVREF
PJ2
2
+3VALW
Precharge detector
15.97V/14.84V FOR
ADAPTOR
+5VALW
+VSB
PACIN
PQ3
DTC115EUA_SC70
2
+2.5VS
+5VALWP
@ JUMP_43X39
@ JUMP_43X39
PR27
47K_0402_1%
2
2
1
RHU002N06_SOT323
G
PJ4
+2.5VSP
PJ5
2
PQ2 D
@ JUMP_43X118
JUMP_43X118
+1.8V
PJ3
2
@
@ JUMP_43X118
PJ15
2
1 1
JUMP_43X118
+3VALWP
+1.8VP
PJ1
2
PJ6
+0.9VS
@ JUMP_43X79
PJ7
+1.05VSP
+VCCP
@ JUMP_43X118
PJ8
+1.5VSP
+1.5VS
@ JUMP_43X118
Issued Date
Security Classification
2006/10/03
Deciphered Date
2009/10/03
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Document Number
Rev
0.3
Sheet
30
of
38
VL
2
VL
PR33
1K_0402_1%
PC15
1000P_0402_50V7K
PR32
13.7K_0402_1%
1
2
PC16
0.01U_0402_25V7K
TM_REF1
LM393M_SO8
PQ4
DTC115EUA_SC70
PD7
1SS355_SOD323
VL
PR37
100K_0402_1%
PR39
100K_0402_1%
2
+3VALWP
PC18
1000P_0402_50V7K
PR36
20K_0402_1%
2
2
PR38
6.49K_0402_1%
2
1
PC17
0.22U_0805_16V7K
ALI/MH# 26,32
PR34
100_0402_5%
PU3A
O
@ SUYIN_250005MR007G132ZR
PR35
100_0402_5%
MAINPWON 30,33
1
PR31
47K_0402_1%
1
2
8
+3VALWP
PR28
47K_0402_1%
1
PC14
0.1U_0603_25V7K
2
PR30
47K_0402_1%
PH1
100K_0603_1%_TH11-4H104FT
BATT+
ALI/NIMH#
AB/I
TS_A
EC_SMDA
EC_SMCA
2
3
4
5
6
7
PL2
FBMA-L18-453215-900LMA90T_1812
1
2
ID
B/I
TS
SMD
SMC
GND
PR29
1K_0402_1%
1
2
BATT_S1
BATT+
PF2
12A_65VDC_451012
1
2
PJP2
VMB
1
PR40
1K_0402_1%
BATT_TEMPA 26
EC_SMB_DA1 26,27
EC_SMB_CK1 26,27
VL
VL
PR42
47K_0402_1%
1
2
PR48
0_0402_5%
2
S PQ6
RHU002N06_SOT323
O
4
PR44
22K_0402_1%
PU3B
7
LM393M_SO8
PD8
1SS355_SOD323
PC19
0.22U_0805_16V7K
PC21
0.1U_0603_25V7K
2
2
1
2
2
G
POK
PC22
0.1U_0402_16V7K
1
2
PR47
100K_0402_1%
33
PC20
0.22U_1206_25V7K
PR46
22K_0402_1%
1
2
2
1
PR45
100K_0402_1%
VL
+VSBP
TM_REF1
B+
PR43
10.7K_0402_1%
1
2
PQ5
TP0610K-T1-E3_SOT23
PR41
47K_0402_1%
PH2
100K_0603_1%_TH11-4H104FT
Issued Date
Security Classification
2006/10/03
Deciphered Date
2009/10/03
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Document Number
Rev
0.3
Sheet
31
of
38
Iadp=0~3.125A
P2
1
PR54
100K_0402_1%
-INC2
+INC2
24
OUTC2
GND
23
CS
22
-INE2 VCC(o)
21
+INE2
PC27
0.022U_0402_16V7K
1
2
CS
4
PR53
10K_0402_1%
PQ11
AO4407_SO8
ACOFF#
1
S
PR64
10K_0402_1%
2
1
18
-INE1
RT
17
+INE1
-INE3
16
10
OUTC1
FB3
15
11
OUTD
CTL
14
12
-INC1
+INC1
13
PC36
0.1U_0402_16V7K
5
6
7
8
PR65
47K_0402_1%
1
2
ACON
PL3
16UH_D104C-919AS-160M_3.7A_20%
1
2
1
1
CC=0.6~3A
CV=12.6V(6 CELLS LI-ION)
CV=16.8V(8 CELLS LI-ION)
2
BATT+
2
2
PC35
1500P_0402_50V7K
PD14
@ EC31QS04
PR63
0.02_2512_1%
PC37
4.7U_1206_25V6K
PD10
EC31QS04
2
IREF=1.31*Icharge
IREF=0.6V~3.144V
1
2
PC34
0.1U_0603_25V7K
1
2
PR60
68K_0402_5%
PR66
100K_0402_1%
ACON
ACON
LX_CHG
1
2
PC31
0.1U_0603_25V7K
1
2
PR61
162K_0402_1%
VCC
26
IREF
RHU002N06_SOT323
FB1
19
ACOFF
PQ13
DTC115EUA_SC70
PC39
4.7U_1206_25V6K
26
VH
DH_CHG
VREF
20
PQ15
2
G
PACIN 1
2
PR62
3K_0402_1%
PACIN
OUT
PC33
1000P_0402_50V7K
PD9
1SS355_SOD323
FB2
PC28
0.1U_0603_25V7K
2
2
PC32
0.1U_0402_16V7K
PC30
4700P_0402_25V7K
PR59
1K_0402_1%
1
2 1
2
ACOFF#1
PR57
10K_0402_1%
2 1
2
1
PR56
10K_0402_1%
PR58
150K_0402_1%
PR55
30K_0402_1%
PC29
0.1U_0402_16V7K
VIN
PQ10
DTA144EUA_SC70
RHU002N06_SOT323
3
PR52
47K_0402_1%
1
2
PU4
ADP_I
26
3
2
1
1
2
47K
PC26
0.1U_0603_25V7K
PQ12
DTC115EUA_SC70
30
47K
30,33
PC25
4.7U_1206_25V6K
PR50
200K_0402_1%
PC24
4.7U_1206_25V6K
8
7
6
5
PC138
330P_0402_50V7K
B++
PC23
4.7U_1206_25V6K
PC137
330P_0402_50V7K
PR49
0.02_2512_1%
PL12
FBMA-L18-453215-900LMA90T_1812
1
2
8
7
6
5
4
1
2
3
1
2
3
PQ14
2
G
PQ7
AO4407_SO8
1
2
3
PQ9
AO4407_SO8
8
7
6
5
PR51
47K_0402_1%
2
B+
P3
PQ8
AO4407_SO8
VIN
PC38
4.7U_1206_25V6K
MB3887PFV-ERE1_SSOP24
ISE_CHG+
+3VALWP
CS
4.2V
2
PQ16
DTC115EUA_SC70
PR67
150K_0603_0.1%
1 RHU002N06_SOT323
2
1
PR68
300K_0603_0.1%
PQ17
PR69
47K_0402_1%
PR70
300K_0603_0.1%
FSTCHG
VL
PR71
100K_0402_1%
PQ18
DTC115EUA_SC70
26
26,31
ALI/MH#
VMB
BATT Type
ALI/MH#
Charge Current
IREF
PQ19
DTC115EUA_SC70
8 CELL
0V
3A
3.144V
6 CELL
3.3V
3A
3.144V
OVP voltage : LI
4S2P : 18V--> BATT_OVP= 2V
PR72
340K_0402_1%
(BAT_OVP=0.1111 *VMB)
1 2
PR75
105K_0402_1%
PC40
0.01U_0402_25V7K
4
LM358DT_SO8
G
4
1
2
PR74
2.2K_0402_5%
PU5A
3
26 BATT_OVP
PR73
499K_0402_1%
Issued Date
Security Classification
2006/10/03
Deciphered Date
2009/10/03
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
CHARGER
Size
Date:
Document Number
Rev
0.3
Sheet
32
of
38
+3.3VALWP/+5VALWP
BST_3V
2
BST_5V
PD11
DAP202U_SOT323
B+++
5
6
7
8
D
D
D
D
PC42
4.7U_1206_25V6K
2
1
G
S
S
S
4
3
2
1
5
6
7
8
PR76
47_0402_5%
D
D
D
D
G
S
S
S
4
3
2
1
2
PC52
0.1U_0603_25V7K
2
1
PR81
200K_0402_1%
1
2
BST_3V-1 2 PR86
1
DH_3V-1 0_0603_5%
DL_3V
PL5
4.7U_LF919AS-4R7M-P3_5.2A_20%
2
LX_3V
FB3
+3VALWP
2
31
MAX8734AEEI+_QSOP28
PR93
0_0402_5%
PR91
6.81K_0402_1%
7
2
PR85
0_0603_5%
1
1
FB3
PGOOD
ILIM5
28
26
24
27
22
PR84
340K_0402_1%
2
11
BST3
DH3
DL3
LX3
OUT3
PR80
200K_0402_1%
1
2
ILIM5
PR83
340K_0402_1%
2
17
VCC
13
PC50
1U_0603_6.3V6M
PR78
2
1
10_1206_5%
PC48
0.1U_0603_25V7K 1
2
1
20
TON
ILIM3
1
PR95
2
1
+
PC55
150U_V_6.3VM_R18
PC58
0.047U_0603_16V7K
ILIM3
PQ22
SI4810BDY-T1-E3_SO8
PR96
0_0402_5%
2
1
PR188
0_0402_5%
806K_0603_1%
2VREF_8734
POK
DH_3V
PR94
10K_0402_1%
REF
PQ20
SI4800BDY-T1-E3_SO8
PRO#
SKIP#
LDO3
12
2VREF_8734
18
SHDN#
ON5
ON3
VL
30,31 MAINPWON
6
4
3
25
PR89
1
2
@ 10K_0402_1%
PACIN
LX5
DL5
OUT5
FB5
N.C.
23
2
2
30,32
PC56
2
1
47K_0402_1%
RLZ5.1B_LL34
15
19
21
9
1
PC57
1
2
PC54
2.2U_0805_25V6K
PR87
2
PR90
100K_0402_1%
PD12
PR92
6.81K_0402_1%
150U_V_6.3VM_R18
PC53
PR88
10.5K_0402_1%
FB5
PC46
0.1U_0402_16V7K
DH5
LX_5V
DL_5V
VS
BST5
4.7U_0805_6.3V6K
1
2 10
PR82 1 BST_5V-1
14
0_0603_5%
16
V+
PU6
2
LD05
S
S
S
G
PC51
0.1U_0603_25V7K
2
1
PL4
4.7U_LF919AS-4R7M-P3_5.2A_20%
GND
PQ23
SI4810BDY-T1-E3_SO8
0.22U_0603_10V7K
D
D
D
D
8
7
6
5
PC49
4.7U_0805_6.3V6K
2
1
VL
1
2
3
4
PC134
2.2U_0805_25V6K
2
1
PR79
0_0603_5%
DH_5V 1
2
PC47
PR77
2.2U_0805_25V6K
10_1206_5%
2
1
2
1
8
7
6
5
D
D
D
D
S
S
S
G
PQ21
SI4800BDY-T1-E3_SO8
DH_5V-1
+5VALWP
PC41
4.7U_1206_25V6K
2
1
B+++
1
2
3
4
@ JUMP_43X118
B+++
VL
2
PC45
2200P_0402_50V7K
2
1
PC44
4.7U_1206_25V6K
2
1
PC43
4.7U_1206_25V6K
2
1
PJ10
B+
2006/10/03
Issued Date
Security Classification
2009/10/03
Deciphered Date
+5V/+3V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Sheet
1
Rev
0.3
33
of
38
PC139
330P_0402_50V7K
PC62
4.7U_1206_25V6K
PC61
4.7U_1206_25V6K
+5VALWP
PR97
0_1206_5%
1
2
PC60
4.7U_1206_25V6K
PC59
4.7U_1206_25V6K
PL13
FBMA-L18-453215-900LMA90T_1812
B+
1
2
2
1
DH_1.5V-1
PHASE2
25
ISEN2
22
LGATE2
27
G
S
S
S
4
3
2
1
PQ27
SI4810BDY-T1-E3_SO8
20
19
21
16
11
OCSET1
OCSET2
18
DL_1.5V
2
PR112
24K_0402_1%
ISL6227CAZ-T_SSOP28
SUSP#
16,23,26,27,29,35
PR114
@ 0_0402_5%
13
PR110
6.81K_0402_1%
2
VSE_1.5V
1
PR117
100K_0402_1%
PC77
0.1U_0402_16V7K
PR115
10K_0402_1%
PR118
100K_0402_1%
PC76
@ 0.1U_0402_16V7K
PR116
@ 0_0402_5%
PR113
10K_0402_1%
PC74
0.01U_0402_25V7K
PC73
220U_6.3V_M_R13
VOUT2
VSEN2
EN2
PG2/REF
VOUT1
VSEN1
EN1
PG1
PC75
@ 680P_0603_50V8J
4
3
2
1
PGND2
9
10
8
15
DDR
2
PR111
0_0402_5%
PGND1
26
GND
VSE_1.8V
23,26,28 SYSON
PR109
0_0402_5%
PR105
@ 4.7_1206_5%
PR107
2K_0402_1%
1
2
LGATE1
+1.5VSP
LX_1.5V
DL_1.8V
PR103
0_0603_5%
ISE_1.5V
+1.5V
PL7
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2
ISEN1
DH_1.5V-2
PHASE1
ISE_1.8V
PQ25
SI4800BDY-T1-E3_SO8
5
6
7
8
24
D
D
D
D
UGATE2
28
14
UGATE1
PC69
0.1U_0402_16V7K
2
1
PR108
0_0402_5%
BST_1.5V-2
1
PR100
0_0603_5%
5
6
7
8
PR102
0_0603_5%
PQ26
SI4810BDY-T1-E3_SO8
PR106
2K_0402_1%
1
2
23
2 1
1
2
3
4
S
S
S
G
1
PC72
@ 680P_0603_50V8J
PC71
0.01U_0402_25V7K
2
1
PR104
10.2K_0402_1%
2
DH_1.8V-1
BOOT2
BOOT1
D
D
D
D
PC67
0.01U_0402_25V7K
17 2
1
G
S
S
S
8
7
6
5
PR101
@ 4.7_1206_5%
D
D
D
D
PC70
220U_6.3V_M_R13
2BST_1.8V-2 6
PR99
0_0603_5%
SOFT2
VCC
PC68
0.1U_0402_16V7K
2
1
PC66
0.01U_0402_25V7K PU7
12 SOFT1
2
1
VIN
S
S
S
G
DH_1.8V-2
1
2
3
4
PL6
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2 LX_1.8V
BST_1.8V-1
PQ24
SI4800BDY-T1-E3_SO8
+1.8VP
PC65
2.2U_0805_10V6K
BST_1.5V-1
D
D
D
D
+1.8V
PR98
2.2_0603_5%
8
7
6
5
PD13
DAP202U_SOT323
PC64
0.1U_0603_25V7K
PC63
4.7U_0805_6.3V6K
Issued Date
Security Classification
2006/10/03
Deciphered Date
2009/10/03
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
1.8V / 1.5V
Size
Date:
Document Number
Rev
0.3
Sheet
34
of
38
PL14
6269_B+
FBMA-L18-453215-900LMA90T_1812
PHASE_VCCPP
PR119
1K_0402_1%
PR120
1
36
PGD_IN
PC80
1
2
0_0603_5%
0.1U_0603_25V7K
PR121
0_0603_5%
+5VALW
BOOT_VCCPP
VCC
FCCM
EN
LG
11
PGND
10
ISEN
5
6
7
8
D
D
D
D
PC81
2.2U_0603_6.3V6K
LG_VCCPP
SI4800BDY-T1-E3_SO8
UG_VCCPP_2
PL8
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2
+1.05V
PQ29
SI4810BDY-T1-E3_SO8
PC83
220U_D2_4VM_R15
2
1
4
3
2
1
VO
8
2
G
S
S
S
PR127
ISEN_VCCPP
1
8.25K_0402_1%
FSET
ISL6269ACRZ-T_QFN16_4X4
FB
PC84
0.1U_0402_16V7K
PR126
24K_0402_1%
COMP
SUSP#
16,23,26,27,29,34 SUSP#
+1.05VSP
1
PR187
@4.7_1206_5%
D
D
D
D
G
S
S
S
12
1
2
PC82
PR124
2.2U_0603_6.3V6K
@ 0_0402_5%
PR125
0_0402_5%
1
2
PQ28
1 PR123 2 6269_VCC
4.7_0603_5%
4
3
2
1
BOOT
PVCC
6269_VCC
13
14
UG
PHASE
VIN
PGOOD
GND
1
15
PU8
16
17
PR122
0_0603_5%
PC79
10U_1206_25VAK
UG_VCCPP_1
5
6
7
8
1
2
PC78
10U_1206_25VAK
PC140
680P_0402_50V7K
6269_VCC
B+
PC136
@680P_0603_50V8J
1
2
57.6K_0402_1%
PC85
0.01U_0402_25V7K
PC87
6800P_0402_25V7K
PR130
2.26K_0402_1%
1
2
PR128
49.9K_0402_1%
PR129
1
2
PC86
22P_0402_50V8J
PR131
3K_0402_1%
PJ13
@ JUMP_43X79
+1.8V
VIN
VCNTL
GND
NC
VREF
NC
VOUT
NC
TP
+3VALW
B
PR132
1K_0402_1%
PC89
1U_0603_6.3V6M
2
1
PC132
0.1U_0402_16V7K
PC92
10U_1206_6.3V7K
PC95
2
2
1
0.01U_0402_25V7K
PC96
@ 150U_D_6.3VM
RHU002N06_SOT323
2006/10/03
Issued Date
Security Classification
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
S
RHU002N06_SOT323
PR137
1K_0402_1%
PQ37
GND
PC97
2.15K_0402_1%
2
G
+0.9VSP
+2.5VSP
PR136
VIN
PC91
0.1U_0402_16V7K
PR133
1K_0402_1%
PR186
11K_0402_1%
1
2
SUSP
FB
APL5912-KAC-TRL_SO8
29
EN
VOUT
PC98
@ 0.01U_0402_25V7K
VOUT
PC93
@ 0.1U_0402_16V7K
PC94
22U_1206_6.3V6M
@ 0_0402_5%
SUSP#
1
2
22U_1206_6.3V6M
POK
VIN
7
PR135
VCNTL
PU10
PQ30
2
G
PR134
0_0402_5%
1
2
SUSP
1U_0603_6.3V6M
APL5331KAC-TRL_SO8
PC90
PJ14
@ JUMP_43X79
+5VALW
PC88
10U_1206_6.3V7K
+3VALW
PU9
Title
Document Number
Rev
0.3
Sheet
35
of
38
PR184 1K_0402_1%
VCC_PRM
PC130
0.22U_0603_10V7K
1
2
1
2
1
2
PC102
10U_1206_25VAK
2
1
PR157
10K_0402_1%
2
1
1
2
PR156
PR155
3
2
1
1 2
2
1
2
0.22U_0603_10V7K
2.61K_0402_1%
PR185 4.42K_0402_1%
PC129 0.1U_0402_16V7K
1
2
ISEN2
+CPU_B+
10KB_0603_5%_ERTJ1VR103J
PH4
11K_0402_1%
@ 20_0402_5%
PC120
1
2
PR180
1
2
PR181 0_0402_5%
PC128 180P_0402_50V8J
1
2
PR182
PR183
VSSSENSE
1_0402_5%
PR170 @ 0_0603_5%
1
2
VSUM
IRF8113PBF_SO8
PR169
VSUM
PC127
0.018U_0603_50V7J
@ 20_0402_5%
5
3
2
1
1
2
PC126
0.018U_0603_50V7J
PR179
0_0402_5%
+CPU_CORE 1
PC125 0.018U_0603_50V7J
1
2
PR178
VCCSENSE
IRF8113PBF_SO8
PC124
0.1U_0603_25V7K
PR177 1.82K_0402_1%
5
+5VS
PC118
680P_0603_50V8J
PL11
VCC_PRM
PC123 470P_0402_50V7K
1
2
PR1751
PR171 1_0603_5%
PC121
1U_0402_6.3V4Z
PR176
10_0603_5%
1
2
1
3.4K_0402_1%
1
2
B
@ 0_0402_5%
390P_0402_50V7K
PQ36
4
ISEN1
ISEN2
2
5
6
7
8
PQ35
PU11
3
2
1
ISEN1
24
ISEN2
2
PR165
6.8_1206_5%
25
PC112
10U_1206_25VAK
NC
0.36UH_MPC1040LR36_24A_20%
PR168
26
UGATE_CPU2-2
BOOT2
PHASE_CPU2
PR162
UGATE_CPU2-1 1
2
1_0603_5%
BOOT_CPU2
1
2
1
2
PR164
0_0603_5%
PC115
0.22U_0603_10V7K
3
2
1
UGATE2
27
5
6
7
8
29
28
5
6
7
8
PGND2
PHASE2
LGATE_CPU2
+CPU_B+
PR167
10K_0402_1%
2
1
30
PQ34
SI7840DP-T1-E3_SO8
LGATE2
+CPU_CORE
PR158
1_0402_5%
IRF8113PBF_SO8
3.65K_0805_1%
PVCC
IRF8113PBF_SO8
PL10
LGATE_CPU1
32
31
PR173
@ 0_0402_5%
PR174
PC141
3300P_0402_50V7K
PR159 @ 0_0603_5%
1
2
PC110
1
2
VCC_PRM
ISEN1
0.22U_0603_10V7K
VSUM
PC111
10U_1206_25VAK
2
1
LGATE1
3.65K_0805_1%
PHASE_CPU1
33
PC117 47P_0402_50V8J
PR172 61.9K_0402_1% PC119 0.033U_0402_16V7K
1
2
2
1
PC99
220U_25V_M
2
0.36UH_MPC1040LR36_24A_20%
2
1
6.8_1206_5%
680P_0603_50V8J
34
PGND1
1 2
PHASE1
PC109
UGATE_CPU1-1
3
2
1
UGATE1
35
VID0
36
23
VDD
22
GND
FB2
21
12
VIN
FB
20
COMP
11
VSUM
10
PC101
10U_1206_25VAK
2
1
37
38
VID1
VID2
VID3
VID4
VID5
VID6
VR_ON
PQ32
PQ33
BOOT1
ISL6262CRZ-T_QFN48
19
VW
VO
OCSET
DFB
13
SOFT
18
1
2
1000P_0402_50V7K PC116
PR166 4.42K_0402_1%
1
2
17
13K_0402_1%
1
2
NTC
DROOP
@ 100K_0603_1%_TH11-4H104FT
1
2
@ 0.015U_0402_16V7K
PC113
0.022U_0603_25V7K PC114
1
2
16
PC122
PC100
10U_1206_25VAK
1
1
1
2
PR148
PR147
PR146
39
40
41
5
6
7
8
VR_TT#
DPRSLPVR
DPRSTP#
CLK_EN#
3V3
GND
RBIAS
RTN
2 1
PR163
PGD_IN
B+
PC135
680P_0603_50V8J
5
CPU_VID2
5
CPU_VID1
5
CPU_VID0
5
26
CPU_VID3
CPU_VID4
PR145
PR144
PR142
PR143
42
44
43
46
45
47
49
1
2
1_0603_5%
PR154
PH3
15
VR_TT#
@ 4.22K_0402_1%
1
0.22U_0603_10V7K
PC108
2 1
2
0_0603_5%
PR151
BOOT_CPU1 1
3
2
1
PR160 147K_0402_1%
1
2
PSI#
VSEN
PR161
C
PGD_IN
VDIFF
35
H_PSI#
14
PGOOD
UGATE_CPU1-2 4
PC107
1U_0603_6.3V6M
14,18,26 VGATE
PC104
2.2U_0603_6.3V6K
PL9
FBMA-L18-453215-900LMA90T_1812
1
2
1
PQ31
SI7840DP-T1-E3_SO8
499_0402_1%
1.91K_0402_1%
PR153
PR152
+3VS
0_0402_5%
2
0_0402_5%
2
48
PR150
1
PC103
0.022U_0402_16V7K
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
PR141
1
14 CLK_ENABLE#
0_0402_5%
2
PR149
PR140
1
4,17 H_DPRSTP#
+3VS
CPU_VID5
PR139 499_0402_1%
1
2
7,18 DPRSLPVR
+CPU_B+
PR138
1_0603_5%
CPU_VID6
VR_ON
+5VS
PC131 0.22U_0402_6.3V6K
2
1
2006/10/03
Issued Date
Security Classification
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
+CPU_CORE
Size Document Number
Custom
Date:
Rev
0.2
Sheet
36
of
38
FOR ISPD
LAN
U5
NO DATE
PAGE MODIFICATION LIST
PURPOSE
--------------------------------------------------------------------------------------------------------------------1
0803
23 CHANGE Q25,Q44,R252,R499 TO RESERVED
TO COMPATIBLE WITH NORMAL OPEN AUDIO JACK
CHANGE R611,R612 TO POP
2
0810
23 CHANGE C792,C793 TO RESERVE AND MOVE TO PAGE 23
TO RESERVE HP PATH FOR ALC268
ADD C811 BETWEEB AMP_LHPIN AND 861_HP_L
TO CHANGE HP PATH FOR ALC861
ADD C812 BETWEEB AMP_RHPIN AND 861_HP_R
3
0814
23 ADD R618_1K_0402 BETWEEN Q23.2 AND R240.2
TO BYPASS BEEP SOUND BEFORE CODEC INITIAL
24 ADD CONNECTION BEEP_MIX FROM Q23.2 TO Q67.2
ADD CONNECTION EAPD TO Q67.3
CONNECT Q67.1,R616.1,C815.1 TOGETHER
PULL HIGH R616_20K_0402 TO +VDDA
CONNECT C815.2, R599.2 TOGETHER
REMOVE Q65
RESERVE C814 BETWEEN AMP_SD# & GND
4
0816
14 CHANGE R121,R506,R99 TO 39_0402
FOR EMI REQUEST
5
0816
15 CHANGE L1,L2,L3 TO 120OHM BEAD
FOR EMI REQUEST
6
0816
28 CHANGE U12,U28 FROM G528 TO G548
FOR INCREASE USB PORT CURRENT RATING
25 CHANGE U42 FROM G528 TO G548
RTL8101E
100M@
U30
TRANSFORMER
NS892404
100M@
2.49K_0402_1%
1000M@
ZZZ1
PCB
PCB ZKU LA-3401P REV0
U31
Card BUS
4512
4512@
U16
SB
ICH7
ICH7R1@
R285
NO DATE
PAGE MODIFICATION LIST
PURPOSE
--------------------------------------------------------------------------------------------------------------------1
0919
16 CONNECT INVPWR_B+ TO JP1.26
INCREASE 1 MORE B+ PIN FOR SUPPORT 2 LAMP LCD
2
0919
23 CONNECT R673_20K_0402 PULL DOWN ON SENSE_B
TO SENSE INTERNAL MIC EXIST OR NOT
3
0919
04 CHANGE U48 TO PU5
TO COST DOWN 1 OP AMP
4
0919
26 RESERVE Q46,D47,R671 FOR RSMRST# SIGNAL
TO MEET INTEL REQUIREMENT
5
0919
23 CHANGE R253 TO RESERVE
TO CHANGE HEADPHONE SENSE PIN FROM SENSE_A TO SENSE_B
CONNECT R620 BETWEEN Q25.1,SENSE_B
6
0919
23 ADD R676,R677 TO 20OHM
FIX MONO HEADPHONE NOISE ISSUE
7
0926
23 CHANGE C811,C812,C792,C793 TO 2.2uF
IMPROVE HP FREQENCE RESPONSE
8
0926
24 DEL R520,R521,C681,C683 CHANGE C790,C791 TO 0.22uF
CHNAGE SPEAKER HIGHPASS -3dB POINT TO 100HZ
9
0926
24 CHANGE C804 TO 2.2uF
IMPROVE CHARGE PUMP QUALITY
10 0926
24 DEL R616,R617,R599,C815 ADD C819
NOT TO USE AMP BEEP FUNCTION
11 0926
24 ADD Q67
IMPROVE BOOT BO SOUND
12 0926
24 CHANGE C596 TO 22uF
IMPROVE FAN NOISE
13 0926
24 ADD D48
IMPROVE ESD
14 1003
22 ADD R678,R679,RESERVE L45
ADD R680,R681,RESERVE L46
FOR EMI REQUIREMENT
ADD R682,R683,RESERVE L47
ADD R684,R685,RESERVE L48
ADD NET RJ45_MIDI0+_L,RJ45_MIDI0-_L BETWEEN L45,JP11
RJ45_MIDI1+_L,RJ45_MIDI1-_L BETWEEN L46,JP11
RJ45_MIDI2+_L,RJ45_MIDI2-_L BETWEEN L47,JP11
RJ45_MIDI3+_L,RJ45_MIDI3-_L BETWEEN L48,JP11
25 ADD R686,R687,RESERVE L49
FOR EMI REQUIREMENT
ADD NET USB20_5P,USB20_5N BETWEEN L49,JP24
28 ADD R688,R690,RESERVE L50
ADD R689,R691,RESERVE L51
RESERVE FOR USB EMI SOLUTION
ADD NET USB20_1N,USB20_1P BETWEEN L51,JP12
USB20_4N,USB20_4P BETWEEN L50,JP21
U6
U6
U6
945GM
GMR3@
945GM
GMR1@
945PM
PMR1@
NB
R342
SKU ID
18K_0402_5%
PM@
PJP1
DC-JACK
B
SINGA_2DW-0005-B03
45@
CRT EMI
SOLUTION
C22
C20
C17
10P_0402_50V8J
PM@
10P_0402_50V8J
PM@
10P_0402_50V8J
PM@
2006/10/03
Issued Date
Security Classification
2009/10/03
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
ISPD
Size
Document Number
Rev
0.3
Sheet
37
of
38
DVT
Modify list
35
Change +1.05V IC
36
32,34,
35,36
Add PL12,PL13,PL14(SM010020720);PC137,PC138,PC139(330p_SE074331K80);PC140(680p_SE074681K80);PC141(3300p_SE074332K80)
33
36
31
PVT
Issued Date
Security Classification
2006/10/03
Deciphered Date
2009/10/03
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
+CPU_CORE
Size Document Number
Custom
HAWAA(LA3141)
Date:
R ev
0.3
Sheet
38
of
38