8085 Chapter9
8085 Chapter9
8085 Chapter9
8-6.
What is the total number of bits that can be stored in the following RAM rations? ' (a) 1K X 8 (b) 4K x 4 (c) 8KX 8 (d) 16K x 1 Design and sketch a 1K X 8 RAM memory system using two 2148Hs. Which lines are multiplexed on dynamic RAMs, and why? What is the purpose of RAS and CAS on dynamic RAMs? Draw the timing diagrams for a Read cycle and a Write cycle of a dynamic similar to Figures 8-8b and c. Assume that CAS is delayed from RAS by 100 Also assume that tCAC = 120 ns (max.), tRAe = 180 ns (max.), tDs = 40 ns and tDH = 30 ns (min.). How often does a 2118 dynamic RAM have to be refreshed, and why? What functions does the 3242 dynamic RAM controller take care of? Are the following memory ICs volatile or nonvolatile? (a) mask ROM (b) Static RAM (c) Dynamic RAM (d) EPROM Design and sketch an address decoding scheme similar to Figure 8-13 for 8K X 8 EPROM memory system using 2716 EPROMs. (The 2716 is a 2K X EPROM.) What single decoder chip could be used in Figure 8-14 in place of the 74LS138s?
8-7.
8-8.
8-9.
8-10.
8-11.
8-12. 8-13.
8-14.
8-15.
Microprocessor Fundamentals
OBJECTIVES
Upon completion of this chapter you should be able to: • Describe the benefits that microprocessor design has over hard-wired IC logic design. • Discuss the functional blocks of a microprocessor-based input/output capability.
o o
PROBLEMS
Locate the line labeled RAM_SL at location D8 of the HC1IDO schematic. To a HIGH level on that line, what level must the inputs to U8 be? The 62256 (UlO) IC in the 4096/4196 schematic is a MOS static RAM. By ing at the number of address lines and data lines, determine the size and conngura-, tion of the RAM. Repeat Problem 8-19 for U6 of the HClIDO schematic. Looking at the connections to the address lines, determine how much of the RAM is actually """'_',,,>lU.,,. The HC1IDO schematic uses two 27C64 EPROMS. (a) What are their size and configuration? (b) What are the labels of the control signals used to determine which is selected? (c) Place a jumper from pin 2 to pin 3 of jumper Jl (Grid location D-6). mine the range of addresses that make SMN_SL active (active-LOW). (d) Determine the range of addresses that make MON_SL active (active-LOW).
8-20. 8-21.
Describe the function of the address, data, and control buses. Discuss the timing sequence on the three buses required to perform a simple input/output operation. Explain the role of software program instructions in a microprocessor-based tem. sys-
Understand the software program used to read data from an input port and write it to an output port. Discuss the basic function of each of the internal blocks of the 8085A microprocessor. Follow the flow of data as it passes through the internal parts of the 808SA microprocessor.
INTRODUCTION
The design applications studied in the previous chapters have all been based on combinational logic gates and sequential logic ICs. One example is a traffic light controller that goes through the sequence green-yellow-red. To implement the circuit using combinational and sequential logic, we would use some counter ICs for the timing, a shift register for sequencing the lights, and a D flip-flop if we want to interrupt the sequence 305
306
Chap. 9 / Microprocessor Funda with a pedestrian cross-walk pushbutton. A complete design solution is easily within realm of SSI and MSI les. On the other hand, think about the complexity of electronic control of a modem tomobile. There are several analog quantities to monitor, such as engine speed, U"UU1.Vll pressure, and coolant temperature; and there are several digital control functions to form, such as spark plug timing, fuel mixture control, and radiator circulation control. operation is further complicated by the calculations and decisions that have to be made a continuing basis. This is definitely an application for a microprocessor-based system. A system designer should consider a microprocessor-based solution whenever an plication involves making calculations, making decisions based on external stimulus, maintaining memory of past events. A microprocessor offers several advantages over "hard-wired" SSIIMSI Ie approach. First of all, the microprocessor itself is a purpose device. It takes on a unique personality by the software program instructions by the designer. If you want it to count, you tell it to do so, with software. If you want to its output level left, there's an instruction for that. And if you want to add a new quantity to .. previous one, there's another instruction for that. Its capacity to perform arithmetic, comparisons, and update memory make it a very powerful digital problem solver. "U""'-Ul.". changes to an application can usually be done by changing a few program instructions, like the hard-wired system that may have to be totally redesigned and reconstructed. New microprocessors are introduced every year to fill the needs of the design neer. However, the theory behind microprocessor technology remains basically the It is a general-purpose digital device that is driven by software instructions and communicates with several external "support" chips to perform the necessary input/output of a cific task. Once you have a general understanding of one of the earlier microprocessorsthat came on the market, such as the Intel SOSO/SOS5,the Motorola 6800, or the Zilog it is an easy task to teach yourself the necessary information to upgrade to the new processors as they are introduced. Typically, when a new microprocessor is introduced, . will have a few new software instructions available and will have some of the 110 features,' previously handled by external support chips, integrated into the microprocessor chip.' Learning the basics on these new microprocessor upgrades is more difficult, however, cause some of their advanced features tend to hide the actual operation of the microprocessor and may hinder your complete understanding of the system. This book covers the Intel 80S5A microprocessor software, hardware, and support circuitry. A thorough understanding of its architecture and operation will allow you to design and troubleshoot most 8-bit microprocessor-based systems and provide the background for learning the operations of the more highly integrated microprocessors as they are introduced.
307
From
input lOggia ,witches
Figure 9-1 An example of a microprocessor-based system used for simple input/output operations.
devices perform specific operations. The buses are simply groups of conductors that are routed throughout the system and tapped into by various devices (or les) that need to share the information that is traveling on them.
Address Bus
The address bus is 16 bits wide and is generated by the microprocessor to select a particular location or Ie to be active. In the case of a selected memory Ie, the low-order bits on the address bus select a particular location within the Ie (see Section 8-5). Since the address bus is 16 bits wide, it can actually specify 65,536 (216) different addresses. The input port is one address, the output ort is one address, and the memory in a sY~_Qf_jJ.)i~Jiiz"e.JJl.ay~he_~ (4096) ad resses. This leaves about 60K addresses av.~i!~.t>!e..f()!fytu~~_~x.,R~TIsipn .
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9-1
Data Bus
Once the address bus is set up with the particular address that the microprocessor wants to access,the microprocessor then sends or receives 8 bits of data to or from that address via the bidirectional (two-way) data bus. Control Bus The control bus is of varying width, depending on the microprocessor being used. It carries control signals that are tapped into by the other les to tell what type of operation is being performed. From these signals, the les can tell if the operation is a read, a write, an 110, a memory access, or some other operation.
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Fundamentals
309
Address Decoder
The address decoder is usually an octal decoder like the 74LS 138 studied in Chapters 4 and 8. Its function is to provide active-LOW Chip Enables (CE) to the external ICs based on information it receives from the microprocessor via the control and address buses. Since there are multiple ICs on the data bus, the address decoder ensures that only one IC is active at a time to avoid a bus conflict caused by two ICs writing different data to the same bus.
Memory
There will be at least two memory ICs: ROM or EPROM and a RAM. The ROM will contain the "initialization" instructions, telling the microprocessor what to do when power is first turned on. This includes tasks like reading the keyboard and driving the CRT display. It will also contain several subroutines that can be called by the microprocessor to perform such tasks as time delays or input/output data translation. These instructions, which are permanently stored in ROM, are referred to as the "monitor program" or "operating system." The RAM part of memory is volatile, meaning that it loses its contents when power is turned off, and is therefore only used for temporary data storage.
Input Port
The input port provides data to the microprocessor via the data bus. In this case, it is an octal buffer with three-stated outputs. The input to the buffer will be provided by some input device like a keyboard or, as in this case, from eight HIGH-LOW toggle switches. The input port will dump its information to the data bus when it receives a Chip Enable (CE) from the address decoder and a Read command (RD) from the control bus.
As a brief introduction to microprocessor software, let's refer back to Figure 9-1 and learn the statements required to perform some basic input/output operations. To route the data from the input switches to the output LEOs, the data from the input port must first be read into the microprocessor before they can be sent to the output port. The microprocessor has an 8·bit internal register called the accumulator that can be used for that purpose. The software used to drive microprocessor-based systems is called assembly language. The Intel 8080/8085 assembly language statement to load the contents of the input port into the accumulator is LOA addr. LOA is called a mnemonic, an abbreviation of the operation being performed, which in this case is "Load Accumulator." The suffix addr will be replaced with a 16-bit address (4 hex digits) specifying the address of the input port. After the execution of LDA addr, the accumulator will contain the digital value that was on the input switches. Now, to write those data to the output port, we use the command STA addr. STA is the mnemonic for "Store Accumulator" and addr is the 16-bit address \ where you want the data stored. Execution of those two statements is all that is necessary to load the value of the switches into the accumulator and then transfer those data to the output LEOs. The microprocessor takes care of the timing on the three buses, and the address decoder takes care of providing chip enables to the appropriate ICs. If the system was based on Motorola or Zilog technology, the software in this case will be almost the same. Table 9-1 makes a comparison of the three assembly languages. TABLE 9-1
Comparison
of Input/Output
Software
on Three Different
Mlcroprocesaors
Operation
Load accumulator with contents of location addr Store accumulator to location addr
Intel 8080/8085
Motorola 6800
ZilogZ80
Output Port
The output port provides a way for the microprocessor to talk to the outside world. It could be sending data to an output device like a printer, or as in this case, it could send data to eight LEDs. An octal D flip-flop is used as the interface because after the microprocessor sends data to it, the flip-flop will latch on to the data, allowing the microprocessor to continue with its other tasks. To load the D flip-flop, the microprocessor must first set up the data bus with the data to be output. Then it sets up the address of the output port so that the address decoder will issue a LOW CE to it. Finally, it issues a pulse on its WR (write) line that travels the control bus to the clock input of the D flip-flop. When the D flip-flop receives the clock trigger pulse, it latches onto the data that are on the data bus at that time, and drives the LEDs.
LDA addr
LD A, (addr) LD (eddr),
STAaddr
9-2
310
ASTl6-.5 TRAP
Sec. 9-4 I Instruction Execution within the 8085A INSTRUCTION EXECUTION WITHIN THE BOB5A
311
SID
SUPPLY -GNP
pow,. {-",v
Now, referring back to the basic 110 system diagram of Figure 9-1, let's follow the flow of the LOA and STA instructions as they execute in the block diagram of the 8085A. Figure 9-4 shows the 8085A block diagram with numbers indicating the succession of events that occur when executing the LDA instruction. Remember, LDA addr and STA addr are assembly language instructions, stored in an external memory IC, that tell the 8085A CPU what to do. LOA addr tells the CPU to load its accumulator with the data value that is at address addr. STA addr tells the CPU to store (or send) the S-bit value that is in the accumulator to the output port at address addr. The mnemonics LDA and STA cannot be understood by the CPU as they are, they have to be assembled, or converted, into a binary string called machine code. Binary, or hexadecimal, machine code is what is actually read by the CPU and passed to the instruction register and decoder to be executed. The Inte18085A Users Manual gives the machine code translation for LOA as 3A16 (or 3AH) and STA as 32H.
510 500
TIMING
AND CONTROL
x, x,
Figure 9-2 8085A CPU functional block diagram. (Courtesy of Intel Corporation)
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The block diagram also shows interrupt control, which provides a way for an external digital signal to interrupt a software program while it is executing. This is accomplished by applying the proper digital signal on one of the interrupt inputs: INTR, RSTx.x, or TRAP. Serial communication capabilities are provided via the SID and SOD 110 pins (Serial Input Data, Serial Output Data). The register array contains the six general-purpose 8-bit registers and three 16-bit registers. Sixteen-bit registers are required whenever you need to store addresses. The stack pointer stores the address of the last entry on the stack. The stack is a data storage area in RAM used by certain microprocessor operations, which will be covered in a later chapter. The program Counter contains the 16-bit address of the next software instruction to be executed. The third l o-bit register is the address latch, which contains the current 16-bit address that is being sent to the address bus. The six general-purpos~ 8-bit registers can also be used in pairs (B-C, D-E, H-L) to store addresses or Io-bit data.
Figure 9-4
Before studying the flow of execution in Figure 9-4, we need to make a few assumptions. Let's assume that the input port is at address 4000H and the output port is at address 6000H. Let's also assume that the machine code program LDA 4000H, STA 6000H is stored in RAM starting at address 2000H.
Load Accumulator
The sequence of execution of LOA 4000H in Figure 9-4 will be as follows: 1. 2. The program counter will put the address 2000H on the address bus. The timing and control unit will issue a LOW pulse on the RO line. This will cause the contents of RAM location 2000H to be put onto the external data bus.
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Chap. 9 / Microprocessor
Fundamentals
313 3. The instruction register passes the 32H to the instruction decoder, which determines that 32H is the code for STA and that a 2-byte address must follow. The program counter gets incremented two more times, reading and storing byte 2 and byte 3 of the instruction into the address latch. The address latch and address bus now have 6000H on them, which is the address of the output port. The instruction decoder now issues the command to place the contents of the accumulator onto the data bus . The timing and control unit issues a LOW pulse on the WR line. Since the WR line is used as a clock input to the D flip-flop of Figure 9-1, the data from the data bus will be stored and displayed on the LEDs.
RAM (2000H) has the machine code 3AH, which will travel across the internal data bus to the instruction register. 3. The instruction register passes the 3AH to the instruction decoder, which determines that 3AH is the code for LDA and that a 16-bit (2-byte) address must follow. Since the entire instruction is 3 bytes (one for the 3AH and two for the address 4000H), the instruction decoder increments the program counter two more times so that the address latch register can read and store byte 2 and byte 3 of the instruction. The address latch and address bus now have 4000H on them, which is the address of the input port. The timing and control unit again issues a LOW pulse on the RO line. The data at the input port (4000H) will be put onto the external data bus. That data will travel across the internal data bus to the accumulator where it is now stored. The instruction is complete.
4. 5. 6.
. 4. 5. 6.
The complete assembly language and machine code program for the preceding input/output example is given in Table 9-2.
Store Accumulator
TABLE 9-2
Figure 9-5 shows the flow of execution of the STA 6000H instruction. L After the execution of the 3-byte LOA 4000H instruction, the program counter will have 2003H in it. (Instruction LOA 4000H resided in locations 2000H, 200lH,2002H.) The timing and control unit will issue a LOW pulse on the RD line. This will cause the contents of RAM location 20003H to be put onto the external data bus. RAM (2003H) has the machine code 32H, which will travel up the internal data bus to the instruction register.
Assembly
Language
and Machine
Program
Memory location
2000H 2001H 2002H 2003H 2004H 2005H
Assembly language
LDA 4000H
Machine code
3A 00 40 32 00 60 Three-byte instruction to load accumulator with contents from address 4000H Three-byte instruction to store accumulator out to address 6000H
2.
STA 6000H
SID
SOD
SUMMARY
In this chapter we have learned that 1. A system designer should consider using a microprocessor instead of logic circuitry whenever an application involves making calculations, making decisions based on external stimuli, and maintaining memory of past events. instructions given to it by a programmer.
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Microprocessors operate on instructions given to them in the form of machine code (Is and Os). The machine code is generated by a higher-level language like C or assembly language. data bus, an arithmetic/logic unit, and several input/output functions.
6.
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Program instructions are executed inside the microprocessor by the instruction decoder, which issues the machine cycle timing and initiates input/output operations. The microprocessor provides the appropriate logic levels on the data and address buses and takes care of the timing of all control signals output to the connected interface circuitry. then converted into machine language so that they can be interpreted by the microprocessor.
OU'I'UI port
Figure 9-5
Execution
within
the 8085A.
314
315
GLOSSARY Accumulator:
The parallel register in a microprocessor arithmetic and logic operations. that is the focal point for all
What is the function of the address bus? Use a TIL data manual to find an IC that you could use for the output port in Figure 9-1. Draw its logic diagram and external connections. Repeat Problem 9-4 for the input port. Repeat Problem 9-4 for the address decoder. Assume that the input port is at address 4000H, the output port is at address 6000H, and memory is at address 2000H. (Hint: Use an address decoding scheme similar to that found in Section
Address Bus:
A group of conductors that are routed throughout a computer system and is used to select a unique location based on its binary value. that performs all of the
Architecture: The layout and design of a system. Arithmetic Logic Unit (ALU): The part of a microprocessor
arithmetic and digital logic functions.
8-S.) 9-7.
9-8. 9-9. Why does the input port in Figure 9-1 have to have three-stated outputs? What two control signals are applied to the input port in Figure 9-1 to cause it to transfer the switch data to the data bus? How many different addresses can be accessed using a l6-bit address bus? In the assembly language instruction LOA 4000H, what does the LDA signify and what does the 4000H signify? Describe what the statement STA 6000H does. What are the names of the six internal808SA general-purpose registers? What is the function of the 808SA's instruction register and instruction decoder? Why is the program counter register 16 bits instead of 8? During the execution of the LDA 4000 instruction in Figure 9-4, the RD line goes LOW four times. Describe the activity initiated by each LOW pulse. What action does the LOW WR pulse initiate during the STA 6000H instruction in Figure 9-S?
Assembly Language:
A low-level programming language unique to each microprocessor. It is converted, or assembled, into machine code before it can be executed.
Bidirectional: Systems capable of transferring digital information in two directions. Central Processing Unit (CPU): The "brains" of a computer system. The term is used
interchangeably with "microprocessor."
9-10.
9-11.
Control Bus: A group of conductors that are routed throughout a computer system and is used to signify special control functions, such as Read, Write, 110, Memory, and Ready. Data Bus:
A group of conductors that are routed throughout a computer system and contains the binary data used for all arithmetic and 110 operations. The integrated circuits and electronic devices that make up a computer system.
Hardware:
Instruction Decoder: The circuitry inside a microprocessor that interprets the machine code and produces the internal control signals required to execute the instruction. Instruction Register:
code. A parallel register in a microprocessor that receives the machine
Interrupt:
A digital control signal that is input to a microprocessor IC pin that suspends current software execution and performs another predefined task. The binary codes that make up a microprocessor's program instructions.
SCHEMATIC 9-17.
INTERPRETATION
PROBLEMS
An LSI or VLSI integrated circuit that is the fundamental building block of a digital computer. It is controlled by software programs that allow it to do all digital arithmetic, logic, and 110 operations.
Mnemonic: The abbreviated spellings of instructions used in assembly language. Monitor Program: The computer software program initiated at power-up that supervises Operating System: Program Counter:
system operating tasks, such as reading the keyboard and driving the CRT. See Monitor program.
Find the two 4-bit magnitude comparators, U7 and U8, in the Watchdog Timer schematic. Which IC receives the high-order binary data, U7 or U8? [Hint: The bold lines in that schematic represent a bus, which is a group of conductors that are shared by several ICs. It simplifies the diagram by showing a single bold line instead of several separate lines. When the individual lines are taken off the bus they are labeled appropriately (0-1-2-3 and 4-S-6-7 in this application).] Where is the final output of the comparison made by U7, U8 used in the Watchdog Timer schematic?
9-18.
A 16-bit internal register that contains the address of the next program instruction to be executed.
Software: Computer program statements that give step-by-step instructions to a computer to solve a problem. Stack Pointer:
RAM stack. A 16-bit internal register that contains the address of the last entry on the
Support Circuitry:
The integrated circuits and electronic devices that assist the microprocessor in performing 110 and other external tasks.
PROBLEMS 9-1.
9-2. Describe the circumstances that would prompt you to use a microprocessor-based design solution instead ofa hard-wired IC logic design. In an 8-bit microprocessor dress bus? system, how many lines are in the data bus? The ad-