Quanta CH3

5 4 3 2 1
PCB STACK UP
LAYER 1 : TOP CH3 BLOCK DIAGRAM 01
LAYER 2 : SGND1 PCI DEVICES IRQ ROUTING
LAYER 3 : IN1 CPU THERMAL
LAYER 4 : IN2 PCI DEVICE IDSEL# REQ# / GNT# Interrupts
CPU SENSOR
LAYER 5 : SVCC PCI8402 AD25 REQ0# / GNT0# INT A/B/E#
Merom 14.318MHz
D LAYER 6 : IN3 PAG 5 D
LAYER 7 : SGND2 479P (uPGA)/35W

PAG 3,4 CLK_CPU_BCLK,CLK_CPU_BCLK#
LAYER 8 : BOT CLOCK GEN
CLK_MCH_BCLK,CLK_MCH_BCLK#
DREFCLK,DREFCLK# ICS9LPRS363AGLFT
CPU CORE SC452 DREFSSCLK,DREFSSCLK# 64pinsTSSOP
PAG 38 PAG 2
VGACORE(1.025V)MAX1993 DDR3 X 4
PAG 39 NVDIA NB8P PAG 18,19
NORTH BRIDGE PCI-Express 16X
PAG 14,15,16,17,18,19,20
INT-VGACORE MAX8776 DDRII 533,667 MHz LCD CON
PAG 40 DDRII-SODIMM1 PAG 25
Crestline
PAG 12,13
VCCP +1.5V AND GMCH CRT PORT
1.05V(TPS51124) DDRII-SODIMM2 DDRII 533,667 MHz Santa Rosa PAG 24
PAG 41
PAG 12,13
HDMI CON
C C
SYSTEM POWER MAX8734 PAG 5,6,7,8,9,10,11

PAG 36
SATA0 150MB
PAG 42 SATA - HDD NBSRCCLK, NBSRCCLK#
PAG 33 DMI LINK
DDR II SMDDR_VTERM
1.8V/1.8VSUS(TPS51116)
PAG 43 PATA (66/100/133)
PATA- CD-ROM PCI BUS / 33MHz IEEE1394
PAG 33 PCI8402 PAG 26
SYSTEM CHARGER(MAX8724) 0,1,2,3 PAG 26~28
PAG 45,46 USB2.0 Mem ory
USB2.0 I/O Ports X4 SOUTH BRIDGE CardReader
PAG 27
4
Bluetooth
6 ICH-8M PCI-E
Voltage Rails Camera
7
Azalia
Mini_PCI_E PAG 20,21,22,23 1 4 6 2
ON S0~S2 ON S3 ON S4 ON S5 Ctl Signal 9
Voltage Rails Express Card
Mini PCI-E Mini PCI-E LAN Express
B B
VCC_CORE X VR_ON
ALC262
VCCP X MAINON LPC Card Card Marvell Card
SMDDR_VTERM X MAINON PCIE-LAN
PAG 34,35
WLAN Robson M8055 PAG 28
VGACORE X MAINON PAG 31 PAG 31 PAG 32

VGA1.2 X MAINON Keyboard
Touch Pad PC87541 Audio Jack
RVCC3 X X X RVCCD
PAG 35 RJ45
PAG 29 PAGE 37 PAG 32
VCC1.25 X MAINON
VCC1.5 X MAINON Audio MDC
VCC1.8 X MAIND Amplifier
VCC2.5 X MAINON PAG 35 PAG 34
VCC3 X MAIND FAN BIOS
VCC5 X MAIND
PAG 30 PAG 37 SPEAKER MODEM RJ 11
A A
1.8VSUS X X SUSON
PAG 35 PAG 35
3VSUS X X SUSD
5VSUS X X SUSD
PROJECT : CH3
3VPCU X X X X 8734LDO5 Quanta Computer Inc.
5VPCU X X X X 8734LDO5
15VPCU 5VPCU Size Document Number R ev
X X X X BLOCK DIAGRAM 1A
Date: Tuesday, February 06, 2007 Sheet 1 of 46

5 4 3 2 1
1 2 3 4 5 6 7 8
VCC3
L16
1 2
BLM21PG600SN1D
CLK_3.3V
CLK_3.3V
14.318MHz
BG614318F84
XTL-5_3X3_2-3_8-1_2H
02
1
1
C895 C96
C132 C159 C157 C156 C154 C158 C160 C133 C662 30P CLK_XIN
3.3N/50V 10U_0805 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V
2
Y3
14.318MHZ/20P
A A
1
Add 3.3N CAP for EMI suggestion CLK_XOUT
Nicole 12/11 C664 30P
internal build-in 33ohm PN change from B version to D version

VCC3 damping resisteor nicole 12/01
U19
VCC3 VDDCPU CLK_XIN 58 X1
L17
CPUT_L0 52 RHCLK_CPU RP1 4 3 4P2R-S-33 CLK_CPU_BCLK 3
VDDCPU RHCLK_CPU#
1 2
BLM21PG600SN1D R459 R460 ICS9PR363DGLF CPUC_L0 51 2 1 CLK_CPU_BCLK# 3
49 RHCLK_MCH RP2 4 3 4P2R-S-33
CPUT_L1F CLK_MCH_BCLK 5
1
1
C97 *10K/F *10K/F CLK_XOUT 57 48 RHCLK_MCH# 2 1
X2 CPUC_L1F CLK_MCH_BCLK# 5
C113
10U_0805 0.1U/10V 62 44 RSRC_RB RP5 4 3 4P2R-S-33
22 PM_STPCPU# CLK_PCIE_MINI_RB 31
2
2 CPU_STOP# CPUITPT_L2/PCIET_L8
63 43 RSRC_RB# 2 1
22 PM_STPPCI# PCI/PCIEX_STOP# CPUITPC_L2/PCIEC_L8 CLK_PCIE_MINI_RB# 31
CGCLK_SMB 54
VCC3 VDDA CGDAT_SMB SCLK
55 SDATA
L19 17 R_DREFSSCLK RP45 2 1 *I@4P2R-S-33
27FIX/LCD_SSCGT/PCIET_L0 DREFSSCLK 6
1 2 VDDA 18 R_DREFSSCLK# 4 3
27SS/LCD_SSCGC/PCIEC_L0 DREFSSCLK# 6
BLM21PG600SN1D
CLKUSB_48 R107 33_4
22 CLKUSB_48
1
C896 C101 CLK_BSEL0 R106 2.2K/F_4 12

C134 R95 10K/F_4 CLK_BSEL1 FSA/USB_48MHZ RSRC_SATA RP42
VCC3 16 FSB/TEST_MODE SATACLKT_L 26 2 1 4P2R-S-33 CLK_PCIE_SATA 20
3.3N/50V 10U_0805 0.1U/10V R461 10K/F_4 CLK_BSEL2 61 27 RSRC_SATA# 4 3 CLK_PCIE_SATA# 20
2
FSC/REF1/TEST_SEL SATACLKC_L
14M_ICH R462 33_4 60 19 R_CLK_PCIE_VGARP44 2 1 4P2R-S-33
22 14M_ICH REF0 PCIET_L1 CLK_PCIE_VGA 14
20 R_CLK_PCIE_VGA# 4 3
PCIEC_L1 CLK_PCIE_VGA# 14
Add 3.3N CAP for EMI suggestion VCC3 22 CLK_PCIE_NEW RP40 2 1 4P2R-S-33
B PCIET_L2 CLK_PCIE_NEW_C 28 B
Nicole 12/11 CLK_3.3V 1 23 CLK_PCIE_NEW# 4 3
VDDPCI PCIEC_L2 CLK_PCIE_NEW_C# 28
7 VDDPC1
11 24 RS RC_ICH RP43 2 1 4P2R-S-33
VDD48 PCIET_L3 CLK_PCIE_ICH 21
25 RSRC_ICH# 4 3
PCIEC_L3 CLK_PCIE_ICH# 21
Q6 R59 R57 56 30 CLK_PCIE_MINI_ RP41 2 1 4P2R-S-33
VDDREF PCIET_L4 CLK_PCIE_MINI_WLAN 31
2
10K 10K 21 31 CLK_PCIE_MINI_# 4 3

VDDPCIEX PCIEC_L4 CLK_PCIE_MINI_WLAN# 31
2N7002E 28
CGDAT_SMB VDDPCIEX RSRC_MCH RP3
13,22,28,31 PDAT_SMB 3 1 42 VDDPCIEX PCIET_L5 36 4 3 4P2R-S-33 CLK_PCIE_3GPLL 6
VDDCPU 50 35 RSRC_MCH# 2 1
VDDCPU PCIEC_L5 CLK_PCIE_3GPLL# 6
VCC3 R60 1K/F_4 47 39 RSRC1_LAN RP4 4 3 4P2R-S-33

VREF PCIET_L6 CLK_PCIE_LAN 32
VDDA 45 38 RSRC1_LAN# 2 1
VCC3 VDDA PCIEC_L6 CLK_PCIE_LAN# 32
R58 348_6
PEREQ1#/PCIET_L7 41
Q5 40 R_PCIE_REQ2#R68 475/F_4
PEREQ2#/PCIEC_L7 PCIE_REQ2# 31
2
10 32 R_PCIE_REQ3#R474 475/F_4
22 CK_PWG VTTPWR_GD/PD# *PEREQ3# PCIE_REQ3# 28
2N7002E 33 R_PCIE_REQ4#R65 475/F_4
*PEREQ4# PCIE_REQ4# 6
3 1 CGCLK_SMB RP46 1 2 *I@4P2R-S-33 R_DREFCLK 14
13,22,28,31 PCLK_SMB 6 DREFCLK PCIET_L9/DOTT_96MHZ
3 4 R_DREFCLK# 15
6 DREFCLK# PCIEC_L9/DOTC_96MHZL
PWRSAVE# 34 64 R_PCLK_DEBUG R66 33_4 PCLK_DEBUG
*PWRSAVE# **REQ_SEL/PCICLK0 PCLK_DEBUG 31
(96MHz)
37 3 R_PCI_CLK_8402 R475 33_4 PCI_CLK_8402
GND PCICLK1 PCI_CLK_8402 26
2 GND PCICLK2 4
6 GND
13 5 SELPCIEX0_LCD#
GND *SELPCIEX0_LCD#/PCICLK3
29 GND R_PCLK_ICH R94 33_4 PCLK_ICH
CPU Clock select 53
59
GND ITP_EN/PCICLK_F4 8
9 R_PCLK_541 R103 33_4 PCLK_541
PCLK_ICH 21
GND *SELLCD_27#/PCICLK_F5 PCLK_541 36
46 GNDA
CPU_BSEL0 R109 0 CLK_BSEL0 R110 0
3 CPU_BSEL0 MCH_BSEL0 6
C R108 *56 * Internal pull up to VDD C
VCC3
**Internal pull down to GND
R105 *1K R_PCLK_DEBUG R67 10K_4 VCC3 14M_ICH C657 15P
VCC3
R_PCLK_541 R96 10K_4 PCLK_DEBUG C115 15P
Update for Robson CLKREQ# CLKUSB_48 C689 15P

PWRSAVE# R71 *10K_4
nicole 9/20 PCLK_541 C192 15P
PCIE_REQ2# R457 10K_4
FSC FSB FSA Spread R_PCLK_ICH R476 10K_4 PCLK_ICH C193 15P
BSEL2 BSEL1 BSEL0 CPU SRC PCI REF USB DOT PCIE_REQ3# R92 10K_4
% SELPCIEX0_LCD# R477 *10K_4 PCI_CLK_8402 C688 15P
PCIE_REQ4# R69 10K_4
0 0 0 266.66 100 33.33 14.318 48 96 0.5 Down 96/100M
0 0 1 133.33 100 33.33 14.318 48 96 0.5 Down
* 0 1 0 200.00 100 33.33 14.318 48 96 0.5 Down Pin64 Pin8 LATCH SELECT TABLE
0 1 1 0.5 Down 0 PCIEXCLK REQ2# used for ROBSON
166.66 100 33.33 14.318 48 96 * 0 SRC Pair
1 0 0 333.33 100 33.33 14.318 48 96 0.5 Down * 1 PEREQ# 1 CPUITP Pair Pin5 Pin9 Pin14/15 Pin17/18
REQ3# used for NEWCARD
1 0 1 100.00 100 33.33 14.318 48 96 0.5 Down 0 0 PCIEX9 27MHz
PCIE_REQ1# PCIE_L0 PCIE_L6
1 1 0 400.00 100 33.33 14.318 48 96 0.5 Down 0 1 PCIEX9 LCD REQ4# used for GMCH
1 1 1 200.00 100 33.33 14.318 48 96 0.5 Down * 1 x DOT96 PCIEX0
D
PCIE_REQ4# PCIE_L3 PCIE_L5 PCIE_L7 D
1.Level 1 Environment-related Substances Should NEVER be Used.

2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.
PROJECT : CH3
Quanta Computer Inc.
Size Document Number R ev
CLOCK GENERATOR 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
03
H_A#[3..16] U17A H_D#[0..63] U17B H_D#[0..63]
5 H_A#[3..16] 5 H_D#[0..63] H_D#[0..63] 5
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 5 D[0]# D[32]#
ADDR GROUP 0
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 5 D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 5 D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
A[6]# D[3]# D[35]#
DATA GRP 0
H_A#7 M3 H5 H_D#4 F23 V23 H_D#36
A A[7]# DEFER# H_DEFER# 5 D[4]# D[36]# A
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# 5 D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 5 D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
A[10]# H_BR0# 5 D[7]# D[39]#
H_A#11 P5 F1 H_D#8 K24 Y25 H_D#40
DATA GRP 2
H_A#12 A[11]# BR0# R62 56 H_D#9 D[8]# D[40]# H_D#41
P2 A[12]# G24 D[9]# D[41]# W22
CONTROL
H_A#13 L2 D20 H_IERR# 1 2 VCCP H_D#10 J24 Y23 H_D#42
H_A#14 A[13]# IERR# H_D#11 D[10]# D[42]# H_D#43
P4 A[14]# INIT# B3 H_INIT# 20 J23 D[11]# D[43]# W24
H_A#15 P1 H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 5 F26 D[13]# D[45]# AA23
M1 H_D#14 K22 AA24 H_D#46
5 H_ADSTB#0 H_REQ#[0..4] ADSTB[0]# D[14]# D[46]#
C1 H_RESET# H_D#15 H23 AB25 H_D#47
5 H_REQ#[0..4] RESET# H_RESET# 5 D[15]# D[47]#
H_REQ#0 K3 F3 J26 Y26
REQ[0]# RS[0]# H_RS#0 5 5 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 5
H_REQ#1 H2 F4 H26 AA26
REQ[1]# RS[1]# H_RS#1 5 5 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 5
H_REQ#2 K2 G3 H25 U22
REQ[2]# RS[2]# H_RS#2 5 5 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 5
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# 5 H_D#[0..63] H_D#[0..63]
H_REQ#4 L1
H_A#[17..35] REQ[4]# 5 H_D#[0..63] H_D#[0..63] 5
G6 H_D#16 N22 AE24 H_D#48
5 H_A#[17..35] HIT# H_HIT# 5 D[16]# D[48]#
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 5 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# ITP_BPM#0 T5 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AB22
ADDR GROUP 1
H_A#20 W6 AD3 ITP_BPM#1 T6 Layout Note: H_D#20 L23 AB21 H_D#52

A[20]# BPM[1]# D[20]# D[52]#
DATA GRP 1
H_A#21 U4 AD1 ITP_BPM#2 T7 Place voltage H_D#21 M24 AC26 H_D#53
XDP/ITP SIGNALS
H_A#22 A[21]# BPM[2]# ITP_BPM#3 T4 H_D#22 D[21]# D[53]# H_D#54
Y5 A[22]# BPM[3]# AC4 L22 D[22]# D[54]# AD20
H_A#23 U1 AC2 ITP_BPM#4 T2 divider within H_D#23 M23 AE22 H_D#55
H_A#24 A[23]# PRDY# ITP_BPM#5 0.5" of GTLREF H_D#24 D[23]# D[55]# H_D#56
R4 A[24]# PREQ# AC1 P25 D[24]# D[56]# AF23
H_A#25 T5 AC5 ITP_TCK pin H_D#25 P23 AC25 H_D#57
H_A#26 A[25]# TCK ITP_TDI H_D#26 D[25]# D[57]# H_D#58
T3 AA6 P22 AE21
DATA GRP 3
H_A#27 A[26]# TDI ITP_TDO T3 H_D#27 D[26]# D[58]# H_D#59
W2 A[27]# TDO AB3 T24 D[27]# D[59]# AD21
H_A#28 W5 AB5 ITP_TMS VCCP H_D#28 R24 AC22 H_D#60
H_A#29 A[28]# TMS ITP_TRST# H_D#29 D[28]# D[60]# H_D#61
B Y4 A[29]# TRST# AB6 L25 D[29]# D[61]# AD23 B
H_A#30 U2 C20 ITP_DBRESET# H_D#30 T25 AF22 H_D#62
A[30]# DBR# D[30]# D[62]#
2
H_A#31 V4 H_D#31 N25 AC23 H_D#63
H_A#32 A[31]# R63 75 R470 D[31]# D[63]#
W3 A[32]# 5 H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 5
H_A#33 AA4 THERMAL 2 1 VCCP 1K/F M26 AF24
A[33]# 5 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 5
H_A#34 AB2 N24 AC20
A[34]# 5 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 5
H_A#35 AA3 D21 CPU_PROCHOT#
1
A[35]# PROCHOT# H_THERMDA V_CPU_GTLREF AD26 COMP0
5 H_ADSTB#1 V1 ADSTB[1]# THERMDA A24 H_THERMDA 30 GTLREF COMP[0] R26 Note:
B25 H_THERMDC CPU_TEST1 C23 MISC U26 COMP1 H_DPRTSTP need to daisy chain
THERMDC H_THERMDC 30 TEST1 COMP[1]
2
A6 CPU_TEST2 D25 AA1 COMP2
20 H_A20M# A20M# TEST2 COMP[2] from ICH8 to IMVP6 to CPU.
ICH
A5 C7 PM_THRMTRIP# CPU_TEST3 C24 Y1 COMP3

20 H_FERR# FERR# THERMTRIP# PM_THRMTRIP# 6,20 TEST3 COMP[3]
C4 R471 CPU_TEST4 AF26
20 H_IGNNE# IGNNE# TEST4
2K/F CPU_TEST5 AF1 E5
TEST5 DPRSTP# H_DPRSTP# 6,20,37
D5 CPU_TEST6 A26 B5
20 H_STPCLK# H_DPSLP# 20
1
STPCLK# TEST6 DPSLP#
20 H_INTR C6 LINT0 H CLK DPWR# D24 H_DPWR# 5
20 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 2 2 CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 20
A3 A21 T152 B23 D7
20 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 2 BSEL[1] SLP# H_CPUSLP# 5
T151 C21 AE6
BSEL[2] PSI# PM_PSI# 37
M4 RSVD[01]
N5 Merom Ball-out Rev 1a
RSVD[02]
T2 RSVD[03]
V3 RSVD[04]
B2 R64 *1K/F
RESERVED
RSVD[05] CPU_TEST1 CPU_TEST3

C3 RSVD[06] 1 2 T13
D2 R472 *1K/F CPU_TEST5
RSVD[07] CPU_TEST2 T1
D22 RSVD[08] 1 2
D3 RSVD[09]
For the purpose of testability, route these signals
F6 C672 *0.1U/10V through a ground referenced Z0 = 55ohm trace that
RSVD[10] CPU_TEST4
2 1
ends in a via that is near a GND via and is
C C
R466 *0 accessible through an oscilloscope connection.
Merom Ball-out Rev 1a 1 2 CPU_TEST6
Place C close to the

CPU_TEST4 pin. Make sure
CPU_TEST4 routing is
reference to GND and away
from other noisy signal.
COMP0
COMP1
VCCP COMP2
ITP PU
COMP3
ITP_DBRESET# R61 *54.9/F_4 FSB BCLK BSEL2 BSEL1 BSEL0
2
ITP_TMS R23 39/F_4 533 133 0 0 1 R25 R27 R469 R468
54.9/F 27.4/F 54.9/F 27.4/F
ITP_TDI R28 150/F_4 667 166 0 1 1
1
ITP_BPM#5 R26 54.9/F_4 800 200 0 1 0
ITP_TCK R22 2 27/F
1 Comp0,2 connect with Zo=27.4ohm,Comp1,3
ITP_TRST# R24 680/F_4
connect with Zo=55ohm, make those traces
ITP disable guidelines length shorter than 0.5".Trace should be
Signal Resistor Value Connect To Resistor Placement at least 25 mils away from any other
toggling signal.
TDI 150 ohm +/- 5% VTT Within 2.0" of the ITP
D D
TMS 39 ohm +/- 1% VTT Within 2.0" of the ITP
TRST# 500-680ohm +/- 5% GND Within 2.0" of the ITP
TCK 27 ohm +/- 1% GND Within 2.0" of the ITP
TDO 150 ohm +/- 5% VTT Within 2.0" of the ITP PROJECT : CH3
CPU 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
ICCODE:
04
VCC_CORE VCC_CORE VCC_CORE for Merom processors
U17C recommended design U17D
A7 AB20 A4 P6
A9
VCC[001] VCC[068]
AB7 target is 44A A8
VSS[001] VSS[082]
P21
VCC[002] VCC[069] VSS[002] VSS[083]
1
1
A10 VCC[003] VCC[070] AC7 A11 VSS[003] VSS[084] P24
C635 C636 C93 C89 C79 A12 AC9 A14 R2
10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V VCC[004] VCC[071] VSS[004] VSS[085]
A13 AC12 A16 R5
2
2
A VCC[005] VCC[072] VSS[005] VSS[086] A
A15 VCC[006] VCC[073] AC13 A19 VSS[006] VSS[087] R22
A17 VCC[007] VCC[074] AC15 A23 VSS[007] VSS[088] R25
A18 VCC[008] VCC[075] AC17 AF2 VSS[008] VSS[089] T1
A20 VCC[009] VCC[076] AC18 B6 VSS[009] VSS[090] T4
VCC_CORE B7 AD7 B8 T23
VCC[010] VCC[077] VSS[010] VSS[091]
B9 VCC[011] VCC[078] AD9 B11 VSS[011] VSS[092] T26
B10 VCC[012] VCC[079] AD10 B13 VSS[012] VSS[093] U3
1
1
C80 C58 C74 C650 C65 B15 AD15 B21 U24
10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V VCC[015] VCC[082] VSS[015] VSS[096]
B17 AD17 B24 V2
2
2
VCC[016] VCC[083] VSS[016] VSS[097]
B18 VCC[017] VCC[084] AD18 C5 VSS[017] VSS[098] V5
B20 VCC[018] VCC[085] AE9 C8 VSS[018] VSS[099] V22
C9 VCC[019] VCC[086] AE10 C11 VSS[019] VSS[100] V25
8 inside cavity, north side, secondary layer. C10 VCC[020] VCC[087] AE12 C14 VSS[020] VSS[101] W1
C12 VCC[021] VCC[088] AE13 C16 VSS[021] VSS[102] W4
C13 VCC[022] VCC[089] AE15 C19 VSS[022] VSS[103] W23
VCC_CORE C15 AE17 C2 W26
VCC[023] VCC[090] VSS[023] VSS[104]
C17 VCC[024] VCC[091] AE18 C22 VSS[024] VSS[105] Y3
C18 VCC[025] VCC[092] AE20 C25 VSS[025] VSS[106] Y6
D9 VCC[026] VCC[093] AF9 D1 VSS[026] VSS[107] Y21
1
1
D10 VCC[027] VCC[094] AF10 ICCP: D4 VSS[027] VSS[108] Y24
C643 C640 C648 C638 C646 D12 AF12 D8 AA2
10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V D14
VCC[028] VCC[095]
AF14 1before vccore stable D11
VSS[028] VSS[109]
AA5
2
2
VCC[029] VCC[096] VSS[029] VSS[110]
D15 VCC[030] VCC[097] AF15 peak current is 4.5A D13 VSS[030] VSS[111] AA8
D17 AF17 D16 AA11
D18
VCC[031] VCC[098]
AF18 VCCP 2.after vccore stable D19
VSS[031] VSS[112]
AA14
VCC[032] VCC[099] VSS[032] VSS[113]
E7 VCC[033] VCC[100] AF20 continue current is D23 VSS[033] VSS[114] AA16
VCC_CORE E9 D26 AA19
B E10
VCC[034]
G21
2.5A E3
VSS[034] VSS[115]
AA22 B
VCC[035] VCCP[01] VSS[035] VSS[116]
E12 VCC[036] VCCP[02] V6 E6 VSS[036] VSS[117] AA25
1
E13 VCC[037] VCCP[03] J6 E8 VSS[037] VSS[118] AB1
1
1
E15 K6 + C75 E11 AB4
C651 C645 C64 C73 C637 VCC[038] VCCP[04] 330U/2.5V VSS[038] VSS[119]
E17 VCC[039] VCCP[05] M6 E14 VSS[039] VSS[120] AB8
10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V E18 J21 E16 AB11
2
2
VCC[040] VCCP[06] VSS[040] VSS[121]
E20 VCC[041] VCCP[07] K21 E19 VSS[041] VSS[122] AB13
F7 VCC[042] VCCP[08] M21 E21 VSS[042] VSS[123] AB16
F9 VCC[043] VCCP[09] N21 E24 VSS[043] VSS[124] AB19
8 inside cavity, south side, secondary layer. F10 VCC[044] VCCP[10] N6 F5 VSS[044] VSS[125] AB23
F12 VCC[045] VCCP[11] R21 F8 VSS[045] VSS[126] AB26
F14 R6 VCC1.5 F11 AC3
VCC[046] VCCP[12] VSS[046] VSS[127]
F15 VCC[047] VCCP[13] T21 F13 VSS[047] VSS[128] AC6
VCC_CORE F17 T6 F16 AC8
VCC[048] VCCP[14] VSS[048] VSS[129]
F18 VCC[049] VCCP[15] V21 F19 VSS[049] VSS[130] AC11
F20 VCC[050] VCCP[16] W21 F2 VSS[050] VSS[131] AC14
AA7 VCC[051] ICCA 130mA F22 VSS[051] VSS[132] AC16
1
AA9 VCC[052] VCCA[01] B26 F25 VSS[052] VSS[133] AC19

C91 C95 C57 C649 C639 C642 AA10 C26 G4 AC21
10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V VCC[053] VCCA[02] VSS[053] VSS[134]
AA12 G1 AC24
2
VCC[054] VSS[054] VSS[135]
1
AA13 AD6 C169 C176 G23 AD2
VCC[055] VID[0] CPU_VID0 37 VSS[055] VSS[136]
AA15 AF5 .01U/25V 10U/6.3V G26 AD5
AA17 AE5 CPU_VID2 37 H3 AD8
2
VCC[057] VID[2] VSS[057] VSS[138]
6 inside cavity, north side, primary layer. AA18 VCC[058] VID[3] AF4 CPU_VID3 37 H6 VSS[058] VSS[139] AD11
AA20 VCC[059] VID[4] AE3 CPU_VID4 37 H21 VSS[059] VSS[140] AD13
AB9 VCC[060] VID[5] AF3 CPU_VID5 37 H24 VSS[060] VSS[141] AD16
VCC_CORE AC10 AE2 J2 AD19
AB10 VCC[062] J5 VSS[062] VSS[143] AD22
AB12 VCC[063]
Layout Note: J22 VSS[063] VSS[144] AD25
AB14 VCC[064] VCCSENSE AF7 VCCSENSE VCCSENSE 37 Place C105 near PIN J25 VSS[064] VSS[145] AE1
1
C C
AB15 VCC[065] K1 VSS[065] VSS[146] AE4
C66 C72 C78 C90 C94 C56 AB17
B26. K4 AE8
VCC[066] VSS[066] VSS[147]
10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V 10U/6.3V AB18 AE7 VSSSENSE VSSSENSE 37 K23 AE11
2
VCC[067] VSSSENSE VSS[067] VSS[148]

K26 VSS[068] VSS[149] AE14
Merom Ball-out Rev 1a L3 AE16
VSS[069] VSS[150]
. L6 VSS[070] VSS[151] AE19
6 inside cavity, south side, primary layer. L21 VSS[071] VSS[152] AE23
L24 VSS[072] VSS[153] AE26
M2 VSS[073] VSS[154] A2
M5 VSS[074] VSS[155] AF6
Update to 10u *32pcs. OK M22 VSS[075] VSS[156] AF8
M25 VSS[076] VSS[157] AF11
N1 VSS[077] VSS[158] AF13
VCC_CORE N4 AF16
VCCP VSS[078] VSS[159]
N23 VSS[079] VSS[160] AF19
1
N26 VSS[080] VSS[161] AF21
R43 P3 A25
100/F VSS[081] VSS[162]
VSS[163] AF25
1
C53 C98 C54 C99 C55 C100 Merom Ball-out Rev 1a
2
0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V .
2
VCCSENSE
VSSSENSE
1
Layout out:
Place these inside socket cavity on North side secondary. R37
100/F
2
D D
Route VCCSENSE and VSSSENSE

traces at 27.4ohms and
length matched to within 25
mil. Place PU and PD within PROJECT : CH3
2 inch of CPU.
CPU 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
05
U25A H_A#[3..35]
H_D#[0..63] H_A#[3..35] 3
J13 H_A#3
3 H_D#[0..63] H_A#_3
H_D#0 E2 B11 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
A
G2 H_D#_1 H_A#_5 C11 A
H_D#2 G7 M11 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
M6 H_D#_3 H_A#_7 C15
H_D#4 H7 F16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
H3 H_D#_5 H_A#_9 L13
H_D#6 G4 G17 H_A#10
H_D#7 H_D#_6 H_A#_10 H_A#11
F3 H_D#_7 H_A#_11 C14
H_D#8 N8 K16 H_A#12
H_D#9 H_D#_8 H_A#_12 H_A#13
H2 H_D#_9 H_A#_13 B13
H_D#10 M10 L16 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
N12 H_D#_11 H_A#_15 J17
H_D#12 N9 B14 H_A#16
VCCP H_D#13 H_D#_12 H_A#_16 H_A#17
H5 H_D#_13 H_A#_17 K19
H_D#14 P13 P15 H_A#18
H_D#15 H_D#_14 H_A#_18 H_A#19
K9 H_D#_15 H_A#_19 R17
H_D#16 M2 B16 H_A#20
H_D#_16 H_A#_20
1
H_D#17 W10 H20 H_A#21

R118 H_D#18 H_D#_17 H_A#_21 H_A#22
Y8 H_D#_18 H_A#_22 L19
221/F H_D#19 V4 D17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
M3 H_D#_20 H_A#_24 M17
H_D#21 J1 N16 H_A#25
2
H_SWING H_D#22 H_D#_21 H_A#_25 H_A#26

N5 H_D#_22 H_A#_26 J19
H_D#23 N3 B18 H_A#27
H_D#_23 H_A#_27
1
H_D#24 W6 E19 H_A#28

H_D#_24 H_A#_28
2
R114 H_D#25 W9 B17 H_A#29

100/F C191 H_D#26 H_D#_25 H_A#_29 H_A#30
N2 H_D#_26 H_A#_30 B15
0.1U/10V H_D#27 Y7 E17 H_A#31
1
H_D#28 H_D#_27 H_A#_31 H_A#32

Y9 C18
2
H_D#29 H_D#_28 H_A#_32 H_A#33

P4 H_D#_29 H_A#_33 A19
H_D#30 W3 B19 H_A#34
H_D#31 H_D#_30 H_A#_34 H_A#35
B N1 H_D#_31 H_A#_35 N19 B
H_D#32 AD12
H_D#33 H_D#_32
AE3 H_D#_33 H_ADS# G12 H_ADS# 3
H_D#34 AD9 H17
H_D#_34 H_ADSTB#_0 H_ADSTB#0 3
H_D#35 AC9 G20
H_D#_35 H_ADSTB#_1 H_ADSTB#1 3
H_D#36 AC7 C8
H_D#_36 H_BNR# H_BNR# 3
HOST
VCCP H_D#37 AC14 E8
H_D#_37 H_BPRI# H_BPRI# 3
H_D#38 AD11 F12
H_D#_38 H_BREQ# H_BR0# 3
impedance 55 ohm H_D#39 AC11 D6
H_D#_39 H_DEFER# H_DEFER# 3
H_D#40 AB2 C10
H_D#_40 H_DBSY# H_DBSY# 3
H_D#41 AD7 AM5
H_D#_41 HPLL_CLK CLK_MCH_BCLK 2
1
H_D#42 AB1 AM7

H_D#_42 HPLL_CLK# CLK_MCH_BCLK# 2
R116 R111 H_D#43 Y3 H8
H_D#_43 H_DPWR# H_DPWR# 3
54.9/F 54.9/F H_D#44 AC6 K7
H_D#_44 H_DRDY# H_DRDY# 3
H_D#45 AE2 E4
H_D#_45 H_HIT# H_HIT# 3
H_D#46 AC5 C6 H_HITM# 3
2
H_SCOMP H_D#47 H_D#_46 H_HITM#

AG3 H_D#_47 H_LOCK# G10 H_LOCK# 3
H_SCOMP# H_D#48 AJ9 B7
H_D#_48 H_TRDY# H_TRDY# 3
H_D#49 AH8
H_D#50 H_D#_49
AJ14 H_D#_50
H_D#51 AE9
H_RCOMP H_D#52 H_D#_51
AE11 H_D#_52
H_D#53 AH12 K5
H_D#_53 H_DINV#_0 H_DINV#0 3
1
H_D#54 AJ5 L2
R113 H_D#55 AH5 AD13
24.9/F Layout Note: H_D#56 AJ6 AE13
H_RCOMP trace should be H_D#57 AE7
H_D#58 H_D#_57
AJ7 M7 H_DSTBN#0 3
2
10-mil wide with 15-mil H_D#59 H_D#_58 H_DSTBN#_0

AJ2 H_D#_59 H_DSTBN#_1 K3 H_DSTBN#1 3
C
spacing. H_D#60 AE5 H_D#_60 H_DSTBN#_2 AD2 H_DSTBN#2 3 C
H_D#61 AJ3 AH11
H_D#_61 H_DSTBN#_3 H_DSTBN#3 3
H_D#62 AH2
H_D#63 H_D#_62
AH13 H_D#_63 H_DSTBP#_0 L7 H_DSTBP#0 3
H_DSTBP#_1 K2 H_DSTBP#1 3
H_DSTBP#_2 AC2 H_DSTBP#2 3
H_SWING B3 AJ10
H_SWING H_DSTBP#_3 H_DSTBP#3 3
VCCP H_RCOMP C2 H_RCOMP
H_REQ#_0 M14 H_REQ#0 3
H_SCOMP W1 E13
H_SCOMP H_REQ#_1 H_REQ#1 3
2
H_SCOMP# W2 A11
H_SCOMP# H_REQ#_2 H_REQ#2 3
R134 H13
H_REQ#_3 H_REQ#3 3
1K/F B6 B12
3 H_RESET# H_CPURST# H_REQ#_4 H_REQ#4 3
3 H_CPUSLP# E5 H_CPUSLP#
E12 H_RS#0 3
1
H_RS#_0
H_RS#_1 D7 H_RS#1 3
H_RS#_2 D8 H_RS#2 3
H_REF B9 H_AVREF
A9 H_DVREF
1
CRESTLINE_1p0
1
R127 C209
2K/F 0.1U/10V
2
2
Layout Note:55ohm
Place the 0.1 uF
D decoupling capacitor D
within 100 mils from
GMCH pins.
PROJECT : CH3
NB 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
P36
P37
R35
N35
U25B
RSVD1
RSVD2
RSVD3
RSVD4
SM_CK_0
SM_CK_1
SM_CK_3
AV29
BB23
BA25
M_A_CLK0
M_A_CLK1
M_B_CLK0
13
13
13
VCC3
17,25 BLON
R243
R258
R261
*I@10K
*I@10K
T72
*I@0
L_CTRL_CLK
L_CTRL_DATA
J40
H39
E39
E40
U25C
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
PEG_COMPI
PEG_COMPO
N43 VCC_PEG_R1
M43
<=0.5''
R277 24.9/F
2
+VCC_PEG
06
AR12 AV23 R513 *I@0 L_DDC_CLK C37
RSVD5 SM_CK_4 M_B_CLK1 13 16,17,25 EDIDCLK L_DDC_CLK
AR13 R510 *I@0 L_DDC_DATA D35 J51 PEG_RXN0
RSVD6 16,17,25 EDIDDATA L_DDC_DATA PEG_RX#_0 PEG_RXN0 14
AM12 AW30 R263 *I@0 K40 L51 PEG_RXN1
RSVD7 SM_CK#_0 M_A_CLK0# 13 17,25 DIGON L_VDD_EN PEG_RX#_1 PEG_RXN1 14
AN13 BA23 N47 PEG_RXN2
RSVD8 SM_CK#_1 M_A_CLK1# 13 PEG_RX#_2 PEG_RXN2 14
J12 AW25 <check list & CRB> R262 *[email protected] LVDS_IBG L41 T45 PEG_RXN3
RSVD9 SM_CK#_3 M_B_CLK0# 13 LVDS_IBG PEG_RX#_3 PEG_RXN3 14
AR37 AW23 I&E Dis/Enable L43 T50 PEG_RXN4
RSVD10 SM_CK#_4 M_B_CLK1# 13 For Calero : 1.5K T74 LVDS_VBG PEG_RX#_4 PEG_RXN4 14
AM36 N41 U40 PEG_RXN5
RSVD11 For Cresstline:2.4K setting LVDS_VREFH PEG_RX#_5 PEG_RXN6
PEG_RXN5 14
AL36 RSVD12 SM_CKE_0 BE29 M_A_CKE0 12,13 N40 LVDS_VREFL PEG_RX#_6 Y44 PEG_RXN6 14
AM37 AY32 D46 Y40 PEG_RXN7
RSVD13 SM_CKE_1 M_A_CKE1 12,13 16 LA_CLK# LVDSA_CLK# PEG_RX#_7 PEG_RXN7 14
A D20 BD39 C45 AB51 PEG_RXN8 A
RSVD14 SM_CKE_3 M_B_CKE0 12,13 16 LA_CLK LVDSA_CLK PEG_RX#_8 PEG_RXN8 14
MUXING
BG37 D44 W49 PEG_RXN9
SM_CKE_4 M_B_CKE1 12,13 LVDSB_CLK# PEG_RX#_9 PEG_RXN9 14
E42 AD44 PEG_RXN10
LVDSB_CLK PEG_RX#_10 PEG_RXN10 14
LVDS
WW22 update BG20 AD40 PEG_RXN11
SM_CS#_0 M_A_CS#0 12,13 PEG_RX#_11 PEG_RXN11 14
--- MA14 needs BK16 G51 AG46 PEG_RXN12
SM_CS#_1 M_A_CS#1 12,13 16 LA_DATAN0 LVDSA_DATA#_0 PEG_RX#_12 PEG_RXN12 14
to be routed if BG16 E51 AH49 PEG_RXN13
SM_CS#_2 M_B_CS#0 12,13 16 LA_DATAN1 LVDSA_DATA#_1 PEG_RX#_13 PEG_RXN13 14
H10 BE13 F49 AG45 PEG_RXN14
customers are RSVD20 SM_CS#_3 M_B_CS#1 12,13 16 LA_DATAN2 LVDSA_DATA#_2 PEG_RX#_14 PEG_RXN14 14
B51 AG41 PEG_RXN15
planning on RSVD21 PEG_RX#_15 PEG_RXN15 14
BJ20 RSVD22 SM_ODT_0 BH18 M_A_ODT0 12,13
RSVD
using 2Gb BK22 BJ15 M_A_ODT1 12,13 16 LA_DATAP0 G50 J50 PEG_RXP0
PEG_RXP0 14
GRAPHICS
RSVD23 SM_ODT_1 LVDSA_DATA_0 PEG_RX_0 PEG_RXP1
technology and BF19 RSVD24 SM_ODT_2 BJ14 M_B_ODT0 12,13 16 LA_DATAP1 E50 LVDSA_DATA_1 PEG_RX_1 L50 PEG_RXP1 14
BH20 BE16 F48 M47 PEG_RXP2
DDR
width=8 (by 8) RSVD25 SM_ODT_3 M_B_ODT1 12,13 16 LA_DATAP2 LVDSA_DATA_2 PEG_RX_2 PEG_RXP2 14
BK18 U44 PEG_RXP3
DIMMs RSVD26 SMRCOMPP PEG_RX_3 PEG_RXP4
PEG_RXP3 14
BJ18 RSVD27 SM_RCOMP BL15 PEG_RX_4 T49 PEG_RXP4 14
BF23 BK14 SMRCOMPN G44 T41 PEG_RXP5
RSVD28 SM_RCOMP# LVDSB_DATA#_0 PEG_RX_5 PEG_RXP5 14
BG23 C375 0.1U/10V B47 W45 PEG_RXP6
RSVD29 LVDSB_DATA#_1 PEG_RX_6 PEG_RXP6 14
BC23 BK31 SM_RCOMP_VOH B45 W41 PEG_RXP7
RSVD30 SM_RCOMP_VOH LVDSB_DATA#_2 PEG_RX_7 PEG_RXP7 14
BD24 BL31 SM_RCOMP_VOL C376 0.1U/10V AB50 PEG_RXP8
RSVD31 SM_RCOMP_VOL PEG_RX_8 PEG_RXP8 14
13 SA_MA14 BJ29 Y48 PEG_RXP9
SA-MA14 PEG_RX_9 PEG_RXP9 14
13 SB_MA14 BE24 AR49 SMDDR_VREF_MCH R270 0 E44 AC45 PEG_RXP10
SB_MA14 SM_VREF_0 SMDDR_VREF LVDSB_DATA_0 PEG_RX_10 PEG_RXP10 14
BH39 AW4 R276 *10K/F A47 AC41 PEG_RXP11
RSVD34 SM_VREF_1 LVDSB_DATA_1 PEG_RX_11 PEG_RXP11 14
AW20 R269 *10K/F 1.8VSUS A45 AH47 PEG_RXP12
RSVD35 LVDSB_DATA_2 PEG_RX_12 PEG_RXP12 14
BK20 AG49 PEG_RXP13
RSVD36 PEG_RX_13 PEG_RXP13 14
CRESTLINE T183 C48 AH45 PEG_RXP14
PEG_RXP14 14
PCI-EXPRESS
T75 LVDSA_DATA#_3 connect to GND <design guide> PEG_RX_14 PEG_RXP15
new pin D47 LVDSA_DATA_3 DPLL_REF_CLK B42 DREFCLK 2 PEG_RX_15 AG42 PEG_RXP15 14
define B44 C42 nicole 10/19
RSVD39 DPLL_REF_CLK# DREFCLK# 2
C44 RSVD40 DPLL_REF_SSCLK H48 DREFSSCLK 2 E27 TVA_DAC PEG_TX#_0 N45 C_PEG_TXN0 C714 [email protected]/10V
PEG_TXN_C0 14
A35 RSVD41 DPLL_REF_SSCLK# H47 DREFSSCLK# 2 G27 TVB_DAC PEG_TX#_1 U39 C_PEG_TXN1 C718 [email protected]/10V
PEG_TXN_C1 14
CLK
B37 RSVD42 K27 TVC_DAC PEG_TX#_2 U47 C_PEG_TXN2 C721 [email protected]/10V
PEG_TXN_C2 14
B36 RSVD43 PEG_CLK K44 CLK_PCIE_3GPLL 2 PEG_TX#_3 N51 C_PEG_TXN3 C725 [email protected]/10V
PEG_TXN_C3 14
TV
B34 RSVD44 PEG_CLK# K45 CLK_PCIE_3GPLL# 2 F27 TVA_RTN PEG_TX#_4 R50 C_PEG_TXN4 C728 [email protected]/10V
PEG_TXN_C4 14
C34 RSVD45 J27 TVB_RTN PEG_TX#_5 T42 C_PEG_TXN5 C730 [email protected]/10V
PEG_TXN_C5 14
Layout Note: DMI_TXN[3:0] 21 L27 TVC_RTN PEG_TX#_6 Y43 C_PEG_TXN6 C734 [email protected]/10V
PEG_TXN_C6 14
Location of all MCH_CFG strap PEG_TX#_7 W46 C_PEG_TXN7 C737 [email protected]/10V
PEG_TXN_C7 14
AN47 DMI_TXN0 VCC3 R237 **[email protected] TV_DCONSEL_0 M35 W38 C_PEG_TXN8 C739 [email protected]/10V
B resistors needs to be close to DMI_RXN_0 TV_DCONSEL_0 PEG_TX#_8 PEG_TXN_C8 14 B
AJ38 DMI_TXN1 R267 **[email protected] TV_DCONSEL_1 P33 AD39 C_PEG_TXN9 C747 [email protected]/10V
DMI_RXN_1 TV_DCONSEL_1 PEG_TX#_9 PEG_TXN_C9 14
minmize stub. DMI_RXN_2 AN42 DMI_TXN2
PEG_TX#_10 AC46 C_PEG_TXN10C750 [email protected]/10V
PEG_TXN_C10 14
AN46 DMI_TXN3 <FAE> AC49 C_PEG_TXN11C756 [email protected]/10V
DMI_RXN_3 DMI_TXP[3:0] 21 PEG_TX#_11 PEG_TXN_C11 14
If no use can be NC
PEG_TX#_12 AC42 C_PEG_TXN12C761 [email protected]/10V
PEG_TXN_C12 14
AM47 DMI_TXP0 AH39 C_PEG_TXN13C763 [email protected]/10V
DMI_RXP_0 PEG_TX#_13 PEG_TXN_C13 14
P27 AJ39 DMI_TXP1 AE49 C_PEG_TXN14C767 [email protected]/10V
2 MCH_BSEL0 CFG_0 DMI_RXP_1 PEG_TX#_14 PEG_TXN_C14 14
R207 1K/F_4 N27 AN41 DMI_TXP2 AH44 C_PEG_TXN15C769 [email protected]/10V
VCCP CFG_1 DMI_RXP_2 PEG_TX#_15 PEG_TXN_C15 14
R196 1K/F_4 N24 AN45 DMI_TXP3
CFG_2 DMI_RXP_3 DMI_RXN[3:0] 21
T35 CFG3 C21 R82 *I@0 NB_B H32 M45 C_PEG_TXP0 C710 [email protected]/10V
CFG_3 16,24 CRT_B CRT_BLUE PEG_TX_0 PEG_TXP_C0 14
T177 CFG4 C23 AJ46 DMI_RXN0 G32 T38 C_PEG_TXP1 C715 [email protected]/10V
CFG_4 DMI_TXN_0 CRT_BLUE# PEG_TX_1 PEG_TXP_C1 14
DMI
11 MCH_CFG_5 CFG5 F23 AJ41 DMI_RXN1 R80 *I@0 NB_G K29 T46 C_PEG_TXP2 C720 [email protected]/10V
CFG_5 DMI_TXN_1 16,24 CRT_G CRT_GREEN PEG_TX_2 PEG_TXP_C2 14
T30 CFG6 N23 AM40 DMI_RXN2 J29 N50 C_PEG_TXP3 C724 [email protected]/10V
CFG_6 DMI_TXN_2 CRT_GREEN# PEG_TX_3 PEG_TXP_C3 14
T25 CFG7 G23 AM44 DMI_RXN3 R76 *I@0 NB_R F29 R51 C_PEG_TXP4 C727 [email protected]/10V
CFG_7 DMI_TXN_3 DMI_RXP[3:0] 21 16,24 CRT_R CRT_RED PEG_TX_4 PEG_TXP_C4 14
VGA
T27 CFG8 J20 E29 U43 C_PEG_TXP5 C729 [email protected]/10V
CFG_8 CRT_RED# PEG_TX_5 PEG_TXP_C5 14
CFG
11 MCH_CFG_9 CFG9 C20 AJ47 DMI_RXP0 W42 C_PEG_TXP6 C731 [email protected]/10V

CFG_9 DMI_TXP_0 PEG_TX_6 PEG_TXP_C6 14
T50 CFG10 R24 AJ42 DMI_RXP1 Y47 C_PEG_TXP7 C735 [email protected]/10V
CFG_10 DMI_TXP_1 PEG_TX_7 PEG_TXP_C7 14
T40 CFG11 L23 AM39 DMI_RXP2 R265 *I@0 DDC CLK K33 Y39 C_PEG_TXP8 C738 [email protected]/10V
CFG_11 DMI_TXP_2 16,24 CRTCLK CRT_DDC_CLK PEG_TX_8 PEG_TXP_C8 14
11 MCH_CFG_12 CFG12 J23 AM43 DMI_RXP3 R225 *I@0 DDCDATA G35 AC38 C_PEG_TXP9 C741 [email protected]/10V
CFG_12 DMI_TXP_3 16,24 CRTDAT CRT_DDC_DATA PEG_TX_9 PEG_TXP_C9 14
11 MCH_CFG_13 CFG13 E23 R86 *I@30 HSYN C11 F33 AD47 C_PEG_TXP10C749 [email protected]/10V
CFG_13 16,24 HSYNC_COM CRT_HSYNC PEG_TX_10 PEG_TXP_C10 14
T28 CFG14 E20 R203 E@0/[email protected] CRTIREF C32 AC50 C_PEG_TXP11C751 [email protected]/10V
CFG_14 CRT_TVO_IREF PEG_TX_11 PEG_TXP_C11 14
T31 CFG15 K23 R90 *I@30 VSYNC11 E33 AD43 C_PEG_TXP12C758 [email protected]/10V
CFG_15 16,24 VSYNC_COM CRT_VSYNC PEG_TX_12 PEG_TXP_C12 14
11 MCH_CFG_16 CFG16 M20 <check list & CRB> AG39 C_PEG_TXP13C762 [email protected]/10V
CFG_16 PEG_TX_13 PEG_TXP_C13 14
CFG17 <check list> AE50 C_PEG_TXP14C766 [email protected]/10V
GRAPHICS VID
T44 M24 CFG_17 For Calero : 255 PEG_TX_14 PEG_TXP_C14 14

CFG18 L32 AH43 C_PEG_TXP15C768 [email protected]/10V
T64 CFG_18 For Cresstline:1.3K/F HSYNC/VSYNC serial R PEG_TX_15 PEG_TXP_C15 14
11 MCH_CFG_19 CFG19 N33
11 MCH_CFG_20 CFG20 L35
CFG_19 For external VGA:0 ohm place close to NB
CFG_20 CRESTLINE_1p0
I&E Dis/Enable setting
GFX_VID_0 E35 GVR_VID0 39
22 PM_BMBUSY# R264 0 PM_BMBUSY#_R G41 A39
PM_BM_BUSY# GFX_VID_1 GVR_VID1 39
3,20,37 H_DPRSTP# R255 0 ICH_DPRSTP#_R L39 C38 <check list>
PM_DPRSTP# GFX_VID_2 GVR_VID2 39
13 PM_EXTTS#0 L36 B39 In Crestline EDS Rev.1.0, SDVO/PCIE/LVDS not implement,
PM_EXT_TS#_0 GFX_VID_3 GVR_VID3 39
PM
R247 0 PM_EXTTS#1_R J36 E36 DFGT_VR_EN 16 lanes NC

13 PM_EXTTS#1 PM_EXT_TS#_1 GFX_VR_EN Render Standby Voltage is not
AW49 T178
22 PWROK PWROK finalized yet(TBD), 1.05V for
C R177 100 PLTRST_MCH# AV20 update per design guide v1.1 C
14,21 PLT_RST-R# RSTIN#
3,20 PM_THRMTRIP# R178 *0 PM_THRMTRIP#_GMCH N20 9/29 Graphic Voltage
R240 0 PM_DPRSLPVR_GMCH G36 THERMTRIP# DREFSSCLK R274 E@0
22,37 DPRSLPVR DPRSLPVR range(VCC_AXG) is between
DREFSSCLK# R272 E@0
0.9975V(min.) and <Design Guide V1.1 P195>
VCCP
CL_CLK AM49 CL_CLK0 22
GMCH pwrok is 3.3v AK50 1.1025V(max.). Vgfx max at If no use DREFCLK PD and
CL_DATA CL_DATA0 22
tolerant BJ51 AT43 ECPWROK 17,22,36
1.1025V @ 8A (estimated) DREFCLK# PU
NC_1 CL_PWROK
ME
BK51 NC_2 CL_RST# AN49 CL_RST#0 22 I&E Dis/Enable setting

BK50 NC_3 CL_VREF AM50
BL50 MCH_CLVREF
NC_4 DREFCLK R268 E@0
BL49 NC_5
BL3 DREFCLK# R266 E@0 VCCP
NC_6 R259 E@0 DDC CLK
BL2 NC_7 only reserve AT3/5 not support IAMT,
NC
BK1 <design guide V1.1 P195> R231 E@0 DDCDATA

NC_8 but design guide suggest to connection
BJ1 H35 T215 If no use DREFCLK PD R514 E@0 L_DDC_CLK
E1
NC_9 SDVO_CTRL_CLK
K36
these pin ,do not NC and DREFCLK# PU R511 E@0 L_DDC_DATA
NC_10 SDVO_CTRL_DATA R257 E@0 L_CTRL_CLK
MISC
A5 NC_11 CLK_REQ# G39 PCIE_REQ4# 2

C51 G40 R239 E@0 L_CTRL_DATA
NC_12 ICH_SYNC# MCH_ICH_SYNC# 22
B50 R242 E@0 TV_DCONSEL_0
NC_13 <check list> R260 E@0 TV_DCONSEL_1
A50 NC_14 <check list>
A49 A37 For E@ For I@
NC_15 TEST_1
BK2 NC_16 TEST_2 R32 CLKREQ# ( MCH drives CLK_REQ# Connect to GND
Connect to 150ohm
to control the PCI-E diff clk input CRT R/G/B
2
CRESTLINE_1p0 CRT R/G/B TV A/B/C Per desigen guide V1.1 p195

R224 R246 itself ) TV A/B/C Connect to 30ohm nicole 10/20
20K 0 HSYNC/VSYNC
HSYNC/VSYNC
1.8VSUS
1
R220 E@0/I@150 NB_B

1
R200 E@0/I@150 NB_G

R202 E@0/I@150 NB_R
R211 R223 E@0 HSYN C11
1K/F VCC1.25 1.8VSUS R214 E@0 VSYNC11
2
SM_RCOMP_VOH
1
D D
1
C274 C268 R519

VCC3 .01U/25V 2.2U/10V 1K/F R152
R212 20/F
2
R509 1 2 10K PM_EXTTS#0 3.01K/F

2
R251 1 2 10K PM_EXTTS#1 MCH_CLVREF SMRCOMPP

2
SMRCOMPN
1
SM_RCOMP_VOL
2
C745 R516
PROJECT : CH3
1
C301 C315 0.1U/10V 392/F

.01U/25V 2.2U/10V R146
1
R226 20/F
2
1K/F
2
Size Document Number Rev

2
NB 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
07
A 13 M_A_DQ[63:0] 13 M_B_DQ[63:0] A
U25D
M_A_DQ0 AR43 BB19
SA_DQ_0 SA_BS_0 M_A_BS#0 12,13
M_A_DQ1 AW44 BK19 U25E
SA_DQ_1 SA_BS_1 M_A_BS#1 12,13
M_A_DQ2 BA45 BF29 M_B_DQ0 AP49 AY17
SA_DQ_2 SA_BS_2 M_A_BS#2 12,13 SB_DQ_0 SB_BS_0 M_B_BS#0 12,13
M_A_DQ3 AY46 M_B_DQ1 AR51 BG18
SA_DQ_3 M_A_CAS# 12,13 SB_DQ_1 SB_BS_1 M_B_BS#1 12,13
M_A_DQ4 AR41 BL17 M_B_DQ2 AW50 BG36
SA_DQ_4 SA_CAS# SB_DQ_2 SB_BS_2 M_B_BS#2 12,13
M_A_DQ5 AR45 M_B_DQ3 AW51
SA_DQ_5 M_A_DQM[0..7] 13 SB_DQ_3
M_A_DQ6 AT42 AT45 M_A_DQM0 M_B_DQ4 AN51 BE17
SA_DQ_6 SA_DM_0 SB_DQ_4 SB_CAS# M_B_CAS# 12,13
M_A_DQ7 AW47 BD44 M_A_DQM1 M_B_DQ5 AN50
SA_DQ_7 SA_DM_1 SB_DQ_5 M_B_DQM[0..7] 13
M_A_DQ8 BB45 BD42 M_A_DQM2 M_B_DQ6 AV50 AR50 M_B_DQM0
M_A_DQ9 SA_DQ_8 SA_DM_2 M_A_DQM3 M_B_DQ7 SB_DQ_6 SB_DM_0 M_B_DQM1
BF48 SA_DQ_9 SA_DM_3 AW38 AV49 SB_DQ_7 SB_DM_1 BD49
M_A_DQ10 BG47 AW13 M_A_DQM4 M_B_DQ8 BA50 BK45 M_B_DQM2
BJ45 SA_DQ_11 SA_DM_5 BG8 BB50 SB_DQ_9 SB_DM_3 BL39
M_A_DQ12 BB47 AY5 M_A_DQM6 M_B_DQ10 BA49 BH12 M_B_DQM4
BG50 SA_DQ_13 SA_DM_7 AN6 BE50 SB_DQ_11 SB_DM_5 BJ7
M_A_DQ14 BH49 M_B_DQ12 BA51 BF3 M_B_DQM6
SA_DQ_14 M_A_DQS[7:0] 13 SB_DQ_12 SB_DM_6
M_A_DQ15 BE45 AT46 M_A_DQS0 M_B_DQ13 AY49 AW2 M_B_DQM7
M_A_DQ16 SA_DQ_15 SA_DQS_0 M_A_DQS1 M_B_DQ14 SB_DQ_13 SB_DM_7
A
AW43 SA_DQ_16 SA_DQS_1 BE48 BF50 SB_DQ_14 M_B_DQS[7:0] 13
M_A_DQ17 BE44 BB43 M_A_DQS2 M_B_DQ15 BF49 AT50 M_B_DQS0
M_A_DQ18 SA_DQ_17 SA_DQS_2 M_A_DQS3 M_B_DQ16 SB_DQ_15 SB_DQS_0 M_B_DQS1
BG42 SA_DQ_18 SA_DQS_3 BC37 BJ50 SB_DQ_16 SB_DQS_1 BD50
M_A_DQ19 M_A_DQS4 M_B_DQ17 M_B_DQS2
B
BE40 SA_DQ_19 SA_DQS_4 BB16 BJ44 SB_DQ_17 SB_DQS_2 BK46
M_A_DQ20 BF44 BH6 M_A_DQS5 M_B_DQ18 BJ43 BK39 M_B_DQS3
SA_DQ_20 SA_DQS_5 SB_DQ_18 SB_DQS_3
MEMORY
M_A_DQ21 BH45 BB2 M_A_DQS6 M_B_DQ19 BL43 BJ12 M_B_DQS4
M_A_DQ22 SA_DQ_21 SA_DQS_6 M_A_DQS7 M_B_DQ20 SB_DQ_19 SB_DQS_4 M_B_DQS5
BG40 SA_DQ_22 SA_DQS_7 AP3 M_A_DQS#[7:0] 13 BK47 SB_DQ_20 SB_DQS_5 BL7
M_A_DQ23 BF40 AT47 M_A_DQS#0 M_B_DQ21 BK49 BE2 M_B_DQS6
SA_DQ_23 SA_DQS#_0 SB_DQ_21 SB_DQS_6
MEMORY
M_A_DQ24 AR40 BD47 M_A_DQS#1 M_B_DQ22 BK43 AV2 M_B_DQS7
SA_DQ_24 SA_DQS#_1 SB_DQ_22 SB_DQS_7 M_B_DQS#[7:0] 13
M_A_DQ25 AW40 BC41 M_A_DQS#2 M_B_DQ23 BK42 AU50 M_B_DQS#0
M_A_DQ26 SA_DQ_25 SA_DQS#_2 M_A_DQS#3 M_B_DQ24 SB_DQ_23 SB_DQS#_0 M_B_DQS#1
AT39 SA_DQ_26 SA_DQS#_3 BA37 BJ41 SB_DQ_24 SB_DQS#_1 BC50
M_A_DQ27 AW36 BA16 M_A_DQS#4 M_B_DQ25 BL41 BL45 M_B_DQS#2
B AW41 SA_DQ_28 SA_DQS#_5 BH7 BJ37 SB_DQ_26 SB_DQS#_3 BK38 B
M_A_DQ29 AY41 BC1 M_A_DQS#6 M_B_DQ27 BJ36 BK12 M_B_DQS#4
AV38 SA_DQ_30 SA_DQS#_7 AP2 BK41 SB_DQ_28 SB_DQS#_5 BK7
M_A_DQ31 AT38 M_B_DQ29 BJ40 BF2 M_B_DQS#6
SA_DQ_31 M_A_A[13:0] 12,13 SB_DQ_29 SB_DQS#_6
M_A_DQ32 AV13 BJ19 M_A_A0 M_B_DQ30 BL35 AV3 M_B_DQS#7
M_A_DQ33 SA_DQ_32 SA_MA_0 M_A_A1 M_B_DQ31 SB_DQ_30 SB_DQS#_7
AT13 SA_DQ_33 SA_MA_1 BD20 BK37 SB_DQ_31 M_B_A[13:0] 12,13
SYSTEM
M_A_DQ34 AW11 BK27 M_A_A2 M_B_DQ32 BK13 BC18 M_B_A0

M_A_DQ35 SA_DQ_34 SA_MA_2 M_A_A3 M_B_DQ33 SB_DQ_32 SB_MA_0 M_B_A1
AV11 SA_DQ_35 SA_MA_3 BH28 BE11 SB_DQ_33 SB_MA_1 BG28
M_A_DQ36 AU15 BL24 M_A_A4 M_B_DQ34 BK11 BG25 M_B_A2
SA_DQ_36 SA_MA_4 SB_DQ_34 SB_MA_2
SYSTEM
M_A_DQ37 AT11 BK28 M_A_A5 M_B_DQ35 BC11 AW17 M_B_A3
BA13 SA_DQ_38 SA_MA_6 BJ27 BC13 SB_DQ_36 SB_MA_4 BF25
M_A_DQ39 BA11 BJ25 M_A_A7 M_B_DQ37 BE12 BE25 M_B_A5
BE10 SA_DQ_40 SA_MA_8 BL28 BC12 SB_DQ_38 SB_MA_6 BA29
M_A_DQ41 BD10 BA28 M_A_A9 M_B_DQ39 BG12 BC28 M_B_A7
BD8 SA_DQ_42 SA_MA_10 BC19 BJ10 SB_DQ_40 SB_MA_8 AY28
M_A_DQ43 AY9 BE28 M_A_A11 M_B_DQ41 BL9 BD37 M_B_A9
BG10 SA_DQ_44 SA_MA_12 BG30 BK5 SB_DQ_42 SB_MA_10 BG17
M_A_DQ45 AW9 BJ16 M_A_A13 M_B_DQ43 BL5 BE37 M_B_A11
M_A_DQ46 SA_DQ_45 SA_MA_13 M_B_DQ44 SB_DQ_43 SB_MA_11 M_B_A12
BD7 BK9 BA39
DDR
M_A_DQ47 SA_DQ_46 M_B_DQ45 SB_DQ_44 SB_MA_12 M_B_A13

BB9 SA_DQ_47 BK10 SB_DQ_45 SB_MA_13 BG13
M_A_DQ48 BB5 BE18 M_B_DQ46 BJ8
SA_DQ_48 SA_RAS# M_A_RAS# 12,13 SB_DQ_46
M_A_DQ49 AY7 AY20 TP_SA_RCVEN# M_B_DQ47 BJ6 AV16
DDR
SA_DQ_49 SA_RCVEN# SB_DQ_47 SB_RAS# M_B_RAS# 12,13
M_A_DQ50 AT5 T21 M_B_DQ48 BF4 AY18 TP_SB_RCVEN# T19
M_A_DQ51 SA_DQ_50 M_B_DQ49 SB_DQ_48 SB_RCVEN#
AT7 SA_DQ_51 SA_WE# BA19 M_A_WE# 12,13 BH5 SB_DQ_49
M_A_DQ52 AY6 M_B_DQ50 BG1 BC17
SA_DQ_52 SB_DQ_50 SB_WE# M_B_WE# 12,13
M_A_DQ53 BB7 M_B_DQ51 BC2
M_A_DQ54 SA_DQ_53 M_B_DQ52 SB_DQ_51
AR5 SA_DQ_54 BK3 SB_DQ_52
M_A_DQ55 AR8 M_B_DQ53 BE4
AR9 SA_DQ_56 BD3 SB_DQ_54
M_A_DQ57 AN3 M_B_DQ55 BJ2
C
M_A_DQ58 SA_DQ_57 M_B_DQ56 SB_DQ_55 C
AM8 SA_DQ_58 BA3 SB_DQ_56
M_A_DQ59 AN10 M_B_DQ57 BB3
AT9 SA_DQ_60 AR1 SB_DQ_58
M_A_DQ61 AN9 M_B_DQ59 AT3
AM9 SA_DQ_62 AY2 SB_DQ_60
M_A_DQ63 AN11 M_B_DQ61 AY3
SA_DQ_63 M_B_DQ62 SB_DQ_61
AU2 SB_DQ_62
CRESTLINE_1p0 M_B_DQ63 AT2 SB_DQ_63
CRESTLINE_1p0
D D
PROJECT : CH3
NB 1A

1 2 3 4 5 6 7 8
5 4 3 2 1
VCCP
INT: 1.6A
EXT:1.3A
AT35
AT34
AH28
U25G
VCC_1
VCC_2
VCC_3
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
T17
T18
VCC3
R125
1
10
2
D5
+VCC_GMCH_L 1
CH751H-40HPT
2 AB33
AB36
AB37
U25F
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
08
AC32 VCC_5 VCC_AXG_NCTF_3 T19 Ivcc (External GFX 1.310 A, AC33 VCC_NCTF_4 VSS_NCTF_1 T27
AC31 VCC_4 VCC_AXG_NCTF_4 T21 AC35 VCC_NCTF_5 VSS_NCTF_2 T37
AK32 T22 integrate 1.572 A) AC36 U24
VCC CORE
VCC_6 VCC_AXG_NCTF_5 VCC_NCTF_6 VSS_NCTF_3
AJ31 VCC_7 VCC_AXG_NCTF_6 T23 AD35 VCC_NCTF_7 VSS_NCTF_4 U28
AJ28 T25 VCCP AD36 V31
AH32 VCC_9 VCC_AXG_NCTF_8 U15 AF33 VCC_NCTF_9 VSS_NCTF_6 V35
D
AH31 VCC_10 VCC_AXG_NCTF_9 U16 AF36 VCC_NCTF_10 VSS_NCTF_7 AA19 D
AH29 VCC_11 VCC_AXG_NCTF_10 U17 AH33 VCC_NCTF_11 VSS_NCTF_8 AB17
AF32 VCC_12 VCC_AXG_NCTF_11 U19 AH35 VCC_NCTF_12 VSS_NCTF_9 AB35
VSS NCTF
VCC_AXG_NCTF_12 U20 AH36 VCC_NCTF_13 VSS_NCTF_10 AD19
1
U21 + AH37 AD37
VCC_AXG_NCTF_13 C507 C278 C276 C273 C333 VCC_NCTF_14 VSS_NCTF_11
VCC_AXG_NCTF_14 U23 AJ33 VCC_NCTF_15 VSS_NCTF_12 AF17
R30 U26 Layout Note: 220U/2.5V 22U/4V 0.22U/10V 0.22U/10V 0.1U/10V AJ35 AF35
2
VCC_AXG_NCTF_16 V16 370 mils from edge. AK33 VCC_NCTF_17 VSS_NCTF_14 AK17
IVCCSM supply VCC_AXG_NCTF_17 V17 AK35 VCC_NCTF_18 VSS_NCTF_15 AM17
VCC_AXG_NCTF_18 V19 Layout Note: AK36 VCC_NCTF_19 VSS_NCTF_16 AM24
current 1 VCC_AXG_NCTF_19 V20 Inside GMCH cavity. AK37 VCC_NCTF_20 VSS_NCTF_17 AP26
channel 1.615A 2 VCC_AXG_NCTF_20 V21 AD33 VCC_NCTF_21 VSS_NCTF_18 AP28
VCC_AXG_NCTF_21 V23 AJ36 VCC_NCTF_22 VSS_NCTF_19 AR15
channel 3.318A VCC_AXG_NCTF_22 V24 AM35 VCC_NCTF_23 VSS_NCTF_20 AR19
VCC NCTF
Y15 AL33 AR28
1.8VSUS
POWER VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
Y16
Y17
Ivcc_AXG Graphics core supply +VGFX_CORE AL35
AA33
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VSS_NCTF_21
AU32 VCC_SM_1 VCC_AXG_NCTF_26 Y19 current 7.7A AA35 VCC_NCTF_27

AU33 VCC_SM_2 VCC_AXG_NCTF_27 Y20 AA36 VCC_NCTF_28
AU35 VCC_SM_3 VCC_AXG_NCTF_28 Y21 AP35 VCC_NCTF_29
1
AV33 Y23 R187 AP36
VCC_SM_4 VCC_AXG_NCTF_29 + C694 + C705 E@0_0603 VCC_NCTF_30
AW33 VCC_SM_5 VCC_AXG_NCTF_30 Y24 AR35 VCC_NCTF_31
AW35 Y26 *I@330U/6.3V *I@330U/6.3V AR36
VCC_SM_6 VCC_AXG_NCTF_31 VCC_NCTF_32
AY35 Y28 Y32
2
BA32 Y29 Y33
BA33
BA35
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
AA16
AA17 Layout Note:
Y35
Y36
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
POWER
BB33 VCC_SM_11 VCC_AXG_NCTF_36 AB16 370 mils from edge. A test check Y37 VCC_NCTF_37 VSS_SCB1 A3
BC32 AB19 when use T30 B2
VSS SCB
VCC_SM_12 VCC_AXG_NCTF_37 VCC_NCTF_38 VSS_SCB2
BC33 VCC_SM_13 VCC_AXG_NCTF_38 AC16 external VGA can T34 VCC_NCTF_39 VSS_SCB3 C1
C BC35 VCC_SM_14 VCC_AXG_NCTF_39 AC17 remove or not.. T35 VCC_NCTF_40 VSS_SCB4 BL1 C
BD32 VCC_SM_15 VCC_AXG_NCTF_40 AC19 Layout Note: U29 VCC_NCTF_41 VSS_SCB5 BL51
BD35 AD15 andrew U31 A51
VCC_SM_16 VCC_AXG_NCTF_41 Inside GMCH cavity for VCC_AXG. VCC_NCTF_42 VSS_SCB6
BE32 VCC_SM_17 VCC_AXG_NCTF_42 AD16 U32 VCC_NCTF_43
BE33 VCC_SM_18 VCC_AXG_NCTF_43 AD17 U33 VCC_NCTF_44
BE35 VCC_SM_19 VCC_AXG_NCTF_44 AF16 U35 VCC_NCTF_45
VCC GFX NCTF
BF33 AF19 U36

VCC SM
1
BF34 VCC_SM_21 VCC_AXG_NCTF_46 AH15 V32 VCC_NCTF_47
BG32 AH16 C237 C231 C222 C220 C250 C227 V33
VCC_SM_22 VCC_AXG_NCTF_47 *[email protected]/10V *[email protected]/10V *[email protected]/10V*I@1U/10V *I@10U/6.3V *I@22U/4V VCC_NCTF_48
BG33 AH17 2 for IAMT power if not V36
2
VCC_SM_23 VCC_AXG_NCTF_48 VCC_NCTF_49 VCCP
BG35 VCC_SM_24 VCC_AXG_NCTF_49 AH19 support need to V37 VCC_NCTF_50
BH32 VCC_SM_25 VCC_AXG_NCTF_50 AJ16 connection to S0 power
BH34 VCC_SM_26 VCC_AXG_NCTF_51 AJ17 VCC_AXM_1 AT33
BH35 AJ19 AT31
VCC AXM
VCC_SM_27 VCC_AXG_NCTF_52 VCC_AXM_2
BJ32 VCC_SM_28 VCC_AXG_NCTF_53 AK16 VCC_AXM_3 AK29
BJ33 VCC_SM_29 VCC_AXG_NCTF_54 AK19 VCC_AXM_4 AK24
BJ34 VCC_SM_30 VCC_AXG_NCTF_55 AL16 Layout Note: VCC_AXM_5 AK23
BK32 AL17 VCCP AL24 AJ26
VCC_SM_31 VCC_AXG_NCTF_56 Inside GMCH VCC_AXM_NCTF_1 VCC_AXM_6
BK33 VCC_SM_32 VCC_AXG_NCTF_57 AL19 GMCH 1.05V current(A) Remark AL26 VCC_AXM_NCTF_2 VCC_AXM_7 AJ23
BK34 AL20
cavity. AL28
VCC_SM_33 VCC_AXG_NCTF_58 VCC_AXM_NCTF_3
BK35 VCC_SM_34 VCC_AXG_NCTF_59 AL21 ( 1.3A for AM26 VCC_AXM_NCTF_4
BL33 VCC_SM_35 VCC_AXG_NCTF_60 AL23 VCC Core 1.573 external Ivcc_AXM AM28 VCC_AXM_NCTF_5
VCC AXM NCTF

AU30 VCC_SM_36 VCC_AXG_NCTF_61 AM15 GFX ) AM29 VCC_AXM_NCTF_6
VCC_AXG_NCTF_62 AM16 for integrated Controller C316 C322 C279 AM31 VCC_AXM_NCTF_7
AM19 VCC_AXG 7.7 Gfx 0.1U/10V 0.1U/10V 0.1U/10V AM32
supply
2
+VGFX_CORE VCC_AXG_NCTF_63 VCC_AXM_NCTF_8
VCC_AXG_NCTF_64 AM20 AM33 VCC_AXM_NCTF_9
VCC_AXG_NCTF_65 AM21 current AP29 VCC_AXM_NCTF_10
R20 VCC_AXG_1 VCC_AXG_NCTF_66 AM23 VCC_AXD 0.2 540mA AP31 VCC_AXM_NCTF_11
T14 VCC_AXG_2 VCC_AXG_NCTF_67 AP15 AP32 VCC_AXM_NCTF_12
B
W13 VCC_AXG_3 VCC_AXG_NCTF_68 AP16 AP33 VCC_AXM_NCTF_13 B
W14 VCC_AXG_4 VCC_AXG_NCTF_69 AP17 VTT 0.85 FSB VCCP AL29 VCC_AXM_NCTF_14
Y12 VCC_AXG_5 VCC_AXG_NCTF_70 AP19 AL31 VCC_AXM_NCTF_15
1
AA20 VCC_AXG_6 VCC_AXG_NCTF_71 AP20 AL32 VCC_AXM_NCTF_16
AA23 AP21 VCC_PEG 1.2 for PCIEG C674 C321 C303 AR31
VCC_AXG_7 VCC_AXG_NCTF_72 22U/4V 0.22U/10V 0.22U/10V VCC_AXM_NCTF_17
AA26 AP23 AR32
2
VCC_AXG_8 VCC_AXG_NCTF_73 VCC_AXM_NCTF_18
AA28 VCC_AXG_9 VCC_AXG_NCTF_74 AP24 AR33 VCC_AXM_NCTF_19
AB21 VCC_AXG_10 VCC_AXG_NCTF_75 AR20 VCC_AXM 0.54 for IAMT
AB24 VCC_AXG_11 VCC_AXG_NCTF_76 AR21 function
AB29 VCC_AXG_12 VCC_AXG_NCTF_77 AR23 Layout Note:
AC20 VCC_AXG_13 VCC_AXG_NCTF_78 AR24 Place close to GMCH edge.
AC21 AR26 VCCR_RX_DMI 0.25 DMI CRESTLINE_1p0
VCC_AXG_14 VCC_AXG_NCTF_79
VCC GFX
AC23 VCC_AXG_15 VCC_AXG_NCTF_80 V26

AC24 VCC_AXG_16 VCC_AXG_NCTF_81 V28
AC26 VCC_AXG_17 VCC_AXG_NCTF_82 V29 SUM 12.313
AC28 Y31 1.8VSUS 1.8VSUS
VCC_AXG_18 VCC_AXG_NCTF_83
AC29 VCC_AXG_19
AD20 VCC_AXG_20
AD23 VCC_AXG_21
1
AD24 AW45 VCCSM_LF1
VCC SM LF
VCC_AXG_22 VCC_SM_LF1
1
AD28 BC39 VCCSM_LF2 +
1
AF21 BE39 VCCSM_LF3 C733 C302 C263
VCC_AXG_24 VCC_SM_LF3 VCCSM_LF4 C293 330U/6.3V 22U/4V 22U/4V
AF26 BD17
2
VCC_AXG_25 VCC_SM_LF4 VCCSM_LF5 0.1U/10V
AA31 BD4
2
VCC_AXG_26 VCC_SM_LF5 VCCSM_LF6
AH20 VCC_AXG_27 VCC_SM_LF6 AW8
AH21 AT6 VCCSM_LF7
AH23 VCC_AXG_29
1
AH24 VCC_AXG_30
Layout Note:
AH26 C210 C212 C196 C235 C327 C349 C388 Layout Note: Place on the edge.
VCC_AXG_31 0.1U/10V 0.1U/10V 0.22U/10V 0.22U/10V 0.47U/10V 1U/10V 1U/10V
AD31 Place C293 where LVDS
2
VCC_AXG_32
A AJ20 VCC_AXG_33
A
AN14
and DDR2 taps.
VCC_AXG_34
PROJECT : CH3
CRESTLINE_1p0
NB 1A

5 4 3 2 1
5 4 3 2 1
I&E Dis/Enable setting
LVDS Disable/Enable guideline

09
+3V_VCCSYNC External VGA with E@part,Internal VGA with I@ part
30mA
R160 *I@0 If SDVO Disable If LVDS
VCC3
R147 CRT/TV Disable/Enable guideline Signal LVDS Disable enable
<FAE> C232 External VGA with E@part,Internal VGA with I@ part
INT VGA disable VCCSYNC E@0 VCCD_LVDS GND 1.8V
connect to GND *[email protected] Ball Enable Disable Ball Enable Disable
VCCA_LVDS GND 1.8V
VCCA_CRT_DAC 3.3V GND VCCA_TVC_DAC 3.3V GND VCC_TX_LVDS GND 1.8V
L20 80mA
D VCC3 1 2 +3V_VCCA_CRT_DAC VCCD_CRT 1.5V GND VCCD_TVDAC 1.5V 1.5V D
*I@BLM18PG181SN1
C680
1
Add the 100uF CAP for BenQ requirement. + R126 VCCD_QDAC 1.5V GND VCCA_DAC_BG 3.3V GND
SG Tie 061010 C207 C182
100U/6.3V_3528 *[email protected] *I@22N E@0
2
VCCA_TVA_DAC 3.3V GND VSS_DAC_BG GND GND
VCCA_TVB_DAC 3.3V GND VCCSYNC 3.3V GND

+3V_TV_DAC R195 *[email protected]/F VCCP
2 1 +VCC_TVBG
R216
2
C292 C314 E@0 Update this net name
*[email protected] *I@22N nicole 9/25 U25H D8
2
CH751H-40HPT_NC 40 mil
J32 U13
1
VCCSYNC VTT_1
VTT_2 U12
VCC1.25 A33 VCCA_CRT_DAC_1 VTT_3 U11 Ivcc_VTT FSB
1
B33 U9
VCCA_CRT_DAC_2 VTT_4
U8 C202 C300 supply
CRT
VTT_5
1
U7 2.2U/6.3V 4.7U/10V current
2
R642 VTT_6 +3V_VCC_HV
A30 U5
0 VCC1.25
80mA
VCCA_DAC_BG VTT_7
U3
0.85A R273
L38 VTT_8 10
50mA B32 VSSA_DAC_BG VTT_9 U2
L55 2 1 +1.25V_VCCA_DPLLA U1 VCCP
2
VTT_10
+VCCA_MPLL_L
2 1 +1.25V_VCCA_HPLL 10uH/100MA T13 Place on the edge.

BLM11A121S
1
+1.25V_VCCA_DPLLA B49 VTT_11 R244 0
VCCA_DPLLA VTT_12 T11
1
VTT
10uH+-20%_100mA + C707 C400 T10
VTT_13
1
C671 470U/4V +1.25V_VCCA_DPLLB H49 T9

C164 0.1U/10V 0.1U/10V VCCA_DPLLB VTT_14
T7
PLL
2
2
VTT_15
1
22U/10V +1.25V_VCCA_HPLL AL2 T6
2
+1.8VSUS_VCC_TX_LVDS VCCA_HPLL VTT_16 C259 C675 + C677 VCC3

VTT_17 T5
80mA +1.25V_VCCA_MPLL AM2 T3 0.47U/6.3V 4.7U/10V 220U/4V
2
L54 L22 VCCA_MPLL VTT_18
400mA T2
2
BLM11A121S +1.25V_VCCA_DPLLB VTT_19
2 1 10mA R3
A LVDS
+1.25V_VCCA_MPLL 10uH/100MA VTT_20
2 1 A41 VCCA_LVDS VTT_21 R2
1
C696 R1 VCC1.25 VCC1.25

VTT_22
1
R473 0.5/F 0.1Caps should be + C703 C243 R507 E@0 B41 Place on the edge. 520mA
C 470U/4V VCC3 *I@1000P VSSA_LVDS C
1 2 placed 200 mils
1
0.1U/10V AT23 +1.25V_AXD 1 2

2
C676 with in its pins. VCC_AXD_1

AU28 R508
VCC_AXD_2
1
0.1U/10V K50 AU24 L23 0

2
VCCA_PEG_BG VCC_AXD_3 0
1
C174 100mA AT29 500mA
A PEG
VCC_AXD_4
AXD
22U/10V C311 K49 AT25 C242 C246
2
0.1U/10V VSSA_PEG_BG VCC_AXD_5 1U/10V 22U/10V +1.25V_VCC_AXF

100mA AT30 Place caps close
2
VCC_AXD_6
to VCC_AXD.
2
+1.25V_VCCD_PEG_PLL U51 AR29
VCCA_PEG_PLL VCC_AXD_NCTF
1
640mA C699 C701
VCC1.25 R151 0 +1.25V_VCCA_SM AW18 B23 +1.25V_VCC_AXF 1U/10V 10U/6.3V
2
VCCA_SM_1 VCC_AXF_1
1
AV19 B21
AXF
VCCA_SM_2
POWER VCC_AXF_2
1
+ C757 C245 C252 C228 C255 AU19 A21 +1.25V_VCC_DMI 100mA
100U/6.3V 4.7U/6.3V 22U/4V 22U/4V 1U/10V VCCA_SM_3 VCC_AXF_3
AU18 VCCA_SM_4
AU17 AJ50 +1.25V_VCC_DMI R518 0 VCC1.25
2
2
VCCA_SM_5 VCC_DMI
Place caps close
A SM
1
AT22 VCCA_SM_7 to VCC_AXF
AT21 BK24 +1.8VSUS_VCC_SM_CK C742
SM CK
VCCA_SM_8 VCC_SM_CK_1 0.1U/10V
200mA AT19 BK23 200mA
2
+3V_TV_DAC VCC1.25 VCCA_SM_9 VCC_SM_CK_2
AT18 VCCA_SM_10 VCC_SM_CK_3 BJ24
1
L21 40mA C262 C270 C269 C253 AT17 BJ23
VCC3 22U/4V 1U/10V 1U/10V 0.1U/10V VCCA_SM_11 VCC_SM_CK_4 +1.8VSUS_VCC_TX_LVDS 1.8VSUS
1 2 AR17 VCCA_SM_NCTF_1
AR16 100mA
2
2
VCCA_SM_NCTF_2
1
*I@BLM18PG181SN1 L56 *I@1UH

1
C233 C240 R173 E@0 A43 +1.8VSUS_VCC_TX_LVDS 2 1
A CK
C217 *[email protected] *I@22N VCC_TX_LVDS
BC29
2
VCCA_SM_CK_1
1
*I@10U BB29 +3V_VCC_HV 1uH+-20%_300mA
2
VCCA_SM_CK_2
1
C40 R506 +
VCC_HV_1 E@0 C695 C698
40mA C25 B40
HV
VCCA_TVA_DAC_1 VCC_HV_2 *I@1000P *I@220U
B25 100mA
2
VCCA_TVA_DAC_2
1
C27 VCCA_TVB_DAC_1 I&E Dis/Enable setting
1
22nF & 0.1uF for B27 AD51 C360
TV
C691 C213 R481 E@0 VCCA_TVB_DAC_2 VCC_PEG_1 0.1U/10V
VCC_TVDACA:C_R should be B28 W50
2
*[email protected] *I@22N VCCA_TVC_DAC_1 VCC_PEG_2 +VCC_PEG VCCP
placed with in 250 mils A28 W51
2
VCCA_TVC_DAC_2 VCC_PEG_3
PEG
VCC1.5 V49 L61 Ivcc_PEG
D TV/CRT
from Crestline. R197 E@0 VCC_PEG_4
60mA VCC_PEG_5 V50 2 1
supply current
40mA R205 *I@0 +1.5V_VCCD_CRT M32 91nH/1.5A
VCCD_CRT
1
L29 VCCD_TVDAC 91uH+-20%_1.5A 1.25A
1
AH50 +VCC_RXR_DMI +
DMI
VCC_RXR_DMI_1
1
+VCCQ_TVDAC N28 AH51 C746 C743

VCCD_QDAC VCC_RXR_DMI_2
1
C692 C225 R482 E@0 +VCCA_MPLL_L 220U/4V 10U/6.3V
2
B *[email protected] +VCCA_MPLL_L AN2 B
2
*I@22N VCCD_HPLL +VTTLF1 VCCP

A7 Ivcc_RX_DMI
VTTLF
2
+1.25V_VCCD_PEG_PLL U48 VTTLF1 +VTTLF2

250mA VCCD_PEG_PLL VTTLF2 F2
supply current
AH1 +VTTLF3 L35
LVDS
VTTLF3
1
VCC1.5 J41 2 1 260mA

C679 C754 VCCD_LVDS_1 91nH/1.5A
Update all 22nF CAP to 2pin 120mA H42 VCCD_LVDS_2
1
0.1U/10V 0.1U/10V 91uH+-20%_1.5A
nicole 12/01
2
1
+
1
150mA C760 C483

C334 C324 CRESTLINE_1p0 220U/4V 10U/6.3V
2
0.1U/10V 22N
2
1.8VSUS
R219 *I@0 +1.8V_VCCD_LVDS
+VTTLF1
L30 +VTTLF2
1 2 C310 C329 R236 +VTTLF3
*I@BLM18PG181SN1
1
*I@1U *I@10U E@0 1.8VSUS
1
FB_180ohm+-25%_ C347 R254 C673 C683 C678 L57 1uH/300mA

C350 0.47U/10V 0.47U/10V 0.47U/10V +1.8VSUS_VCC_SM_CK 2 1
100mHz_1500mA_
2
*[email protected] *I@22N E@0
2
1
0.09ohm DC 1uH+-20%_300mA
R221
1
1/F/0603
C711 C287
1 2
22U/10V 0.1U/10V +VCC_SM_CK_L
2
C297
10U/6.3V
2
VCC1.25
L59 100mA
1 2 +1.25V_VCCD_PEG_PLL
BLM21PG221SN1D
1
R517
+ C759 1/F/0603
1
1 2
220U C755
Add for BenQ request 0.1U/10V
2
nicole 10/23 C753

A 10U/6.3V A
2
PROJECT : CH3
NB 1A

5 4 3 2 1
5 4 3 2 1
A13
A15
U25I
VSS_1
VSS_2
VSS_100
VSS_101
AW24
AW29
C46
C50
C7
U25J
VSS_199
VSS_200
VSS_201
VSS_287
VSS_288
VSS_289
W11
W39
W43
10
A17 VSS_3 VSS_102 AW32 D13 VSS_202 VSS_290 W47
A24 VSS_4 VSS_103 AW5 D24 VSS_203 VSS_291 W5
AA21 VSS_5 VSS_104 AW7 D3 VSS_204 VSS_292 W7
AA24 VSS_6 VSS_105 AY10 D32 VSS_205 VSS_293 Y13
AA29 VSS_7 VSS_106 AY24 D39 VSS_206 VSS_294 Y2
D
AB20 VSS_8 VSS_107 AY37 D45 VSS_207 VSS_295 Y41 D
AB23 VSS_9 VSS_108 AY42 D49 VSS_208 VSS_296 Y45
AB26 VSS_10 VSS_109 AY43 E10 VSS_209 VSS_297 Y49
AC10 VSS_13 VSS_112 AY50 E28 VSS_212 VSS_300 Y11
AC13 VSS_14 VSS_113 B10 E32 VSS_213 VSS_301 P29
AC3 VSS_15 VSS_114 B20 E47 VSS_214 VSS_302 T29
AC39 VSS_16 VSS_115 B24 F19 VSS_215 VSS_303 T31
AC43 VSS_17 VSS_116 B29 F36 VSS_216 VSS_304 T33
AC47 VSS_18 VSS_117 B30 F4 VSS_217 VSS_305 R28
AD1 VSS_19 VSS_118 B35 F40 VSS_218
AD21 VSS_20 VSS_119 B38 F50 VSS_219
AD26 VSS_21 VSS_120 B43 G1 VSS_220
AD29 VSS_22 VSS_121 B46 G13 VSS_221 VSS_306 AA32
AD3 VSS_23 VSS_122 B5 G16 VSS_222 VSS_307 AB32
AD41 VSS_24 VSS_123 B8 G19 VSS_223 VSS_308 AD32
AD45 VSS_25 VSS_124 BA1 G24 VSS_224 VSS_309 AF28
AD49 VSS_26 VSS_125 BA17 G28 VSS_225 VSS_310 AF29
AD5 VSS_27 VSS_126 BA18 G29 VSS_226 VSS_311 AT27
AD50 VSS_28 VSS_127 BA2 G33 VSS_227 VSS_312 AV25
AD8 VSS_29 VSS_128 BA24 G42 VSS_228 VSS_313 H50
AE10 VSS_30 VSS_129 BB12 G45 VSS_229
AE14 VSS_31 VSS_130 BB25 G48 VSS_230
AE6 VSS_32 VSS_131 BB40 G8 VSS_231
AF20 BB44 H24
AF23
AF24
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
BB49
BB8
H28
H4
VSS_232
VSS_233
VSS_234
AF31 VSS_36 VSS_135 BC16 H45 VSS_235
AG2 VSS_37 VSS_136 BC24 J11 VSS_236
C AG38 VSS_38 VSS_137 BC25 J16 VSS_237
C
AG43 VSS_39 VSS_138 BC36 J2 VSS_238
AG47 VSS_40 VSS_139 BC40 J24 VSS_239
AG50 VSS_41 VSS_140 BC51 J28 VSS_240
AH3 BD13 J33
AH40
AH41
VSS_42
VSS_43
VSS_44
VSS_141
VSS_142
VSS_143
BD2
BD28
J35
J39
VSS_241
VSS_242
VSS_243
VSS
AH7 VSS_45 VSS_144 BD45
AH9 VSS_46 VSS_145 BD48 K12 VSS_245
AJ11 VSS_47 VSS_146 BD5 K47 VSS_246
AJ13 VSS_48 VSS_147 BE1 K8 VSS_247
AJ21 VSS_49 VSS_148 BE19 L1 VSS_248
AJ24 VSS_50 VSS_149 BE23 L17 VSS_249
AJ29 VSS_51 VSS_150 BE30 L20 VSS_250
AJ32 VSS_52 VSS_151 BE42 L24 VSS_251
AJ43 VSS_53 VSS_152 BE51 L28 VSS_252
AJ45 VSS_54 VSS_153 BE8 L3 VSS_253
AJ49 VSS_55 VSS_154 BF12 L33 VSS_254
AK20 VSS_56 VSS_155 BF16 L49 VSS_255
AK21 VSS_57 VSS_156 BF36 M28 VSS_256
AK26 VSS_58 VSS_157 BG19 M42 VSS_257
AK28 VSS_59 VSS_158 BG2 M46 VSS_258
AK31 VSS_60 VSS_159 BG24 M49 VSS_259
AK51 VSS_61 VSS_160 BG29 M5 VSS_260
AL1 VSS_62 VSS_161 BG39 M50 VSS_261
AM11 VSS_63 VSS_162 BG48 M9 VSS_262
AM13 VSS_64 VSS_163 BG5 N11 VSS_263
AM3 VSS_65 VSS_164 BG51 N14 VSS_264
AM4 VSS_66 VSS_165 BH17 N17 VSS_265
B
AM41 VSS_67 VSS_166 BH30 N29 VSS_266 B
AM45 VSS_68 VSS_167 BH44 N32 VSS_267
AN1 VSS_69 VSS_168 BH46 N36 VSS_268
AN38 VSS_70 VSS_169 BH8 N39 VSS_269
AN39 VSS_71 VSS_170 BJ11 N44 VSS_270
AN43 VSS_72 VSS_171 BJ13 N49 VSS_271
AN5 VSS_73 VSS_172 BJ38 N7 VSS_272
AN7 VSS_74 VSS_173 BJ4 P19 VSS_273
AP4 VSS_75 VSS_174 BJ42 P2 VSS_274
AP48 VSS_76 VSS_175 BJ46 P23 VSS_275
AP50 VSS_77 VSS_176 BK15 P3 VSS_276
AR11 VSS_78 VSS_177 BK17 P50 VSS_277
AR2 VSS_79 VSS_178 BK25 R49 VSS_278
AR39 VSS_80 VSS_179 BK29 T39 VSS_279
AR44 VSS_81 VSS_180 BK36 T43 VSS_280
AR47 VSS_82 VSS_181 BK40 T47 VSS_281
AR7 VSS_83 VSS_182 BK44 U41 VSS_282
AT10 VSS_84 VSS_183 BK6 U45 VSS_283
AT14 VSS_85 VSS_184 BK8 U50 VSS_284
AT41 VSS_86 VSS_185 BL11 V2 VSS_285
AT49 VSS_87 VSS_186 BL13 V3 VSS_286
AU1 VSS_88 VSS_187 BL19
AU29 BL37 CRESTLINE_1p0
VSS_90 VSS_189
AU36 VSS_92 VSS_191 C12
AU49 VSS_93 VSS_192 C16
AU51 VSS_94 VSS_193 C19
AV39 VSS_95 VSS_194 C28
AV48 VSS_96 VSS_195 C29
A AW1 VSS_97 VSS_196 C33 A
AW12 VSS_98 VSS_197 C36
AW16 VSS_99 VSS_198 C41
CRESTLINE_1p0
PROJECT : CH3
NB 1A

5 4 3 2 1
5 4 3 2 1
Strap table
All strap are sampled with respect to the leading edge of the GMCH Power OK(PWROK) Signal
CFG[17:3] Have internal Pull-up
CFG[18:19] Have internal Pull-down
11
Any CFG signal strapping option not list below should be left NC Pin
Pin Name Strap description Configuration
CFG[2:0] FSB Frequency Select 010 = FSB 800MHz

D 011 = FSB 667MHz D
CFG[4:3] Reserved
CFG5 DMI X2 Select 0 = DMI X2

1 = DMI X4(Default)
CFG6 Reserved
CFG7 CPU Strap 0 = Reserved

1 = Mobile CPU(Default)
CFG8 Low power PCI Express 0 = Normal mode

1 = Low Power mode
CFG9 PCI Express Graphics Lane Reversal 0 = Reverse Lanes

1 = Normal operation(Default)
CFG[11:10] Reserved
C C
CFG[13:12] XOR/ALLZ 00 = Reserved
01 = XOR Mode Enable
10 = All-Z Mode Enabled
11 = Normal operation(Default)
CFG[15:14] Reserved
CFG16 FSB Dynamic ODT 0 = Dynamic ODT disable

1 = Dynamic ODT Enable(Default)
CFG[18:17] Reserved
SDVO_CTRLDATA SDVO Present 0 = No SDVO Card present(Default)

1 = SDVO Card Present
CFG19 DMI Lane Reversal 0 = Normal operation(Default)

1 = Reverse Lanes
CFG20 SDVO/PCIe concurrent 0 = Only SDVO or PCIE x1 is operation(Default)

1 = SDVO and PCIE x1 are operating simultaneously via the PEG port
B B
DMI X2 Select DMI Lane Reversal XOR /ALLz /Clock Un-gating PCI Express Graphics SDVO Present
MCH_CFG_5 Low = DMIX2 MCH_CFG_19 Low = Normal operation(Default) MCH_CFG_12MCH_CFG_13 Configuration MCH_CFG_9 Low = Reverse Lane Strap define at External
High = IDMIX4(Default) High = Reverse Lane High = Normal operation(Default)
DVI control page
0 0 Clock gating disable
VCC3
6 MCH_CFG_5 6 MCH_CFG_9
0 1 XOR Mode Enable
1 0 ALL-z Mode Enable

R155 R174
R172
*4.02K/F 1 1 Normal operation(Default) *4.02K/F
*4.02K/F
6 MCH_CFG_19
FSB Dynamic ODT SDVO/PCIE Concurrent operation
Low = Only SDVO or PCIE X1 is
MCH_CFG_16 Low = ODT Disable MCH_CFG_20 operational(Default)
6 MCH_CFG_12
High = ODT Enable(Default) High = SDVO andPCIE X1 are operating 6 MCH_CFG_13
simultaneously via the PEG port
A A
6 MCH_CFG_16 VCC3 R190 R157
*4.02K/F *4.02K/F
R156
*4.02K/F R245
PROJECT : CH3
*4.02K/F
NB 1A
6 MCH_CFG_20
5 4 3 2 1
1 2 3 4 5 6 7 8
DDRII DUAL CHANNEL A,B 12

M_B_A[13..0]
A M_B_A[13..0] 7,13 A
DDRII A CHANNEL
M_A_A[13..0]
M_A_A[13..0] 7,13
DDRII B CHANNEL
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
C206 C189 C142 C216 C139 C127 C121 C194 C129 C178 C165 C124 C223
C188 C179 C161 C126 C120 C128 C152 C138 C137 C117 C136 C123 C111 .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V
.1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
B B
RP17 1 2 56X2
7,13 M_B_BS#1
6,13 M_A_ODT0 M_A_ODT0 RP7 1 2 56X2 M_B_A0 3 4
M_A_A13 3 4 M_B_A5 RP21 1 2 56X2
M_A_A8 RP23 1 2 56X2 M_B_A1 3 4
M_A_A5 3 4 M_B_A8 RP24 1 2 56X2
M_A_A3 RP19 1 2 56X2 M_B_A3 3 4 SMDDR_VTERM
M_A_A1 3 4 SMDDR_VTERM
M_B_A4 RP18 1 2 56X2
M_A_CKE1 RP28 1 2 56X2 M_B_A2 3 4
6,13 M_A_CKE1
M_A_A11 3 4 M_B_A12 RP26 1 2 56X2
M_A_A10 RP14 1 2 56X2 M_B_A9 3 4
M_A_BS#0 3 4 M_B_A7 RP22 1 2 56X2
7,13 M_A_BS#0
M_A_A7 RP25 1 2 56X2 M_B_A6 3 4
M_A_A6 3 4 7,13 M_B_BS#2 RP31 1 2 56X2
M_A_A2 RP20 1 2 56X2 3 4 SMDDR_VTERM
6,13 M_B_CKE0
M_A_A4 3 4 SMDDR_VTERM
7,13 M_B_RAS# RP13 1 2 56X2
7,13 M_A_RAS# RP15 1 2 56X2 3 4
6,13 M_B_CS#0
M_A_BS#1 3 4 RP12 1 2 56X2
7,13 M_A_BS#1 7,13 M_B_BS#0
M_A_A9 RP27 1 2 56X2 7,13 M_B_CAS# 3 4
M_A_A12 3 4 M_B_A10 RP16 1 2 56X2
RP10 1 2 56X2 7,13 M_B_WE# 3 4 SMDDR_VTERM
7,13 M_A_WE#
C 3 4 SMDDR_VTERM C
7,13 M_A_CAS#
RP11 1 2 56X2
6,13 M_A_CS#0
M_A_A0 3 4
M_B_A13 RP9 1 2 56X2
6,13 M_B_ODT0 3 4
6,13 M_B_ODT1 M_ODT3 RP8 1 2 56X2
6,13 M_B_CS#1 3 4
RP6 1 2 56X2
6,13 M_A_CS#1
M_ODT1 3 4
6,13 M_A_ODT1
RP29 1 2 56X2
6,13 M_B_CKE1
M_B_A11 3 4
RP30 1 2 56X2
6,13 M_A_CKE0
3 4 SMDDR_VTERM
7,13 M_A_BS#2
D D
PROJECT : CH3
DDR2 1A

1 2 3 4 5 6 7 8
5 4 3 2 1
SMDDR_VREF_DIMM
SMDDR_VREF_DIMM
1.8VSUS
1
CN17
VREF VSS46 2
1.8VSUS
M_A_DQM[0..7] 7
M_A_DQ[0..63] 7
M_A_DQS[0..7] 7
M_A_DQS#[0..7] 7
M_A_A[0..13] 7,12
1.8VSUS
1
3
CN18
VREF
VSS47
VSS46
DQ4
2
4
1.8VSUS
M_B_DQ4
M_B_DQM[0..7] 7
M_B_DQ[0..63] 7
M_B_DQS[0..7] 7
M_B_DQS#[0..7] 7
M_B_A[0..13] 7,12
13
3 4 M_A_DQ4 M_B_DQ0 5 6 M_B_DQ1
M_A_DQ6 VSS47 DQ4 M_A_DQ0 M_B_DQ5 DQ0 DQ5
5 DQ0 DQ5 6 7 DQ1 VSS15 8
M_A_DQ5 7 8 9 10 M_B_DQM0
DQ1 VSS15 M_A_DQM0 M_B_DQS#0 VSS37 DM0
9 VSS37 DM0 10 11 DQS#0 VSS5 12
M_A_DQS#0 11 12 M_B_DQS0 13 14 M_B_DQ2
M_A_DQS0 DQS#0 VSS5 M_A_DQ7 DQS0 DQ6 M_B_DQ6
13 DQS0 DQ6 14 15 VSS48 DQ7 16
15 16 M_A_DQ1 M_B_DQ7 17 18
M_A_DQ2 VSS48 DQ7 M_B_DQ3 DQ2 VSS16 M_B_DQ12
D 17 DQ2 VSS16 18 19 DQ3 DQ12 20 D
M_A_DQ3 19 20 M_A_DQ13 21 22 M_B_DQ13
DQ3 DQ12 M_A_DQ9 M_B_DQ9 VSS38 DQ13
21 VSS38 DQ13 22 23 DQ8 VSS17 24
M_A_DQ12 23 24 M_B_DQ8 25 26 M_B_DQM1 C307 470P/50V
M_A_DQ8 DQ8 VSS17 M_A_DQM1 DQ9 DM1 SMDDR_VREF_DIMM R248 0
25 DQ9 DM1 26 27 VSS49 VSS53 28 1 2 SMDDR_VREF
27 28 M_B_DQS#1 29 30
VSS49 VSS53 DQS#1 CK0 M_B_CLK0 6
M_A_DQS#1 29 30 M_B_DQS1 31 32
DQS#1 CK0 M_A_CLK0 6 DQS1 CK0# M_B_CLK0# 6
M_A_DQS1 31 32 33 34 R256 1.8VSUS
DQS1 CK0# M_A_CLK0# 6 VSS39 VSS41
33 34 M_B_DQ11 35 36 M_B_DQ14
M_A_DQ11 VSS39 VSS41 M_A_DQ14 M_B_DQ10 DQ10 DQ14 M_B_DQ15 R235 *10K/F *10K/F
35 DQ10 DQ14 36 37 DQ11 DQ15 38
M_A_DQ15 37 38 M_A_DQ10 39 40
DQ11 DQ15 VSS50 VSS54
39 VSS50 VSS54 40
41 VSS18 VSS20 42
41 PC4800 DDR2 SDRAM 42 M_B_DQ20 43 44 M_B_DQ16
M_A_DQ17 VSS18 VSS20 M_A_DQ21 M_B_DQ17 DQ16 DQ20 M_B_DQ21
43 DQ16 DQ20 44 45 DQ17 DQ21 46
M_A_DQ20 45 46 M_A_DQ16 47 48
DQ17 DQ21 M_B_DQS#2 VSS1 VSS6
47 48 49 50
PC4800 DDR2 SDRAM

VSS1 VSS6 DQS#2 NC3 PM_EXTTS#1 6
M_A_DQS#2 49 50 PM_EXTTS#0 6 M_B_DQS2 51 52 M_B_DQM2
M_A_DQS2 DQS#2 NC3 M_A_DQM2 DQS2 DM2
51 DQS2 DM2 52 53 VSS19 VSS21 54
SO-DIMM (200P)
53 54 M_B_DQ22 55 56 M_B_DQ18
55 DQ18 DQ22 56 57 DQ19 DQ23 58
M_A_DQ19 57 58 M_A_DQ22 59 60
SO-DIMM (200P)
DQ19 DQ23 M_B_DQ29 VSS22 VSS24 M_B_DQ24
59 VSS22 VSS24 60 61 DQ24 DQ28 62
M_A_DQ24 61 62 M_A_DQ29 M_B_DQ28 63 64 M_B_DQ25 1.8VSUS
M_A_DQ25 63
DQ24
DQ25
DQ28
DQ29 64 M_A_DQ28 65
DQ25
VSS23
DQ29
VSS25 66 Place these Caps near So-Dimm2.
65 66 M_B_DQM3 67 68 M_B_DQS#3
M_A_DQM3 VSS23 VSS25 M_A_DQS#3 DM3 DQS#3 M_B_DQS3
67 DM3 DQS#3 68 69 NC4 DQS3 70
69 70 M_A_DQS3 71 72
NC4 DQS3 M_B_DQ26 VSS9 VSS10 M_B_DQ31
71 VSS9 VSS10 72 73 DQ26 DQ30 74
M_A_DQ26 73 74 M_A_DQ30 M_B_DQ27 75 76 M_B_DQ30 C201 C147 C172 C198 C131 C140 C153 C146 C181 C167 C187
M_A_DQ27 DQ26 DQ30 M_A_DQ31 DQ27 DQ31 2.2U/6.3V2.2U/6.3V2.2U/6.3V2.2U/6.3V2.2U/6.3V.1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V
75 DQ27 DQ31 76 77 VSS4 VSS8 78
77 VSS4 VSS8 78 6,12 M_B_CKE0 79 CKE0 CKE1 80 M_B_CKE1 6,12
6,12 M_A_CKE0 79 CKE0 CKE1 80 M_A_CKE1 6,12 81 VDD7 VDD8 82
81 VDD7 VDD8 82 83 NC1 A15 84
C C
83 NC1 A15 84 7,12 M_B_BS#2 85 A16_BA2 A14 86 SB_MA14 6
7,12 M_A_BS#2 85 A16_BA2 A14 86 SA_MA14 6 87 VDD9 VDD11 88
87 88 M_B_A12 89 90 M_B_A11 SMDDR_VREF_DIMM VCC3
M_A_A12 VDD9 VDD11 M_A_A11 M_B_A9 A12 A11 M_B_A7
89 A12 A11 90 91 A9 A7 92
M_A_A9 91 92 M_A_A7 M_B_A8 93 94 M_B_A6
M_A_A8 A9 A7 M_A_A6 A8 A6
93 A8 A6 94 95 VDD5 VDD4 96
95 96 M_B_A5 97 98 M_B_A4
M_A_A5 VDD5 VDD4 M_A_A4 M_B_A3 A5 A4 M_B_A2 C373 C392 C46 C49
97 A5 A4 98 99 A3 A2 100
M_A_A3 99 100 M_A_A2 M_B_A1 101 102 M_B_A0 .1U/10V 2.2U/6.3V 2.2U/6.3V .1U/10V
M_A_A1 A3 A2 M_A_A0 A1 A0
101 A1 A0 102 103 VDD10 VDD12 104
103 104 M_B_A10 105 106
VDD10 VDD12 A10/AP BA1 M_B_BS#1 7,12
M_A_A10 105 106 7,12 M_B_BS#0 107 108
A10/AP BA1 M_A_BS#1 7,12 BA0 RAS# M_B_RAS# 7,12
7,12 M_A_BS#0 107 BA0 RAS# 108 M_A_RAS# 7,12 7,12 M_B_WE# 109 WE# S0# 110 M_B_CS#0 6,12 SO-DIMM BYPASS PLACEMENT :
7,12 M_A_WE# 109 WE# S0# 110 M_A_CS#0 6,12 111 VDD2 VDD1 112
111 VDD2 VDD1 112 7,12 M_B_CAS# 113 CAS# ODT0 114 M_B_ODT0 6,12 Place these Caps near So-Dimm2
113 114 115 116 M_B_A13
7,12 M_A_CAS# CAS# ODT0 M_A_ODT0 6,12 6,12 M_B_CS#1 S1# A13
6,12 M_A_CS#1 115 S1# A13 116 M_A_A13 117 VDD3 VDD6 118 No Vias Between the Trace of PIN to CAP.
117 VDD3 VDD6 118 6,12 M_B_ODT1 119 ODT1 NC2 120
6,12 M_A_ODT1 119 ODT1 NC2 120 121 VSS11 VSS12 122
121 122 M_B_DQ37 123 124 M_B_DQ36
123 DQ32 DQ36 124 125 DQ33 DQ37 126
M_A_DQ37 125 126 M_A_DQ33 127 128
DQ33 DQ37 M_B_DQS#4 VSS26 VSS28 M_B_DQM4
127 VSS26 VSS28 128 129 DQS#4 DM4 130
M_A_DQS#4 129 130 M_A_DQM4 M_B_DQS4 131 132
M_A_DQS4 DQS#4 DM4 DQS4 VSS42 M_B_DQ39
131 DQS4 VSS42 132 133 VSS2 DQ38 134
133 134 M_A_DQ35 M_B_DQ34 135 136 M_B_DQ33 1.8VSUS
M_A_DQ39 135
VSS2
DQ34
DQ38
DQ39 136 M_A_DQ38 M_B_DQ35 137
DQ34
DQ35
DQ39
VSS55 138 Place these Caps near So-Dimm1.
M_A_DQ34 137 138 139 140 M_B_DQ44
DQ35 VSS55 M_A_DQ44 M_B_DQ40 VSS27 DQ44 M_B_DQ45
139 VSS27 DQ44 140 141 DQ40 DQ45 142
M_A_DQ40 141 142 M_A_DQ45 M_B_DQ41 143 144
M_A_DQ41 DQ40 DQ45 DQ41 VSS43 M_B_DQS#5
143 DQ41 VSS43 144 145 VSS29 DQS#5 146
145 146 M_A_DQS#5 M_B_DQM5 147 148 M_B_DQS5 C130 C175 C190 C162 C200 C180 C145 C141 C149 C166 C199
M_A_DQM5 VSS29 DQS#5 M_A_DQS5 DM5 DQS5 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V2.2U/6.3V 2.2U/6.3V.1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V
147 DM5 DQS5 148 149 VSS51 VSS56 150
B 149 150 M_B_DQ46 151 152 M_B_DQ42 B
151 DQ42 DQ46 152 153 DQ43 DQ47 154
M_A_DQ46 153 154 M_A_DQ47 155 156
155 VSS40 VSS44 156 157 DQ48 DQ52 158
M_A_DQ53 157 158 M_A_DQ48 M_B_DQ49 159 160 M_B_DQ48 VCC3
M_A_DQ49 DQ48 DQ52 M_A_DQ52 DQ49 DQ53 SMDDR_VREF_DIMM
159 DQ49 DQ53 160 161 VSS52 VSS57 162
161 VSS52 VSS57 162 163 NCTEST CK1 164 M_B_CLK1 6
163 NCTEST CK1 164 M_A_CLK1 6 165 VSS30 CK1# 166 M_B_CLK1# 6
165 166 M_B_DQS#6 167 168
VSS30 CK1# M_A_CLK1# 6 DQS#6 VSS45
M_A_DQS#6 167 168 M_B_DQS6 169 170 M_B_DQM6 C45 C48
M_A_DQS6 DQS#6 VSS45 M_A_DQM6 DQS6 DM6 C382 C361 2.2U/6.3V .1U/10V
169 DQS6 DM6 170 171 VSS31 VSS32 172
171 172 M_B_DQ51 173 174 M_B_DQ55 .1U/10V 2.2U/6.3V
173 DQ50 DQ54 174 175 DQ51 DQ55 176
M_A_DQ51 175 176 M_A_DQ55 177 178
177 VSS33 VSS35 178 179 DQ56 DQ60 180
M_A_DQ56 179 180 M_A_DQ61 M_B_DQ61 181 182 M_B_DQ57 SO-DIMM BYPASS PLACEMENT :
M_A_DQ60 DQ56 DQ60 M_A_DQ57 DQ57 DQ61
181 DQ57 DQ61 182 183 VSS3 VSS7 184
183 VSS3 VSS7 184 M_B_DQM7 185 DM7 DQS#7 186 M_B_DQS#7 Place these Caps near So-Dimm1.
M_A_DQM7 185 186 M_A_DQS#7 187 188 M_B_DQS7
DM7 DQS#7 VSS34 DQS7
187 VSS34 DQS7 188 M_A_DQS7 M_B_DQ59 189 DQ58 VSS36 190 No Vias Between the Trace of PIN to CAP.
M_A_DQ62 189 190 M_B_DQ62 191 192 M_B_DQ63
M_A_DQ59 DQ58 VSS36 M_A_DQ58 DQ59 DQ62 M_B_DQ58
191 DQ59 DQ62 192 193 VSS14 DQ63 194
193 194 M_A_DQ63 PDAT_SMB 195 196
VSS14 DQ63 2,22,28,31 PDAT_SMB SDA VSS13
PDAT_SMB 195 196 PCLK_SMB 197 198 R39 10K
SDA VSS13 2,22,28,31 PCLK_SMB SCL SA0
PCLK_SMB 197 198 R41 10K VCC3_SPD 199 200 R44 10K
R47 0 VCC3_SPD SCL SA0 R35 10K VDD(SPD) SA1
VCC3 199 VDD(SPD) SA1 200
2-1734073-2 VCC3_SPD
DDR2_SODIMM
SO-DIMM0 SPD Address is 0xA0 SO-DIMM1 SPD Address is 0xA4
CLOCKA 0,1 CKEA 0,1 H 4.0 SO-DIMM0 TS Address is 0x30
CLOCKB 0,1 CKEB 0,1 H 8.0 SO-DIMM1 TS Address is 0x34
A A
PROJECT : CH3
DDR2 1A

5 4 3 2 1
5 4 3 2 1
U27F U27A
AA12
AA2
AA21
AA31
AB27
AB6
AC10
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
D4
D7
F11
F14
F19
F2
F22
6
6
6
6
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
C342
C351
C368
C357
C369
[email protected]/10V C_PEG_RXP0 AJ15
[email protected]/10V C_PEG_RXN0 AK15
[email protected]/10V C_PEG_RXP1 AH16

[email protected]/10V C_PEG_RXN1 AG16
[email protected]/10V C_PEG_RXP2 AG17

PEX_TX0
PEX_TX0#
PEX_TX1
PEX_TX1#
PEX_IOVDD_0
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
AD23
AF23
AF24
AF25
AG24
AG25
C372
C434
C416
C438
C428
[email protected]/10V
E@1U/6.3V
E@1U/6.3V
VGA1.2V
PLACE NEAR GPU

500mA
14
GND_6 GND_86 6 PEG_RXP2 PEX_TX2
AC23 F25 PEG_RXN2 C381 [email protected]/10V C_PEG_RXN2 AH17
GND_7 GND_87 6 PEG_RXN2 PEX_TX2#
AC29 GND_8 GND_88 F31 PEX_IOVDDQ_0 AC16 VGA1.2V
AC4 F8 PEG_RXP3 C386 [email protected]/10V C_PEG_RXP3 AG18 AC17 1500mA
GND_9 GND_89 6 PEG_RXP3 PEX_TX3 PEX_IOVDDQ_1
AD16 G26 PEG_RXN3 C396 [email protected]/10V C_PEG_RXN3 AH18 AC21 C380 [email protected]/10V
GND_10 GND_90 6 PEG_RXN3 PEX_TX3# PEX_IOVDDQ_2
AD17 G29 AC22 C420 [email protected]/10V
GND_11 GND_91 PEG_RXP4 C403 [email protected]/10V C_PEG_RXP4 AK18 PEX_IOVDDQ_3 C417 [email protected]/10V
AD2 GND_12 GND_92 G4 6 PEG_RXP4 PEX_TX4 PEX_IOVDDQ_4 AE18
D PEG_RXN4 C398 [email protected]/10V C_PEG_RXN4 AJ18 C364 [email protected]/10V D
AD31 GND_13 GND_93 G7 6 PEG_RXN4 PEX_TX4# PEX_IOVDDQ_5 AE21
AE17 H27 AE22 C378 E@1U/6.3V PLACE NEAR GPU G8X Total power consumption
GND_14 GND_94 PEG_RXP5 C415 [email protected]/10V C_PEG_RXP5 AJ19 PEX_IOVDDQ_6 C397 E@1U/6.3V
AE27 H6 6 PEG_RXP5 AF12
AE6
GND_15 GND_95
J16 PEG_RXN5 C405 [email protected]/10V C_PEG_RXN5 AH19 PEX_TX5 PEX_IOVDDQ_7
AF18 C404 E@10U/4V 1.NVDD CORE POWER 1.2 - 1.0
GND_16 GND_96 6 PEG_RXN5 PEX_TX5# PEX_IOVDDQ_8
AF11 J17 AF21 C374 [email protected]/10V -- 11.01A
GND_17 GND_97 PEG_RXP6 C425 [email protected]/10V C_PEG_RXP6 AG20 PEX_IOVDDQ_9 C441 [email protected]/10V
AF26 J2 AF22
AF29
GND_18 GND_98
J31
6 PEG_RXP6
PEG_RXN6 C418 [email protected]/10V C_PEG_RXN6 AH20 PEX_TX6 PEX_IOVDDQ_10 2.PCIE VGA1.2V -- 1.75A
19.81A 3.FBVDDQ 1.8V ----- 3.12A
AF4 K10 PEG_RXP7 C435 [email protected]/10V C_PEG_RXP7 AG21 K16 VGACORE_G73
AF7
GND_20 GND_100
K23
6 PEG_RXP7
PEG_RXN7 C427 [email protected]/10V C_PEG_RXN7 AH21 PEX_TX7 VDD_0
K17
4.VDD I/O 3.3V ---- 0.49A
GND_21 GND_101 6 PEG_RXN7 PEX_TX7# VDD_1
AG10 GND_22 GND_102 K29 VDD_2 N13 C358 [email protected]/10V 5.PLL 2.5V ---
AG11 K4 PEG_RXP8 C437 [email protected]/10V C_PEG_RXP8 AK21 N14 C384 [email protected]/10V
GND_23 GND_103 6 PEG_RXP8 PEX_TX8 VDD_3
AG14 L27 PEG_RXN8 C444 [email protected]/10V C_PEG_RXN8 AJ21 N16 C389 [email protected]/10V
AG15 L6 N17 C383 [email protected]/10V
GND_25 GND_105 PEG_RXP9 C446 [email protected]/10V C_PEG_RXP9 AJ22 VDD_5 C366 [email protected]/10V
AG19 GND_26 GND_106 M12 6 PEG_RXP9 PEX_TX9 VDD_6 N19
AG2 M2 PEG_RXN9 C451 [email protected]/10V C_PEG_RXN9 AH22 P13 C338 E@10U/4V
AG22 M31 P14 C362 [email protected]/10V
GND_28 GND_108 PEG_RXP10 C455 [email protected]/10V C_PEG_RXP10 AG23 VDD_8 C370 E@1U/6.3V
AG31 GND_29 GND_109 N15 6 PEG_RXP10 PEX_TX10 VDD_9 P16 power up sequence
AG8 N18 PEG_RXN10 C453 [email protected]/10V C_PEG_RXN10 AH23 P17 C390 [email protected]/10V
AH24 N29 P19 C371 [email protected]/10V PLACE NEAR GPU
GND_31 GND_111 PEG_RXP11 C457 [email protected]/10V C_PEG_RXP11 AK24 VDD_11 C402 [email protected]/10V
AJ10 GND_32 GND_112 N4 6 PEG_RXP11 PEX_TX11 VDD_12 R16
AJ13 P15 PEG_RXN11 C461 [email protected]/10V C_PEG_RXN11 AJ24 R17 C356 [email protected]/10V
AJ16 P18 T14 C363 E@10U/4V
GND_34 GND_114 PEG_RXP12 C465 [email protected]/10V C_PEG_RXP12 AJ25 VDD_15 C385 [email protected]/10V
AJ17 GND_35 GND_115 P27 6 PEG_RXP12 PEX_TX12 VDD_16 T15 I/O 3.3V
AJ20 P6 PEG_RXN12 C475 [email protected]/10V C_PEG_RXN12 AH25 T18 C407 [email protected]/10V
AJ23 R13 T19 C411 [email protected]/10V NVCORE
GND_37 GND_117 PEG_RXP13 C478 [email protected]/10V C_PEG_RXP13 AH26 VDD_18 C408 [email protected]/10V
AJ26 GND_38 GND_118 R14 6 PEG_RXP13 PEX_TX13 VDD_19 U13
AJ29 R15 PEG_RXN13 C482 [email protected]/10V C_PEG_RXN13 AG26 1.8VFBDDQ
AJ4 R18 PEG_RXP14 C487 [email protected]/10V C_PEG_RXP14 AK27 U14 C346 E@1U/6.3V
GND_40 GND_120 6 PEG_RXP14 PEX_TX14 VDD_20
AJ7 R19 PEG_RXN14 C484 [email protected]/10V C_PEG_RXN14 AJ27 U15 C337 E@1U/6.3V 1.2V
AK2 R2 U18 C410 [email protected]/10V
C GND_42 GND_122 PEG_RXP15 C496 [email protected]/10V C_PEG_RXP15 AJ28 VDD_22 C409 [email protected]/10V C
AK28 GND_43 GND_123 R20 6 PEG_RXP15 PEX_TX15 VDD_23 U19
AK31 R31 PEG_RXN15 C488 [email protected]/10V C_PEG_RXN15 AH27 V16 C323 [email protected]/10V 2.5V
AL11 T16 V17 C393 [email protected]/10V
GND_45 GND_125 PEG_TXP_C0 VDD_25 C406 [email protected]/10V
AL14 GND_46 GND_126 T17 6 PEG_TXP_C0 AK13 PEX_RX0 VDD_26 W13
AL19 T24 PEG_TXN_C0 AK14 W14 C344 [email protected]/10V
GND_47 GND_127 6 PEG_TXN_C0 PEX_RX0# VDD_27
AL22 T29 W16 C348 E@10U/4V
GND_48 GND_128 PEG_TXP_C1 VDD_28
AL25 GND_49 GND_129 T4 6 PEG_TXP_C1 AM14 PEX_RX1 PCIE VDD_29 W17
AL3 U16 PEG_TXN_C1 AM15 W19
AL6 GND_51 GND_131 U17 VDD_31 Y13
AL9 U24 PEG_TXP_C2 AL15 Y14
GND_52 GND_132 6 PEG_TXP_C2 PEX_RX2 VDD_32
AM13 U29 PEG_TXN_C2 AL16 Y16
AM16 GND_54 GND_134 U8 VDD_34 Y17
AM17 V13 PEG_TXP_C3 AK16 Y19
GND_55 GND_135 6 PEG_TXP_C3 PEX_RX3 VDD_35
AM20 V14 PEG_TXN_C3 AK17 Y20
AM23 GND_57 GND_137 V15
AM26 V18 PEG_TXP_C4 AL17
GND_58 GND_138 6 PEG_TXP_C4 PEX_RX4
AM29 V19 PEG_TXN_C4 AL18 P20
GND_59 GND_139 6 PEG_TXN_C4 PEX_RX4# VDD_LP_0
T20 VCC3
PEG_TXP_C5 VDD_LP_1
B12 GND_60 GND_140 V2 6 PEG_TXP_C5 AM18 PEX_RX5 VDD_LP_2 T23
B15 V20 PEG_TXN_C5 AM19 U20
GND_61 GND_141 6 PEG_TXN_C5 PEX_RX5# VDD_LP_3
1
B18 GND_62 GND_142 V31 VDD_LP_4 U23
B21 W15 PEG_TXP_C6 AK19 W20 D7 R169
GND_63 GND_143 6 PEG_TXP_C6 PEX_RX6 VDD_LP_5
B24 W18 PEG_TXN_C6 AK20 *[email protected]/F
GND_64 GND_144 6 PEG_TXN_C6 PEX_RX6#
B27 W27 N20 VDD_SENSE E@CH501H
GND_65 GND_145 VDD_SENSE T76
B3 W6 PEG_TXP_C7 AL20 M21 GND_SENSE C891 [email protected]
6 PEG_TXP_C7 T78
2
GND_66 GND_146 PEG_TXN_C7 PEX_RX7 GND_SENSE SPDIF_VGA
B30 GND_67 GND_147 Y15 6 PEG_TXN_C7 AL21 PEX_RX7# SPDIF 34
B6 GND_68 GND_148 Y18
1
B9 Y29 PEG_TXP_C8 AM21
GND_69 GND_149 6 PEG_TXP_C8 PEX_RX8
C2 Y4 PEG_TXN_C8 AM22 AC11 D6 R185 R179
GND_70 GND_150 6 PEG_TXN_C8 PEX_RX8# VDD33_0 VCC3
C31 AL10 AC12 *[email protected]/F *[email protected]/F
GND_71 GND_151 PEG_TXP_C9 VDD33_1 C264 [email protected]/10V E@CH501H
D10 GND_72 GND_152 AM10 6 PEG_TXP_C9 AK22 PEX_RX9 VDD33_2 AC24
D13 AG13 PEG_TXN_C9 AK23 AD24 C265 [email protected]/10V no 76.8 in SAP, use 78.7 instead
6 PEG_TXN_C9
2
B GND_73 GND_153 PEX_RX9# VDD33_3 C285 [email protected]/10V B
D16 GND_74 VDD33_4 AE11
D17 PEG_TXP_C10 AL23 AE12 C205 [email protected]/10V PLACE NEAR GPU
GND_75 6 PEG_TXP_C10 PEX_RX10 VDD33_5
D20 PEG_TXN_C10 AL24 H7 C224 [email protected]/10V for 3.3V swing
GND_76 6 PEG_TXN_C10 PEX_RX10# VDD33_6
D23 J7 C288 [email protected]/10V
D26
GND_77 PEG_TXP_C11 AM24
VDD33_7
K7 C282 E@1U/10V G73 use 0ohm, NB8P use 10nF
GND_78 6 PEG_TXP_C11 PEX_RX11 VDD33_8
D29 PEG_TXN_C11 AM25 L10
GND_79 6 PEG_TXN_C11 PEX_RX11# VDD33_9
VDD33_10 L7
PEG_TXP_C12 AK25 L8 180mA
6 PEG_TXP_C12 PEX_RX12 VDD33_11
E@U_GPU_G3 PEG_TXN_C12 AK26 M10
6 PEG_TXN_C12 PEX_RX12# VDD33_12 L31 E@10nH
15mil VGA1.2V
PEG_TXP_C13 AL26
6 PEG_TXP_C13 PEX_RX13
PEG_TXN_C13 AL27 AF15 PEX_PLLVDD C353 E@1U/6.3V [email protected] C387
6 PEG_TXN_C13 PEX_RX13# PEX_PLLAVDD
AE15 C355 [email protected]/16V
PEG_TXP_C14 PEX_PLLDVDD C352 [email protected]/10V
6 PEG_TXP_C14 AM27 PEX_RX14 PEX_PLLGND AE16
PEG_TXN_C14 AM28 C339 [email protected]/X5R 20mA
6 PEG_TXN_C14 PEX_RX14#
PEG_TXP_C15 AL28 PLACE NEAR GPU
6 PEG_TXP_C15 PEX_RX15
PEG_TXN_C15 AL29
6 PEG_TXN_C15 PEX_RX15#
CLK_PCIE_VGA AH14 15mil

2 CLK_PCIE_VGA PEX_REFCLK
CLK_PCIE_VGA# AJ14 T13 NV_PLLAVDD L27 *E@10nH
2 CLK_PCIE_VGA# PEX_REFCLK# NV_PLLAVDD VGA1.2V
PLT_RST-R# R230 E@0 VGA_RST# AH15 R238 E@0

6,21 PLT_RST-R# PEX_RST# VGACORE_G73
NC_0 AM8
NC_1 AM9
del 10K pull_down resistor per FAE VGA_RFU0 AG12 B32 G72M/G73M: STUFF L27
VGA_RFU1 RFU0 NC_2
nicole 10/9 T70 AH13 RFU1
NB8X: STUFF R238
PEX_TSTCK AM12
A T181 PEX_TSTCLK_OUT A
PEX_TSTCK# AM11 J6 SPDIF_VGA
T179 PEX_TSTCLK_OUT# SPDIF
E@U_GPU_G3
PROJECT : CH3
VGA 1A

5 4 3 2 1
5 4 3 2 1
VMA_DQ0
VMA_DQ1
VMA_DQ2
N27
M27
N28
U27B
FBAD0
FBAD1
FBVDD_0
FBVDD_1
A12
A15
A18
C421
C345
VCC1.8
VMC_DQ0
VMC_DQ1
VMC_DQ2
B7
A7
C7
U27C
FBCD0
FBCD1
FBVTT_0
FBVTT_1
AA23
AB23
H16
C260
C414
VCC1.8
15
VMA_DQ3 FBAD2 FBVDD_2 C394 [email protected]/10V VMC_DQ3 FBCD2 FBVTT_2 C304 [email protected]/10V
L29 FBAD3 FBVDD_3 A21 A2 FBCD3 FBVTT_3 H17
VMA_DQ4 K27 A24 C513 [email protected]/10V VMC_DQ4 B2 J10 C449 [email protected]/10V
K28 FBAD5 FBVDD_5 A27 C4 FBCD5 FBVTT_5 J23
VMA_DQ6 J29 A3 C436 [email protected]/10V VMC_DQ6 A5 J24 C234 [email protected]/10V
VMA_DQ7 FBAD6 FBVDD_6 C309 E@10U/4V VMC_DQ7 FBCD6 FBVTT_6 C458 E@10U/4V
J28 FBAD7 FBVDD_7 A30 B5 FBCD7 FBVTT_7 J9
VMA_DQ8 P30 A6 C365 [email protected]/10V VMC_DQ8 F9 K11 C275 [email protected]/10V
N31 FBAD9 FBVDD_9 A9 F10 FBCD9 FBVTT_9 K12
VMA_DQ10 N30 AA32 C317 [email protected]/10V VMC_DQ10 D12 K21 C247 [email protected]/10V
N32 FBAD11 FBVDD_11 AD32 D9 FBCD11 FBVTT_11 K22
D VMA_DQ12 C424 [email protected]/10V VMC_DQ12 C226 [email protected]/10V D
L31 FBAD12 FBVDD_12 AG32 E12 FBCD12 FBVTT_12 K24 18 VMA_DQ[63..0]
VMA_DQ13 L30 AK32 C431 [email protected]/10V VMC_DQ13 D11 K9 C447 [email protected]/10V
VMA_DQ14 FBAD13 FBVDD_13 C326 E@10U/4V VMC_DQ14 FBCD13 FBVTT_13 C452 E@10U/4V
J30 FBAD14 FBVDD_14 C32 E8 FBCD14 FBVTT_14 L23 18 VMA_DM[7..0]
VMA_DQ15 L32 F32 VMC_DQ15 D8 M23
VMA_DQ16 FBAD15 FBVDD_15 VMC_DQ16 FBCD15 FBVTT_15
H30 FBAD16 FBVDD_16 J32 PLACE NEAR GPU E7 FBCD16 FBVTT_16 T25 PLACE NEAR GPU 18 VMA_W DQS[7..0]
VMA_DQ17 K30 M32 VMC_DQ17 F7 U25
VMA_DQ18 FBAD17 FBVDD_17 VMC_DQ18 FBCD17 FBVTT_17
H31 FBAD18 FBVDD_18 R32 D6 FBCD18 18 VMA_RDQS[7..0]
VMA_DQ19 F30 V32 VMC_DQ19 D5
VMA_DQ20 FBAD19 FBVDD_19 VMC_DQ20 FBCD19 VMC_MA4
H32 FBAD20 D3 FBCD20 FBC_CMD0 C13 VMC_MA4 19
VMA_DQ21 E31 AA25 VMC_DQ21 E4 A16 VMC_RAS#
FBAD21 FBVDDQ_0 VCC1.8 FBCD21 FBC_CMD1 VMC_RAS# 19
VMA_DQ22 D30 AA26 C443 [email protected]/10V VMC_DQ22 C3 A13 VMC_MA5
FBAD22 FBVDDQ_1 FBCD22 FBC_CMD2 VMC_MA5 19
VMA_DQ23 E30 AB25 C510 [email protected]/10V VMC_DQ23 B4 B17 VMC_BA1
FBAD23 FBVDDQ_2 FBCD23 FBC_CMD3 VMC_BA1 19
VMA_DQ24 H28 AB26 C530 [email protected]/10V VMC_DQ24 C10 B20 VMC_MA2H
FBAD24 FBVDDQ_3 FBCD24 FBC_CMD4 VMC_MA2H 19
VMA_DQ25 H29 G11 C445 [email protected]/10V VMC_DQ25 B10 A19 VMC_MA4H
FBAD25 FBVDDQ_4 FBCD25 FBC_CMD5 VMC_MA4H 19 19 VMC_DQ[63..0]
VMA_DQ26 E29 G12 C477 [email protected]/10V VMC_DQ26 C8 B19 VMC_MA3H
VMA_DQ27 J27 G15 C413 [email protected]/10V VMC_DQ27 A10 B14 VMC_BA2_CS1#
FBAD27 FBVDDQ_6 FBCD27 FBC_CMD7 VMC_BA2 19 19 VMC_DM[7..0]
VMA_DQ28 F27 G18 C399 E@10U/4V VMC_DQ28 C11 E16 VMC_CS0#
FBAD28 FBVDDQ_7 FBCD28 FBC_CMD8 VMC_CS0# 19
VMA_DQ29 E27 G21 C526 [email protected]/10V VMC_DQ29 C12 A14 VMC_MA11
FBAD29 FBVDDQ_8 FBCD29 FBC_CMD9 VMC_MA11 19 19 VMC_W DQS[7..0]
VMA_DQ30 E28 G22 C377 [email protected]/10V VMC_DQ30 A11 C15 VMC_CAS#
FBAD30 FBVDDQ_9 FBCD30 FBC_CMD10 VMC_CAS# 19
VMA_DQ31 F28 H11 C336 [email protected]/10V VMC_DQ31 B11 B16 VMC_WE#
FBAD31 FBVDDQ_10 FBCD31 FBC_CMD11 VMC_WE# 19 19 VMC_RDQS[7..0]
VMA_DQ32 AD29 H12 C343 [email protected]/10V VMC_DQ32 B28 F17 VMC_BA0
FBAD32 FBVDDQ_11 FBCD32 FBC_CMD12 VMC_BA0 19
VMA_DQ33 AE29 H15 C432 [email protected]/10V VMC_DQ33 C27 C19 VMC_MA5H
VMA_DQ34 AD28 H18 C429 [email protected]/10V VMC_DQ34 C26 D15 VMC_MA12
FBAD34 FBVDDQ_13 FBCD34 FBC_CMD14 T73
VMA_DQ35 AC28 H21 C423 E@10U/4V VMC_DQ35 B26 C17 VMC_RST VMA_RST
FBAD35 FBVDDQ_14 FBCD35 FBC_CMD15 VMA_RST 18
VMA_DQ36 AB29 H22 VMC_DQ36 C30 A17 VMC_MA7
VMA_DQ37 AA30 L25 PLACE NEAR GPU VMC_DQ37 B31 C16 VMC_MA10
VMA_DQ38 Y28 L26 VMC_DQ38 C29 D14 VMC_CKE G72M/G73M: STUFF
FBAD38 FBVDDQ_17 FBCD38 FBC_CMD18 VMC_CKE 19
VMA_DQ39 AB30 M25 VMC_DQ39 A31 F16 VMC_MA0 R311
FBAD39 FBVDDQ_18 FBCD39 FBC_CMD19 VMC_MA0 19 UMA:NC
VMA_DQ40 AM30 M26 VMC_DQ40 D28 C14 VMC_MA9
VMA_DQ41 AF30 R25 VMC_DQ41 D27 C18 VMC_MA6 E@10K
VMA_DQ42 AJ31 R26 VMC_DQ42 F26 E14 VMC_MA2
VMA_DQ43 AJ30 V25 VMC_DQ43 D24 B13 VMC_MA8
VMA_DQ44 AJ32 V26 VMC_DQ44 E23 FBC E15 VMC_MA3
VMA_DQ45 AK29 VMC_DQ45 E26 F15 VMC_MA1
FBAD45 FBCD45 FBC_CMD25 VMC_MA1 19
VMA_DQ46 AM31 VMC_DQ46 E24 A20 VMC_MA13
FBAD46 FBCD46 FBC_CMD26 T184
VMA_DQ47 AL30 P32 VMA_MA4 VMC_DQ47 F23 VMC_RST
C FBAD47 FBA_CMD0 VMA_MA4 18 FBCD47 VMC_RST 19 C
VMA_DQ48 AE32 FBA U27 VMA_RAS# VMC_DQ48 B23
FBAD48 FBA_CMD1 VMA_RAS# 18 FBCD48
VMA_DQ49 AE30 P31 VMA_MA5 VMC_DQ49 A23 E13 VMC_CLK0
FBAD49 FBA_CMD2 VMA_MA5 18 FBCD49 FBC_CLK0 VMC_CLK0 19
VMA_DQ50 AE31 U30 VMA_BA1 VMC_DQ50 C25 F13 VMC_CLK0#
FBAD50 FBA_CMD3 VMA_BA1 18 FBCD50 FBC_CLK0# VMC_CLK0# 19
VMA_DQ51 AD30 Y31 VMA_MA2H VMC_DQ51 C23 F18 VMC_CLK1 R278
FBAD51 FBA_CMD4 VMA_MA2H 18 FBCD51 FBC_CLK1 VMC_CLK1 19
VMA_DQ52 AC31 W32 VMA_MA4H VMC_DQ52 A22 E17 VMC_CLK1# G72M/G73M: STUFF
FBAD52 FBA_CMD5 VMA_MA4H 18 FBCD52 FBC_CLK1# VMC_CLK1# 19
VMA_DQ53 AC32 W31 VMA_MA3H VMC_DQ53 C22 E@10K
FBAD53 FBA_CMD6 VMA_MA3H 18 FBCD53 UMA:NC
VMA_DQ54 AB32 T32 VMA_BA2_CS1# VMC_DQ54 C21
FBAD54 FBA_CMD7 VMA_BA2 18 FBCD54
VMA_DQ55 AB31 V27 VMA_CS0# VMC_DQ55 B22 C20 FBC_CMD27
FBAD55 FBA_CMD8 VMA_CS0# 18 FBCD55 RFU4 T77
VMA_DQ56 AG27 T28 VMA_MA11 VMC_DQ56 E22 D1 G73_D1
FBAD56 FBA_CMD9 VMA_MA11 18 FBCD56 RFU5 T168
VMA_DQ57 AF28 T31 VMA_CAS# VMC_DQ57 D22
FBAD57 FBA_CMD10 VMA_CAS# 18 FBCD57
VMA_DQ58 AH28 U32 VMA_WE# VMC_DQ58 D21 F12 VMC_DEBUG
FBAD58 FBA_CMD11 VMA_WE# 18 FBCD58 FBC_DEBUG T68
VMA_DQ59 AG28 W29 VMA_BA0 VMC_DQ59 E21
FBAD59 FBA_CMD12 VMA_BA0 18 FBCD59
VMA_DQ60 AG29 W30 VMA_MA5H VMC_DQ60 E18 B1 THMDAT THMDAT 30
FBAD60 FBA_CMD13 VMA_MA5H 18 FBCD60 FBC_REFCLK
VMA_DQ61 AD27 T27 VMA_MA12 VMC_DQ61 D19 C1 THMCLK THMCLK 30
FBAD61 FBA_CMD14 T81 FBCD61 FBC_REFCLK#
VMA_DQ62 AF27 V28 VMA_RST VMC_DQ62 D18
VMA_DQ63 FBAD62 FBA_CMD15 VMA_MA7 VMC_DQ63 FBCD62
AE28 FBAD63 FBA_CMD16 V30 VMA_MA7 18 E19 FBCD63
U31 VMA_MA10 In NB8P C1used as I2CS_SCL signal, B1used as I2CS_SDA signal
FBA_CMD17 VMA_MA10 18
R27 VMA_CKE
FBA_CMD18 VMA_CKE 18
VMA_DM0 M29 V29 VMA_MA0 VMC_DM0 A4
FBADQM0 FBA_CMD19 VMA_MA0 18 FBCDQM0
VMA_DM1 M30 T30 VMA_MA9 VMC_DM1 E11 G8 G73_G8 L25
FBADQM1 FBA_CMD20 VMA_MA9 18 FBCDQM1 FBC_PLLVDD T65
VMA_DM2 G30 W28 VMA_MA6 VMC_DM2 F5 15mil E@10nH
VMA_DM3 F29 R29 VMA_MA2 VMC_DM3 C9 G10 FBC_PLLAVDD
FBADQM3 FBA_CMD22 VMA_MA2 18 FBCDQM3 FBC_PLLAVDD VGA1.2V
VMA_DM4 AA29 R30 VMA_MA8 VMC_DM4 C28
VMA_DM5 AK30 P29 VMA_MA3 VMC_DM5 F24 G9 C256 C261 C277
FBADQM5 FBA_CMD24 VMA_MA3 18 FBCDQM5 FBC_PLLGND
VMA_DM6 AC30 U28 VMA_MA1 VMC_DM6 C24
VMA_DM7 AG30 Y32 VMA_MA13 VMC_DM7 E20 E@470P/50V E@4700P/[email protected]/6.3V
FBADQM7 FBA_CMD26 T188 FBCDQM7
P28 VMA_CLK0
FBA_CLK0 VMA_CLK0 18
VMA_WDQS0 L28 R28 VMA_CLK0# VMC_WDQS0 C5
FBADQS_WP0 FBA_CLK0# VMA_CLK0# 18 FBCDQS_WP0
VMA_WDQS1 K31 Y27 VMA_CLK1 VMC_WDQS1 E10 K26 FBCAL_PD R280 [email protected]/F
FBADQS_WP1 FBA_CLK1 VMA_CLK1 18 FBCDQS_WP1 FBCAL_PD_VDDQ VCC1.8
VMA_WDQS2 G32 AA27 VMA_CLK1# VMC_WDQS2 E5
FBADQS_WP2 FBA_CLK1# VMA_CLK1# 18 FBCDQS_WP2
VMA_WDQS3 G28 VMC_WDQS3 B8 H26 FBCAL_PU R284 [email protected]/F
VMA_WDQS4 AB28 FBADQS_WP3 VMC_WDQS4 FBCDQS_WP3 FBCAL_PU_GND
FBADQS_WP4 A29 FBCDQS_WP4
VMA_WDQS5 AL32 VMC_WDQS5 D25 J26 FBCAL_TERM R283 [email protected]/F
VMA_WDQS6 AF32 FBADQS_WP5 VMC_WDQS6 FBCDQS_WP5 FBCAL_TERM_GND
FBADQS_WP6 B25 FBCDQS_WP6
B VMA_WDQS7 AH30 VMC_WDQS7 F20 Update for Nvidia FAE suggestion B
FBADQS_WP7 FBA_CMD27 FBCDQS_WP7
RFU2 Y30 T87 Nicole 11/20
AC26 G73_AC26
RFU3 T80
VMA_RDQS0 M28 VMC_RDQS0 C6
VMA_RDQS1 K32 FBADQS_RN0 VMA_DEBUG VMC_RDQS1 FBCDQS_RN0 F_VREF2 filter can be
FBADQS_RN1 FBA_DEBUG AC27 T83 E9 FBCDQS_RN1
VMA_RDQS2 G31 pin D31, D32 in NB8X are NC pins VMC_RDQS2 E6 A28 FB_VREF2 15mil remove from nvidia
FBADQS_RN2 FBCDQS_RN2 FB_VREF2 T84
VMA_RDQS3 G27 D32 VMA_REFCK VMC_RDQS3 A8 HANK recommend
FBADQS_RN3 FBA_REFCLK T189 FBCDQS_RN3
VMA_RDQS4 AA28 D31 VMA_REFCK# VMC_RDQS4 B29
FBADQS_RN4 FBA_REFCLK# T85 FBCDQS_RN4
VMA_RDQS5 AL31 VMC_RDQS5 E25 G70,G71: Stuff these parts
VMA_RDQS6 AF31 FBADQS_RN5 C426 [email protected]/6.3V VMC_RDQS6 FBCDQS_RN5
FBADQS_RN6 A25 FBCDQS_RN6 G72M,G73M : NC
VMA_RDQS7 AH29 L33 VGA1.2V VMC_RDQS7 F21
VCC1.8 FBADQS_RN7 C422 [email protected]/10V E@BLM18PG221SN1D FBCDQS_RN7
R299 *E@1K/F G23 H_PLLVDD
FBA_PLLVDD E@U_GPU_G3
2 1 15mil
G25 FBA_PLLAVDD
15mil L34
FBA_PLLAVDD VGA1.2V
FB_VREF1 E32
FB_VREF1 C450 E@10nH
FBA_PLLGND G24
2
C439
R301 C486 [email protected]/6.3V [email protected]/10V
E@U_GPU_G3
*E@1K/F
*[email protected] SLAVE ADDRESS: (1001 100) 94h
1
C460 C454 VCC3

E@470P/50V E@4700P/25V For EMI
VREF = FBVDDQ * R496 R115

Rbot/(Rtop + Rbot) YELLOW R478 *E@200/F MAX6649_V *[email protected] *[email protected]
VCC3
BLOCK is U23
17 GFX_THMD- R119
Still remain VREF circuit for FAE suggestion for G8X 1 6 ALERT# *E@0
VCC /ALERT R647 VGA_OVT# 17
GFX_THMD- 3 7 *E@0 THMDAT
chip only C690 GFX_THMD+ 2
DXN SDA
8 R648 *E@0 THMCLK
*E@2200P/50V DXP SCLK OVERT# R120 *E@0
5 GND /THERM 4 THERM_ALERT# 22,30
C687
17 GFX_THMD+
A *E@MAX6649_A A
*[email protected]/10V
change to MAX6649 for Nvidia guarantee

nicole 11/07
VGA THERMAIL CIRCUIT, When use GPU internal sensor, not stuff
PROJECT : CH3
VGA 1A

5 4 3 2 1
5 4 3 2 1
16
YELLOW BLOCK is
for G8X chip OPTION SIGNAL FROM NB FOR UMA VGA
VCC1.8
R479 E@0 only
TXLCLKOUT+ RP39 3 4 *I@4P2R-S-0 LA_CLK LA_CLK 6
80mA 15mil TXLCLKOUT- 1 2 LA_CLK# LA_CLK# 6
U27D
C290 E@470P/50V IFPAB_PLLVDD AC9 AJ9 C_TXLCLKOUT- TXLOUT0- RP32 1 2 *I@4P2R-S-0 LA_DATAN0 LA_DATAN0 6
C298 E@4700P/25V IFPAB_PLLVDD IFPA_TXC# C_TXLCLKOUT+ TXLOUT0+ LA_DATAP0
IFPA_TXC AK9 3 4 LA_DATAP0 6
C236 E@10U/6.3V AJ6 C_TXLOUT0- TXLOUT1+ RP34 3 4 *I@4P2R-S-0 LA_DATAP1 LA_DATAP1 6
IFPA_TXD0# C_TXLOUT0+ TXLOUT1- LA_DATAN1
IFPA_TXD0 AH6 1 2 LA_DATAN1 6
AD9 AH7 C_TXLOUT1-
IFPAB_PLLGND IFPA_TXD1# C_TXLOUT1+ TXLOUT2+ RP36 1
IFPA_TXD1 AH8 2 *I@4P2R-S-0 LA_DATAP2 LA_DATAP2 6
AK8 C_TXLOUT2- TXLOUT2- 3 4 LA_DATAN2 LA_DATAN2 6
D
C284 E@470P/50V IFPA_IOVDD IFPA_TXD2# C_TXLOUT2+ D
AF9 IFPA_IOVDD IFPA_TXD2 AJ8
45mA C291 E@4700P/25V AF8 AH5
C332 E@10U/6.3V IFPB_IOVDD IFPA_TXD3#
LVDS IFPA_TXD3 AJ5
R210 E@0 15mil AL4 C_TXLCLK1UT- OPTION SIGNAL FROM Nvidia to VGA
VCC1.8 IFPB_TXC# TXLCLK1UT+ 25
AK4 C_TXLCLK1UT+
IFPB_TXC TXLCLK1UT- 25
T176 IFPABVPROBE AM4 AM5 C_TXLOUT4- C_TXLCLKOUT+RP38 3 4 E@4P2R-S-0
IFPAB_VPROBE IFPB_TXD4# TXLOUT4- 25 TXLCLKOUT+ 25
R194 E@1K IFPABRSET AL5 AM6 C_TXLOUT4+ C_TXLCLKOUT- 1 2
IFPAB_RSET IFPB_TXD4 TXLOUT4+ 25 TXLCLKOUT- 25
AL7 C_TXLOUT5- C_TXLOUT0- RP33 1 2 E@4P2R-S-0
IFPB_TXD5# TXLOUT5- 25 TXLOUT0- 25
AM7 C_TXLOUT5+ C_TXLOUT0+ 3 4
IFPB_TXD5 TXLOUT5+ 25 TXLOUT0+ 25
15mil AK5 C_TXLOUT6- C_TXLOUT1- RP35 1 2 E@4P2R-S-0
IFPB_TXD6# TXLOUT6- 25 TXLOUT1- 25
AK6 C_TXLOUT6+ C_TXLOUT1+ 3 4
IFPB_TXD6 TXLOUT6+ 25 TXLOUT1+ 25
AL8 C_TXLOUT2- RP37 3 4 E@4P2R-S-0
IFPB_TXD7# TXLOUT2- 25
R249 E@0 DACA_VDD AK7 C_TXLOUT2+ 1 2
VCC3 IFPB_TXD7 TXLOUT2+ 25
C319 E@470P/50V AD10 K2 L_DDCCLK R163 E@0 CRTCLK
DACA_VDD I2CA_SCL CRTCLK 6,24
C299 E@4700P/25V J3 L_DDCDAT R162 E@0 CRTDAT
I2CA_SDA CRTDAT 6,24
C271 E@10U/6.3V
AF10 CRT_HSYNC R88 E@0 HSYNC_COM
DACA_HSYNC HSYNC_COM 6,24
15mil CRT DACA_VSYNC AK10 CRT_VSYNC R91 E@0 VSYNC_COM
VSYNC_COM 6,24
C306 [email protected]/16V DACA_VREF AH10 AH11 L_CRT_R R75 E@0 CRT_R
DACA_VREF DACA_RED CRT_R 6,24
R204 E@124/F DACA_RSET AH9 AJ12 L_CRT_G R79 E@0 CRT_G
DACA_RSET DACA_GREEN CRT_G 6,24
AG9 AH12 L_CRT_B R83 E@0 CRT_B
DACA_IDUMP DACA_BLUE CRT_B 6,24
V8 DACB_VDD
DACB_RED R6
DACB_GREEN T5
R5 TV T6 L_CRT_R R234 E@150/F
DACB_VREF DACB_BLUE L_CRT_G R252 E@150/F
R7 DACB_RSET
C V7 L_CRT_B R241 E@150/F C
DACB_IDUMP
15mil
T20 IFPCDVPROBEAK3 AM3
IFPCD_VPROBE IFPC_TXC# EX_TXC_HDMI- 25
R181 E@1K IFPCDRSET AH3 AM2 HDMI_SCL R153 E@2K
IFPCD_RSET IFPC_TXC EX_TXC_HDMI+ 25 VCC5
R206 E@0 AE1 HDMI_SDA R154 E@2K
VCC1.8 IFPC_TXD0# EX_TX0_HDMI- 25
IFPC_TXD0 AE2 EX_TX0_HDMI+ 25
C318 E@470P/50V AF2
IFPC_TXD1# EX_TX1_HDMI- 25
40mA C305 E@4700P/25V 15mil IFPCD_PLLVDD AA10 AF1
IFPCD_PLLVDD IFPC_TXD1 EX_TX1_HDMI+ 25
C266 E@10U/6.3V AH1
IFPC_TXD2# EX_TX2_HDMI- 25
AB10 IFPCD_PLLGND IFPC_TXD2 AG1 EX_TX2_HDMI+ 25
TMDS IFPD_TXC# AH2
300mA IFPC_DVI_3VR130 E@0 AG3
C249 E@470P/50V IFPC_IOVDD IFPD_TXC
15mil AD6 IFPC_IOVDD IFPD_TXD4# AJ1
C257 E@4700P/25V AK1
C230 E@10U/6.3V IFPD_TXD4
IFPD_TXD5# AL1
IFPC_DVI_3V R129 E@0 IFPD_IOVDD AE7 AL2
C229 E@10U/6.3V IFPD_IOVDD IFPD_TXD5
15mil 15mil IFPD_TXD6# AJ3
C272 E@470P/50V AJ2
C283 E@4700P/25V IFPD_TXD6
need add to 3v
120mA R199 E@10K DACC_VD AD7 H4 HDMI_SCL HDMI_SCL 25
DACC_VDD I2CB_SCL HDMI_SDA
I2CB_SDA J4 HDMI_SDA 25
YELLOW BLOCK is
AG7
for G8X chip DACC_HSYNC
DAC DACC_VSYNC AG5
VGA1.2V only AH4 AF6
DACC_VREF DACC_RED
AF5 DACC_RSET DACC_GREEN AG6
AG4 AE5 DAC_BLU
DACC_IDUMP DACC_BLUE T46
R228 E@0 NV_PLLVDD R132 E@10K/04
40mA C313 [email protected]/10V T9 T2 R492 *E@22/04 27M_BUFO
C296 E@4700P/25V PLLVDD XTALOUTBUFF GFX_27MSS R493 E@10K/04
B XTALSSIN T1 B
40mA C280 E@10U/6.3V
T10 U1 EVGA-XTALI
VID_PLLVDD XTALIN
XTAL
5ppm
Y2
U10 U2 EVGA-XTALO 2 1
PLLGND XTALOUT
15mil
E@U_GPU_G3 C239 C238
E@27MHZ E@27P/04
E@27P/04
close to ICS91730
Q8
R131 E@0
VCC3 SPREAD SPECTRUM
3
E@AO3409 VCC3
1
VCC3 R483 *E@22/04 GFX_27MSS

C211
VGA_GD# 2 [email protected]/16V
GFX27M_L
2
VCC3 C215
R128 R497 R488 *E@10P/50V/04
*E@0 *E@10K/04
15mil *E@10K/04
1
R121 U24
E@10K R489 E@10K IFPC_DVI_3V ICSS_PD 8 2 3V_SSC R140 *[email protected]/06
PD# VDD VCC3
3
A 27M_BUFO 1 4 A
IPFC_C
CLKIN CLKOUT
5 ICSS_RFO C204 C197 C208 C214
REFOUT R480
2 6,17,25 EDIDCLK 7 SCL
6 3 *E@10K/04 *[email protected]/10V/04 *[email protected]/10V/08
6,17,25 EDIDDATA SDA GND *E@470P/50V/04 *[email protected]/10V/08
Q7 *E@ICS91730AM-T PROJECT : CH3
E@2N7002E
1
FOR IFPC VDD LEAKAGE CIRCIUT

I2C ADDRESS: 0xD4H
When use internal spread spectrum, this part not stuff Size Document Number R ev
VGA 1A

5 4 3 2 1
5 4 3 2 1
17
15mil
U27E VCC3
VCC3 M7 P2 MIOAD0
MIOA_VDDQ_0 MIOAD0 MIOAD1
M8 MIOA_VDDQ_1 MIOAD1 N2 PCI DEVICE
C295 [email protected]/10V R8 N1 MIOAD2 R123 E@10K VCC3
MIOA_VDDQ_2 MIOAD2 MIOAD3 R124 E@10K
T8 MIOA_VDDQ_3 MIOAD3 N3
U9 M1 MIOAD4 R133 E@10K PCI_DEVICE[3:0] DESCRIPTION
MIOA_VDDQ_4 MIOAD4 MIOAD5 R122 E@10K
MIOAD5 M3
MIOACAL_PU L3 P5 MIOAD6 MIOAD2/3/4/5 set to 1000 G72M/G73M R143 *E@10K MIOBD0 R503 E@10K
T23
MIOACAL_PD L1 MIOACAL_PU_GND MIOAD6 MIOAD7 RAM_CFG0
T159 MIOACAL_PD_VDDQ MIOAD7 N6 1111 for EDID panel 0101 NB8P-SE
MIOA_VREF L2 N5 MIOAD8 0110 G72M-Z R142 *E@10K MIOBD1 R502 E@10K RAM_CFG1
T169 MIOA_VREF MIOAD8
M4 MIOAD9 0111 NB8P-GS
MIOAD9 MIOAD10 R145 E@10K MIOBD8 R505 *E@10K
D MIOAD10 L4 T34 o t hers Res erved RAM_CFG2 D
MIOAD L5 MIOAD11
MIOAD11 T61
R3 MIOAHSYNC R192 E@10K MIOBD9 R188 *E@10K RAM_CFG3
MIOA_HSYNC T16
R1 MIOAVSYNC
MIOA_VSYNC T162
P1 MIOADE VIPD4 R501 E@2K PCI_DEVICE0 PCI_DEVICE[3:0]
MIOA_DE T158
P3 MIOACTL3 Default are
MIOA_CTL3 T170
R4 MIOA_CKO VIPD5 R499 *E@2K PCI_DEVICE1 "0",can remove
MIOA_CLKOUT T156
P4 MIOA_CKO#
MIOA_CLKOUT# T41 pull down
15mil M5 MIOA_CKI R191 E@10K VIPD3 R500 E@2K PCI_DEVICE2
MIOA_CLKIN MIOBD2 R141 E@10K resister from
VCC3 AA8 AC3 MIOBD0 MIOA_CKI through a 10K MIOBD6 R167 E@10K VCC3 VIPD11 R189 *E@2K PCI_DEVICE3 nvidia HANK
MIOB_VDDQ_0 MIOBD0 MIOBD1 VCC3
AB7 MIOB_VDDQ_1 MIOBD1 AC1 resistor to GND from Lincia recommend
C308 [email protected]/10V AB8 AC2 MIOBD2 MIOBD2 set to 0 and MIOBD6 set to 1 from Lincia R176 E@10K G73_AD3 R183 *E@2K PCI_DEVICE4
MIOB_VDDQ_2 MIOBD2 VIPD3
AC6 MIOB_VDDQ_3 MIOBD3 AB2
AB1 VIPD4
MIOBD4 VIPD5 R166
AC7 MIOB_VDDQ_4 MIOBD5 AA1
MIOBCAL_PD Y1 AB3 MIOBD6 E@10K R171 *E@2K MIOAHSYNC R175 E@2K SLOT_CLOCK_CFG
T172 MIOBCAL_PD_VDDQ MIOBD6
MIOBCAL_PU Y3 AA3 MIOBD7 MIOBD7 pull down for G73M
T155 MIOBCAL_PU_GND MIOBD7
MIOBVREF Y2 AC5 MIOBD8 R165 *E@10K
T164 MIOB_VREF MIOBD8 and pull high for NB8P,
AB5 MIOBD9 R490 E@2K MIOAD1 SUB_VENDOR
MIOBD
MIOBD9
AB4 VIPD10 MIOB_DE pull up for
MIOBD10 VIPD11 G73,pull down for NB8P from
MIOBD11 AA5 T54 VCC3
SHARE M/B SYSTEM BIOS, SUB VENDOR
AE3 ROMTYPE1 nvidia Lincia recommend
MIOB_VSYNC T24 ID NEED PULL DOWN .
AF3 3GIO_PADCFG3
MIOB_HSYNC MIOB_DE R504 *E@10K
MIOB_DE AD1
AD3 G73_AD3
MIOB_CTL3 T29
AD4 G73_AD4 R144
MIOB_CLKOUT T166 VCC3
AD5 G73_AD5 E@10K NB8P VRAM Configuration Table
MIOB_CLKOUT# T45
MIOB_CLKIN AE4 MIOB_CKI R186 E@10K
GFX_VID0 R201 *E@2K RAM_CFG[3:0] DESCRIPTION V endor
C F6 G73_F6 C
CLAMP T39
GFX_THMD- J1 G2 EXT_SCLK R135 E@0 EDIDCLK JTAG_TMS R213 *E@10K
15 GFX_THMD- THERMDN I2CC_SCL EDIDCLK 6,16,25
GFX_THMD+ K1 G1 EXT_SDAT R137 E@0 EDIDDATA 0000 Res erved
15 GFX_THMD+ THERMDP I2CC_SDA EDIDDATA 6,16,25
K3 HDMI_DET JTAG_TDI R222 *E@10K 0001 DDR3 16Mx32-136ball,128bit Qimonda
GPIO0 HDMI_DET 25
H1 DVI_DET 0010 DDR3 16Mx32-136ball,128bit Hynix
GPIO1 JTAG_TCK R229 *E@10K
GPIO2 K5 T17 0011 DDR3 16Mx32-136ball,128bit S amsung
G5 G72_DISP_ON
GPIO3 R136 E@0 BLON JTAG_TRST# R250 E@10K
THERMAL GPIO4 E2 BLON 6,25
J5 GFX_VID0 0100 Res erved
GPIO GPIO5 GFX_VID1 HDMI_DET R164 *E@2K
GPIO6 G6 T56 GPIO1 PULL 0101 DDR3 8Mx32-136ball,128bit Qimonda
YELLOW K6 GFX_VID2 0110 DDR3 8Mx32-136ball,128bit Hynix
JTAG_TCK GPIO7 GPIO8
T26
DVI_DET
DOWN strap can
AJ11 E1 R139 *E@2K 0111 DDR3 8Mx32-136ball,128bit S amsung
BLOCK is T71
JTAG_TMS AK11
JTAG_TCK GPIO8
D2 VGA_OVT#
T167 be remove from
T67 JTAG_TMS GPIO9 VGA_OVT# 15
for G8X T69
JTAG_TDI AK12 JTAG_TDI GPIO10 H5 GPIO10
T53
nvidia HANK
chip JTAG_TDO AL12 F4 GPIO11 recommend Update configuration table
T180 JTAG_TDO GPIO11 T33
JTAG_TRST# AL13 E3 GFX_GPIO12
only T182 JTAG_TRST# GPIO12 T163 nicole 12/01
STRAP F1 AE26 MSTRAPSEL0
T165 STRAP MEMSTRAPSEL0 T79
AD26 MSTRAPSEL1
MEMSTRAPSEL1 T82
AH31 MSTRAPSEL2
MEMSTRAPSEL2 T185
GPIO13 U3 AH32 MSTRAPSEL3
T161 RFU6 MEMSTRAPSEL3 T186
T160 VGA_FU7 V3
VGA_FU8 RFU7 ROM_CS#
T51 U6 RFU8 ROMCS# AA4 T22
T37 DACB_CSYNC U5 W2 ROM_SI R484 E@0
RFU9 ROM_SI T153
GPIO14 U4 AA6 ROM_SO GFX_VID0 R487 E@0
T42 RFU10 ROM_SO T55 3VPCU
VGA_FU11 V4 ROM AA7 ROM_CK
T38
VGA_FU12 RFU11 ROM_SCLK HDCP_SCL
T60 H : Low Voltage 3VPCU
T57 V6 RFU12 I2CH_SCL G3
VGA_FU13 W3 H3 HDCP_SDA L : Normal Voltage
T157 RFU13 I2CH_SDA
VGA_FU14 V1 U6
T171 RFU14
5
T36 VGA_FU15 Y5 VGACORECTL G73M U7
RFU15
5
B B
VGA_FU16 W1 F3 RESET_BUF# GFX_VID0 2
T154 RFU16 BUFRST# T18
T32 VGA_FU17 W4 T3 STEREO HI 1.0V 4 G72_DISP_ON 2
RFU17 STEREO T173 V_PWRCNTL 38
GREEN VGA_FU18 W5 M6 SWAPRDY_A ECPWROK 1 4
T52 RFU18 SWAPRDY_A T62 DIGON 6,25
T43 VGA_FU19 V5 A26 VGA_TEST R282 E@10K LO 1.1V 1
BLOCK can VGA_FU20 Y6
RFU19 TESTMEMCLK
H2 VGA_TMODE R138 E@10K *E@TC7SH08FU
6,22,36 ECPWROK
T63
3
remove if RFU20 TESTMODE *E@TC7SH08FU
3
use G8X E@U_GPU_G3
VCC3
VCC3
VCC3
R491 E@2K MIOAD0 R150 *E@2K PEX_PLL_EN

R495
U22 MIOAD6 R193 E@2K 3GIO_PADCFG0
E@10K HDCP_SDA 5 8 Default are
SDA VCC MIOAD8 R209 *E@2K
3 NC VCC 7 "0",can remove 3GIO_PADCFG1
pull down resister
C686 MIOAD9 R182 *E@2K 3GIO_PADCFG2
HDCP_SCL from nvidia HANK
6 SCL
1 [email protected]/10V recommend 3GIO_PADCFG3 R168 *E@2K 3GIO_PADCFG3
R494 GND
A 2 NC2 GND 4 A
E@10K E@AT88SC0808C configure the GPU PCI-E interface 0001---Mobile
for HDMI function PROJECT : CH3

VGA 1A

5 4 3 2 1
5 4 3 2 1
External VGA Memory VMA_DQ[63..0] 15

VMA_DM[7..0] 15
VMA_WDQS[7..0] 15
VMA_RDQS[7..0] 15 256/512 Mbit GDDRIII Channels 18
VCC1.8 VCC1.8
U29 U30
VMA_DQ2 T3 A1 C508 [email protected] VMA_DQ37 T3 A1 C511 [email protected]
VMA_DQ4 DQ31 | DQ23 VDDQ VMA_DQ38 DQ31 | DQ23 VDDQ
T2 DQ30 | DQ22 VDDQ#A12 A12 T2 DQ30 | DQ22 VDDQ#A12 A12
VMA_DQ0 R3 C1 C505 [email protected] VMA_DQ39 R3 C1 C776 [email protected]
D VMA_DQ1 DQ29 | DQ21 VDDQ#C1 VMA_DQ36 DQ29 | DQ21 VDDQ#C1 D
R2 DQ28 | DQ20 VDDQ#C4 C4 R2 DQ28 | DQ20 VDDQ#C4 C4
VMA_DQ3 M3 C9 C512 [email protected] VMA_DQ32 M3 C9 C773 [email protected]
VMA_DQ6 DQ27 | DQ19 VDDQ#C9 VMA_DQ35 DQ27 | DQ19 VDDQ#C9
N2 DQ26 | DQ18 VDDQ#C12 C12 N2 DQ26 | DQ18 VDDQ#C12 C12
VMA_DQ7 L3 E1 C500 [email protected] VMA_DQ33 L3 E1 C772 [email protected]
VMA_DQ5 DQ25 | DQ17 VDDQ#E1 VMA_DQ34 DQ25 | DQ17 VDDQ#E1
M2 DQ24 | DQ16 VDDQ#E4 E4 M2 DQ24 | DQ16 VDDQ#E4 E4
VMA_DQ9 T10 E9 C497 [email protected] VMA_DQ55 T10 E9 C771 [email protected]
VMA_DQ8 DQ23 | DQ31 VDDQ#E9 VMA_DQ53 DQ23 | DQ31 VDDQ#E9
T11 DQ22 | DQ30 VDDQ#E12 E12 T11 DQ22 | DQ30 VDDQ#E12 E12
VMA_DQ11 R10 J4 C490 [email protected] VMA_DQ54 R10 J4 C777 [email protected]
VMA_DQ10 DQ21 | DQ29 VDDQ#J4 VMA_DQ52 DQ21 | DQ29 VDDQ#J4
R11 DQ20 | DQ28 VDDQ#J9 J9 R11 DQ20 | DQ28 VDDQ#J9 J9
VMA_DQ15 M10 N1 C485 [email protected] VMA_DQ51 M10 N1 C525 [email protected]
VMA_DQ14 DQ19 | DQ27 VDDQ#N1 VMA_DQ48 DQ19 | DQ27 VDDQ#N1
N11 DQ18 | DQ26 VDDQ#N4 N4 N11 DQ18 | DQ26 VDDQ#N4 N4
VMA_DQ12 L10 N9 C479 [email protected] VMA_DQ49 L10 N9 C524 [email protected]
VMA_DQ13 DQ17 | DQ25 VDDQ#N9 VMA_DQ50 DQ17 | DQ25 VDDQ#N9
M11 DQ16 | DQ24 VDDQ#N12 N12 M11 DQ16 | DQ24 VDDQ#N12 N12
VMA_DQ27 G10 R1 C469 [email protected] VMA_DQ61 G10 R1 C522 [email protected]
VMA_DQ24 DQ15 | DQ7 VDDQ#R1 VMA_DQ62 DQ15 | DQ7 VDDQ#R1
F11 DQ14 | DQ6 VDDQ#R4 R4 F11 DQ14 | DQ6 VDDQ#R4 R4
VMA_DQ28 C503 E@10U VMA_DQ63 C529 E@10U
+
VMA_DQ25 E11 R12 VMA_DQ57 E11 R12
VMA_DQ31 DQ12 | DQ4 VDDQ#R12 C493 E@22U VMA_DQ58 DQ12 | DQ4 VDDQ#R12 C779 E@22U
C10 DQ11 | DQ3 VDDQ#V1 V1 C10 DQ11 | DQ3 VDDQ#V1 V1
VMA_DQ26 C11 V12 VMA_DQ60 C11 V12
VMA_DQ30 DQ10 | DQ2 VDDQ#V12 C464 E@220P VMA_DQ59 DQ10 | DQ2 VDDQ#V12 C514 E@220P
B10 DQ9 | DQ1 B10 DQ9 | DQ1
VMA_DQ29 B11 A2 VMA_DQ56 B11 A2
VMA_DQ17 DQ8 | DQ0 VDD C456 E@4700P VMA_DQ43 DQ8 | DQ0 VDD C515 E@4700P
G3 DQ7 | DQ15 VDD#A11 A11 G3 DQ7 | DQ15 VDD#A11 A11
VMA_DQ16 F2 F1 VMA_DQ44 F2 F1
VMA_DQ18 DQ6 | DQ14 VDD#F1 C459 [email protected] VMA_DQ41 DQ6 | DQ14 VDD#F1 C775 [email protected]
F3 DQ5 | DQ13 VDD#F12 F12 F3 DQ5 | DQ13 VDD#F12 F12
VMA_DQ20 E2 M1 VMA_DQ42 E2 M1
VMA_DQ22 DQ4 | DQ12 VDD#M1 C495 E@10U VMA_DQ45 DQ4 | DQ12 VDD#M1 C519 E@10U
+
C3 DQ3 | DQ11 VDD#M12 M12 C3 DQ3 | DQ11 VDD#M12 M12
VMA_DQ21 C2 V2 VMA_DQ40 C2 V2
VMA_DQ23 DQ2 | DQ10 VDD#V2 C494 E@22U VMA_DQ47 DQ2 | DQ10 VDD#V2 C778 E@22U
B3 DQ1 | DQ9 VDD#V11 V11 B3 DQ1 | DQ9 VDD#V11 V11
VMA_DQ19 B2 VMA_DQ46 B2
DQ0 | DQ8 DQ0 | DQ8
VSSQ B1 VSSQ B1
VSSQ#B4 B4 VSSQ#B4 B4
VMA_BA2 H10 B9 VMA_RAS# H10 B9
C 15 VMA_BA2 BA2 | RAS VSSQ#B9 BA2 | RAS VSSQ#B9 C
VMA_BA1 G9 B12 VMA_BA0 G9 B12
15 VMA_BA1 BA1 | BA0 VSSQ#B12 BA1 | BA0 VSSQ#B12
VMA_BA0 G4 D1 VMA_BA1 G4 D1
15 VMA_BA0 BA0 | BA1 VSSQ#D1 BA0 | BA1 VSSQ#D1
VSSQ#D4 D4 VSSQ#D4 D4
VMA_MA11 L4 D9 VMA_MA7 L4 D9
15 VMA_MA11 A11 | A7 VSSQ#D9 A11 | A7 VSSQ#D9
VMA_MA10 K2 D12 VMA_MA8 K2 D12
15 VMA_MA10 A10 | A8 VSSQ#D12 A10 | A8 VSSQ#D12
VMA_MA9 M9 G2 M9 G2
15 VMA_MA9 A9 | A3 VSSQ#G2 15 VMA_MA3H A9 | A3 VSSQ#G2
VMA_MA8 K11 G11 VMA_MA10 K11 G11
15 VMA_MA8 A8/AP | A10 VSSQ#G11 A8/AP | A10 VSSQ#G11
VMA_MA7 L9 L2 VMA_MA11 L9 L2
15 VMA_MA7 A7 | A11 VSSQ#L2 A7 | A11 VSSQ#L2
VMA_MA6 K10 L11 K10 L11
15 VMA_MA6 A6 | A2 VSSQ#L11 15 VMA_MA2H A6 | A2 VSSQ#L11
VMA_MA5 H11 P1 VMA_MA1 H11 P1
15 VMA_MA5 A5 | A1 VSSQ#P1 A5 | A1 VSSQ#P1
VMA_MA4 K9 P4 VMA_MA0 K9 P4
VMA_MA3 M4 P9 VMA_MA9 M4 P9
VMA_MA2 K3 P12 VMA_MA6 K3 P12
VMA_MA1 H2 T1 H2 T1
15 VMA_MA1 A1 | A5 VSSQ#T1 15 VMA_MA5H A1 | A5 VSSQ#T1
VMA_MA0 K4 T4 K4 T4
15 VMA_MA0 A0 | A4 VSSQ#T4 15 VMA_MA4H A0 | A4 VSSQ#T4
VSSQ#T9 T9 VSSQ#T9 T9
VMA_CS0# F9 T12 VMA_CAS# F9 T12
15 VMA_CS0# CS | CAS VSSQ#T12 CS | CAS VSSQ#T12
VSS A3 VSS A3
VMA_WE# H9 A10 VMA_CKE H9 A10
15 VMA_WE# WE | CKE VSS#A10 WE | CKE VSS#A10
VSS#G1 G1 VSS#G1 G1
VMA_RAS# H3 G12 VMA_BA2 H3 G12
15 VMA_RAS# RAS | BA2 VSS#G12 RAS | BA2 VSS#G12
VSS#L1 L1 VSS#L1 L1
VMA_CAS# F4 L12 VMA_CS0# F4 L12
15 VMA_CAS# CAS | CS VSS#L12 VCC1.8 CAS | CS VSS#L12
V3 V3 VCC1.8
VMA_CKE VSS#V3 VMA_WE# VSS#V3
15 VMA_CKE H4 CKE | WE VSS#V10 V10 H4 CKE | WE VSS#V10 V10
15 VMA_CLK0# J10 CK 15 VMA_CLK1# J10 CK

J11 K1 GDDR3_VDDA0 L36 E@BLM18PG181SN1D J11 K1 GDDR3_VDDA1 L40 E@BLM18PG181SN1D
15 VMA_CLK0 CK VDDA 15 VMA_CLK1 CK VDDA
K12 GDDR3_VDDA#0 L39 E@BLM18PG181SN1D K12 GDDR3_VDDA#1 L37 E@BLM18PG181SN1D
VMA_RDQS0 VDDA#K12 VMA_RDQS4 VDDA#K12
P3 RDQS3 | RDQS2 P3 RDQS3 | RDQS2
R315 VMA_RDQS1 P10 C520 C498 R308 VMA_RDQS6 P10 C502 C516
VMA_RDQS3 RDQS2 | RDQS3 VMA_RDQS7 RDQS2 | RDQS3
D10 RDQS1 | RDQS0 D10 RDQS1 | RDQS0
B E@475 VMA_RDQS2 [email protected] [email protected] E@475 VMA_RDQS5 [email protected] [email protected] B
D3 RDQS0 | RDQS1 D3 RDQS0 | RDQS1
VMA_WDQS0 P2 VMA_WDQS4 P2
VMA_WDQS1 WDQS3 | WDQS2 VMA_WDQS6 WDQS3 | WDQS2
P11 WDQS2 | WDQS3 VSSA#J12 J12 P11 WDQS2 | WDQS3 VSSA#J12 J12
VMA_WDQS3 D11 J1 VMA_WDQS7 D11 J1
VMA_WDQS2 WDQS1 | WDQS0 VSSA VMA_WDQS5 WDQS1 | WDQS0 VSSA
D2 WDQS0 | WDQS1 D2 WDQS0 | WDQS1
VMA_DM0 N3 J3 VMA_DM4 N3 J3
VMA_DM1 DM3 | DM2 RFU2 VMA_DM6 DM3 | DM2 RFU2
N10 DM2 | DM3 N10 DM2 | DM3
VMA_DM3 E10 J2 VMA_DM7 E10 J2
VMA_DM2 DM1 | DM0 RFU1 VMA_DM5 DM1 | DM0 RFU1
E3 DM0 | DM1 E3 DM0 | DM1
RFU0 V4 RFU0 V4
VMA_RST V9 VMA_RST V9
15 VMA_RST RESET RESET
R525 E@243/F A4 R312 E@243/F A4
ZQ ZQ
VCC1.8
DDR3_VREF0 H1 Programmable impedance output DDR3_VREF1 H1
VREF R528 E@0 VREF R524 E@0
Programmable impedance output MF A9 buffer and active terminator MF A9
buffer and active terminator DDR3_VREF#0 H12 DDR3_VREF#1H12
VREF#H12 GND | VDD VREF#H12 GND | VDD
MIRROR FUNCTION EX: 240 Ohm is required for MIRROR FUNCTION
EX: 240 Ohm is required for Low==>136 FBGA(NORMAL) an output impedance of 40 Ohm Low==>136 FBGA(NORMAL)
an output impedance of 40 Ohm 136 FBGA High==>136 FBGA(REVERSE) 136 FBGA High==>136 FBGA(REVERSE)
E@GDDR3-512M(500MHZ) E@GDDR3-512M(500MHZ)
VCC1.8 VCC1.8 VCC1.8 VCC1.8
A A
R303 R310 R313 R306
[email protected]/F [email protected]/F [email protected]/F [email protected]/F
DDR3_VREF0 DDR3_VREF#0 DDR3_VREF1 DDR3_VREF#1

VREF = .72*VDDQ VREF = .72*VDDQ VREF = .72*VDDQ VREF = .72*VDDQ
R304 R309 C521
C499 R314 C528 R302 C501 PROJECT : CH3
[email protected]/F [email protected] [email protected]/F [email protected]
[email protected]/F [email protected] [email protected]/F [email protected] Quanta Computer Inc.
NVG73M VRAM-1(GDDR3) 1A

5 4 3 2 1
5 4 3 2 1
External VGA Memory VMC_DQ[63..0] 15

VMC_DM[7..0] 15
VMC_WDQS[7..0] 15
VMC_RDQS[7..0] 15
256/512 Mbit GDDRIII Channels 19
VCC1.8
VCC1.8 U28
U26 VMC_DQ55 T3 A1 C474 [email protected]
VMC_DQ29 C440 [email protected] VMC_DQ54 DQ31 | DQ23 VDDQ
T3 DQ31 | DQ23 VDDQ A1 T2 DQ30 | DQ22 VDDQ#A12 A12
VMC_DQ30 T2 A12 VMC_DQ49 R3 C1 C466 [email protected]
D VMC_DQ31 DQ30 | DQ22 VDDQ#A12 C433 [email protected] VMC_DQ52 DQ29 | DQ21 VDDQ#C1 D
R3 DQ29 | DQ21 VDDQ#C1 C1 R2 DQ28 | DQ20 VDDQ#C4 C4
VMC_DQ27 R2 C4 VMC_DQ48 M3 C9 C419 [email protected]
VMC_DQ28 DQ28 | DQ20 VDDQ#C4 C340 [email protected] VMC_DQ51 DQ27 | DQ19 VDDQ#C9
M3 DQ27 | DQ19 VDDQ#C9 C9 N2 DQ26 | DQ18 VDDQ#C12 C12
VMC_DQ25 N2 C12 VMC_DQ50 L3 E1 C412 [email protected]
VMC_DQ26 DQ26 | DQ18 VDDQ#C12 C244 [email protected] VMC_DQ53 DQ25 | DQ17 VDDQ#E1
L3 DQ25 | DQ17 VDDQ#E1 E1 M2 DQ24 | DQ16 VDDQ#E4 E4
VMC_DQ24 M2 E4 VMC_DQ62 T10 E9 C401 [email protected]
VMC_DQ10 DQ24 | DQ16 VDDQ#E4 C248 [email protected] VMC_DQ60 DQ23 | DQ31 VDDQ#E9
T10 DQ23 | DQ31 VDDQ#E9 E9 T11 DQ22 | DQ30 VDDQ#E12 E12
VMC_DQ9 T11 E12 VMC_DQ63 R10 J4 C395 [email protected]
VMC_DQ12 DQ22 | DQ30 VDDQ#E12 C251 [email protected] VMC_DQ61 DQ21 | DQ29 VDDQ#J4
R10 DQ21 | DQ29 VDDQ#J4 J4 R11 DQ20 | DQ28 VDDQ#J9 J9
VMC_DQ13 R11 J9 VMC_DQ58 M10 N1 C379 [email protected]
VMC_DQ15 DQ20 | DQ28 VDDQ#J9 C258 [email protected] VMC_DQ57 DQ19 | DQ27 VDDQ#N1
M10 DQ19 | DQ27 VDDQ#N1 N1 N11 DQ18 | DQ26 VDDQ#N4 N4
VMC_DQ11 N11 N4 VMC_DQ56 L10 N9 C367 [email protected]
VMC_DQ8 DQ18 | DQ26 VDDQ#N4 C267 [email protected] VMC_DQ59 DQ17 | DQ25 VDDQ#N9
L10 DQ17 | DQ25 VDDQ#N9 N9 M11 DQ16 | DQ24 VDDQ#N12 N12
VMC_DQ14 M11 N12 VMC_DQ44 G10 R1 C391 [email protected]
VMC_DQ16 DQ16 | DQ24 VDDQ#N12 C281 [email protected] VMC_DQ43 DQ15 | DQ7 VDDQ#R1
G10 DQ15 | DQ7 VDDQ#R1 R1 F11 DQ14 | DQ6 VDDQ#R4 R4
VMC_DQ19 VMC_DQ47 C480 E@10U
+
VMC_DQ18 C218 E@10U VMC_DQ46
+
F10 DQ13 | DQ5 VDDQ#R9 R9 E11 DQ12 | DQ4 VDDQ#R12 R12
VMC_DQ17 E11 R12 VMC_DQ42 C10 V1 C492 E@22U
VMC_DQ23 DQ12 | DQ4 VDDQ#R12 C489 E@22U VMC_DQ45 DQ11 | DQ3 VDDQ#V1
C10 DQ11 | DQ3 VDDQ#V1 V1 C11 DQ10 | DQ2 VDDQ#V12 V12
VMC_DQ20 C11 V12 VMC_DQ40 B10 C504 E@220P
VMC_DQ22 DQ10 | DQ2 VDDQ#V12 C294 E@220P VMC_DQ41 DQ9 | DQ1
B10 DQ9 | DQ1 B11 DQ8 | DQ0 VDD A2
VMC_DQ21 B11 A2 VMC_DQ34 G3 A11 C473 E@4700P
VMC_DQ0 DQ8 | DQ0 VDD C312 E@4700P VMC_DQ35 DQ7 | DQ15 VDD#A11
G3 DQ7 | DQ15 VDD#A11 A11 F2 DQ6 | DQ14 VDD#F1 F1
VMC_DQ1 F2 F1 VMC_DQ33 F3 F12 C509 [email protected]
VMC_DQ7 DQ6 | DQ14 VDD#F1 C325 [email protected] VMC_DQ32 DQ5 | DQ13 VDD#F12
F3 DQ5 | DQ13 VDD#F12 F12 E2 DQ4 | DQ12 VDD#M1 M1
VMC_DQ6 VMC_DQ39 C470 E@10U
+
E2 DQ4 | DQ12 VDD#M1 M1 C3 DQ3 | DQ11 VDD#M12 M12
VMC_DQ2 C219 E@10U VMC_DQ37
+
C3 DQ3 | DQ11 VDD#M12 M12 C2 DQ2 | DQ10 VDD#V2 V2
VMC_DQ4 C2 V2 VMC_DQ36 B3 V11 C491 E@22U
VMC_DQ3 DQ2 | DQ10 VDD#V2 C221 E@22U VMC_DQ38 DQ1 | DQ9 VDD#V11
B3 DQ1 | DQ9 VDD#V11 V11 B2 DQ0 | DQ8
VMC_DQ5 B2 B1
DQ0 | DQ8 VSSQ
VSSQ B1 VSSQ#B4 B4
B4 VMC_RAS# H10 B9
C VMC_BA2 VSSQ#B4 VMC_BA0 BA2 | RAS VSSQ#B9 C
15 VMC_BA2 H10 BA2 | RAS VSSQ#B9 B9 G9 BA1 | BA0 VSSQ#B12 B12
VMC_BA1 G9 B12 VMC_BA1 G4 D1
15 VMC_BA1 BA1 | BA0 VSSQ#B12 BA0 | BA1 VSSQ#D1
VMC_BA0 G4 D1 D4
15 VMC_BA0 BA0 | BA1 VSSQ#D1 VSSQ#D4
D4 VMC_MA7 L4 D9
VMC_MA11 VSSQ#D4 VMC_MA8 A11 | A7 VSSQ#D9
15 VMC_MA11 L4 A11 | A7 VSSQ#D9 D9 K2 A10 | A8 VSSQ#D12 D12
VMC_MA10 K2 D12 M9 G2
15 VMC_MA10 A10 | A8 VSSQ#D12 15 VMC_MA3H A9 | A3 VSSQ#G2
VMC_MA9 M9 G2 VMC_MA10 K11 G11
15 VMC_MA9 A9 | A3 VSSQ#G2 A8/AP | A10 VSSQ#G11
VMC_MA8 K11 G11 VMC_MA11 L9 L2
15 VMC_MA8 A8/AP | A10 VSSQ#G11 A7 | A11 VSSQ#L2
VMC_MA7 L9 L2 K10 L11
15 VMC_MA7 A7 | A11 VSSQ#L2 15 VMC_MA2H A6 | A2 VSSQ#L11
VMC_MA6 K10 L11 VMC_MA1 H11 P1
15 VMC_MA6 A6 | A2 VSSQ#L11 A5 | A1 VSSQ#P1
VMC_MA5 H11 P1 VMC_MA0 K9 P4
15 VMC_MA5 A5 | A1 VSSQ#P1 A4 | A0 VSSQ#P4
VMC_MA4 K9 P4 VMC_MA9 M4 P9
VMC_MA3 M4 P9 VMC_MA6 K3 P12
VMC_MA2 K3 P12 H2 T1
15 VMC_MA2 A2 | A6 VSSQ#P12 15 VMC_MA5H A1 | A5 VSSQ#T1
VMC_MA1 H2 T1 K4 T4
15 VMC_MA1 A1 | A5 VSSQ#T1 15 VMC_MA4H A0 | A4 VSSQ#T4
VMC_MA0 K4 T4 T9
15 VMC_MA0 A0 | A4 VSSQ#T4 VSSQ#T9
T9 VMC_CAS# F9 T12
VMC_CS0# VSSQ#T9 CS | CAS VSSQ#T12
15 VMC_CS0# F9 CS | CAS VSSQ#T12 T12 VSS A3
A3 VMC_CKE H9 A10
VMC_WE# VSS WE | CKE VSS#A10
15 VMC_WE# H9 WE | CKE VSS#A10 A10 VSS#G1 G1
G1 VMC_BA2 H3 G12
VMC_RAS# VSS#G1 RAS | BA2 VSS#G12
15 VMC_RAS# H3 RAS | BA2 VSS#G12 G12 VSS#L1 L1
L1 VMC_CS0# F4 L12
VMC_CAS# VSS#L1 CAS | CS VSS#L12 VCC1.8
15 VMC_CAS# F4 CAS | CS VSS#L12 L12 VSS#V3 V3
V3 VCC1.8 VMC_WE# H4 V10
VMC_CKE VSS#V3 CKE | WE VSS#V10
15 VMC_CKE H4 CKE | WE VSS#V10 V10
15 VMC_CLK1# J10 CK
J10 J11 K1 GDDR3_VDDA3 L60 E@BLM18PG181SN1D
15 VMC_CLK0# CK 15 VMC_CLK1 CK VDDA
J11 K1 GDDR3_VDDA2 L24 E@BLM18PG181SN1D K12 GDDR3_VDDA#3 L32 E@BLM18PG181SN1D
15 VMC_CLK0 CK VDDA VDDA#K12
K12 GDDR3_VDDA#2 L58 E@BLM18PG181SN1D VMC_RDQS6 P3
VMC_RDQS3 VDDA#K12 R285 VMC_RDQS7 RDQS3 | RDQS2 C448
P3 RDQS3 | RDQS2 P10 RDQS2 | RDQS3
R208 VMC_RDQS1 P10 C716 C286 VMC_RDQS5 D10 C752
B VMC_RDQS2 D10 RDQS2 | RDQS3 E@475 VMC_RDQS4 RDQS1 | RDQS0 [email protected] B
RDQS1 | RDQS0 D3 RDQS0 | RDQS1
E@475 VMC_RDQS0 D3 [email protected] [email protected] [email protected]
RDQS0 | RDQS1 VMC_WDQS6 P2 WDQS3 | WDQS2
VMC_WDQS3 P2 VMC_WDQS7 P11 J12
VMC_WDQS1 P11 WDQS3 | WDQS2 VMC_WDQS5 WDQS2 | WDQS3 VSSA#J12
WDQS2 | WDQS3 VSSA#J12 J12 D11 WDQS1 | WDQS0 VSSA J1
VMC_WDQS2 D11 J1 VMC_WDQS4 D2
VMC_WDQS0 WDQS1 | WDQS0 VSSA WDQS0 | WDQS1
D2 WDQS0 | WDQS1 VMC_DM6 N3 J3
VMC_DM3 VMC_DM7 DM3 | DM2 RFU2
N3 DM3 | DM2 RFU2 J3 N10 DM2 | DM3
VMC_DM1 N10 VMC_DM5 E10 J2
VMC_DM2 DM2 | DM3 VMC_DM4 DM1 | DM0 RFU1
E10 DM1 | DM0 RFU1 J2 E3 DM0 | DM1
VMC_DM0 E3 V4
DM0 | DM1 VMC_RST RFU0
RFU0 V4 V9 RESET
VMC_RST V9
15 VMC_RST RESET R300 E@243/F A4
R149 E@243/F ZQ
A4 ZQ VCC1.8
Programmable impedance output DDR3_VREF3 H1
DDR3_VREF2 VREF R298 E@0
Programmable impedance output H1 VREF buffer and active terminator MF A9
buffer and active terminator A9 R148 E@0 DDR3_VREF#3H12
DDR3_VREF#2 H12 MF VREF#H12 GND | VDD
EX: 240 Ohm is required for
VREF#H12 GND | VDD
an output impedance of 40 Ohm MIRROR FUNCTION
EX: 240 Ohm is required for MIRROR FUNCTION Low==>136 FBGA(NORMAL)
an output impedance of 40 Ohm Low==>136 FBGA(NORMAL) 136 FBGA High==>136 FBGA(REVERSE)
136 FBGA High==>136 FBGA(REVERSE) E@GDDR3-512M(500MHZ)
E@GDDR3-512M(500MHZ)
Update to 1.8V for reverse config.

VCC1.8 VCC1.8 nicole 10/9
VCC1.8 VCC1.8
A R520 R297 A
R198 R512
[email protected]/F [email protected]/F
[email protected]/F [email protected]/F
DDR3_VREF3 DDR3_VREF#3
DDR3_VREF2 DDR3_VREF#2 VREF = .72*VDDQ VREF = .72*VDDQ
VREF = .72*VDDQ VREF = .72*VDDQ
R184 C254 R523 C765 R296 C471
R515 C708 PROJECT : CH3
[email protected]/F [email protected] [email protected]/F [email protected] [email protected]/F [email protected]
[email protected]/F [email protected] Quanta Computer Inc.
NVG73M VRAM-2 (GDDR3) 1A

5 4 3 2 1
5 4 3 2 1
Place near to Mini-door CKL:C1/C2: 18pF -> CL:12.5pF

RTC VCCRTC
20
C577 C1/C: 10pF -> CL Value =
1U/16V 8.5pF
VCCRTC
3VPCU
D22
CH500H-40 R374
20K C814 CLK_32KX1
VCCRTC_2 18P VCC3 VCC3
2
1
D21
1
R417 CH500H-40 C579 G1 Y7 R582
1K 1U/16V *SHORT_ PAD1 10M
R365 32.768KHZ R340 R336
1M/F U33A 10K 10K
3
4
D AG25 RTCX1 FWH0/LAD0 E5 LAD0 31,36 D
C841 CLK_32KX2 AF24 F5 R CIN#
RTCX2 FWH1/LAD1 LAD1 31,36 VCCP
18P G8 GATEA20
FWH2/LAD2 LAD2 31,36
RTCRST# AF23 F6
BT1 RTCRST# FWH3/LAD3 LAD3 31,36
1 SM_INTRUDER# AD22 C4 VCCP
1 INTRUDER# FWH4/LFRAME# LFRAME# 31,36
2 2
RTC
LPC
ICH_INTVRMEN AF25 G9 LDRQ#0
INTVRMEN LDRQ0# T104
RTC CONN LAN100_SLP AD21 E6 LDRQ#1 R605 R413
LAN100_SLP LDRQ1#/GPIO23 T100
*56/F *56/F
LAN_JCLK B24 AF13 GATEA20
GLAN_CLK A20GATE GATEA20 36
T207 AG26 R597
A20M# H_A20M# 3
LAN_RSTSYNC D22 56/F
T138 LAN_RSTSYNC H_DPRSTP#_R R606 0
DPRSTP# AF26 H_DPRSTP# 3,6,37
LAN_RXD0 C21 AE26 H_DPSLP#_R R602 0/F
LAN_RXD0 DPSLP# H_DPSLP# 3
T132 LAN_RXD1 B21
T203 LAN_RXD2 LAN_RXD1
C22 LAN_RXD2 FERR# AD24 H_FERR# 3
LAN / GLAN
5VPCU T133
20MIL LAN_TXD0 D21 AG29 R612 0/F
H_PWRGD 3
Q16 T131 LAN_TXD1 LAN_TXD0 CPUPWRGD/GPIO49
E20 LAN_TXD1
R421 2.2K VCCRTC_1
3 1 T137 LAN_TXD2 C20 AF27
LAN_TXD2 IGNNE# H_IGNNE# 3 VCCP
T130
MMBT3904 AH21 AE24
GLAN_DOCK#/GPIO13 INIT# H_INIT# 3
R414 T204 AC20 H_INTR 3
2
INTR
CPU
+1.5V_PCIE R397 24.9/F GLAN_COMP_SB D25 AH14 R CIN#
GLAN_COMPI RCIN# RCIN# 36
2
4.7K C25 GLAN_COMPO R36
NMI AD23 H_NMI 3
ACZ_BCLK AJ16 AG28 H_SMI#_R R609 0/F 56
HDA_BIT_CLK SMI# H_SMI# 3
ACZ_S YNC AJ15 HDA_SYNC
AA24 H_STPCLK# 3
1
R411 ACZ_RST# STPCLK#
AE14 HDA_RST#
AE27 H_THERMTRIP_R R611 24.9/F
THRMTRIP# PM_THRMTRIP# 3,6
15K ACZ_SDIN0 AJ17
34 ACZ_SDIN0 HDA_SDIN0
ACZ_SDIN1 AH17 AA23
34 ACZ_SDIN1 HDA_SDIN1 TP8 T140 PDD[15:0] 33
C
AH15 HDA_SDIN2 R611 2" close ICH8 and R36 2'' close to R611 C
IHDA
T201 AD13 V1 PDD0
T110 HDA_SDIN3 DD0 PDD1
DD1 U2
ACZ_SDOUT AE13 V3 PDD2
HDA_SDOUT DD2 PDD3
DD3 T1
AE10 V4 PDD4
HDA_DOCK_EN#/GPIO33 DD4 PDD5
AG14 HDA_DOCK_RST#/GPIO34 DD5 T5
T114 AB2 PDD6
SATA_LED# DD6 PDD7
33 SATA_LED# AF10 SATALED# DD7 T6
T3 PDD8
DD8 PDD9
33 SATA_RXN0 AF6 SATA0RXN DD9 R2
AF5 T4 PDD10
33 SATA_RXP0 SATA0RXP DD10
CKL:1n ~ 20nF C551 3900P/25V SATA_TXN0_C AH5 V6 PDD11
33 SATA_TXN0 SATA0TXN DD11
C552 3900P/25V SATA_TXP0_C AH6 V5 PDD12
33 SATA_TXP0 SATA0TXP DD12
U1 PDD13
SATA_RXN2_C DD13 PDD14
AG3 V2
T98 SATA_RXP2_C AG4
SATA1RXN
SATA1RXP
DD14
DD15 U6 PDD15 HD Audio to Codec and Modem
IDE
CKL:1n ~ 20nF T99 SATA_TXN2_C AJ4 SATA1TXN PDA[2:0] 33
T196 SATA_TXP2_C AJ3 AA4 PDA0
T195 SATA1TXP DA0 PDA1
DA1 AA1
SATA
AF2 AB3 PDA2 ACZ_SDOUT R332 33
SATA2RXN DA2 ACZ_SDOUT0 34
T191 AF1
T190 SATA2RXP R335 33
AE4 SATA2TXN DCS1# Y6 PDCS1# 33 ACZ_SDOUT1 34
T97 AE3 Y5
SATA2TXP DCS3# PDCS3# 33
T95
AB7 W4 C797 C795
2 CLK_PCIE_SATA# SATA_CLKN DIOR# PDIOR# 33
AC6 W3 *10P/50V *10P/50V
2 CLK_PCIE_SATA SATA_CLKP DIOW# PDIOW# 33
DDACK# Y2 PDDACK# 33
AG1 Y3 IRQ14
SATARBIAS# IDEIRQ IRQ14 33
R325 24.9/F SATA_BIAS AG2 Y1 PD IORDY
SATARBIAS IORDY PIORDY 33
Place within DDREQ W5 PDDREQ 33
500 mils of 25mils/15mils
ICH8M REV 1.0
ICH7
B ACZ_S YNC R364 33 B
ACZ_SYNC0 34
R361 33
ACZ_SYNC1 34
C806 C807
*10P/50V *10P/50V
SB Strap
XOR Chain Entrance Strap ACZ_BCLK R355 33
BIT_CLK0 34
ICH8-M Internal VR Enable
R350 33
strap BIT_CLK1 34
ICH_RSV0 HDA_SDOUT Description C571
(Internal VR for ICH8-M LAN100_SLP Strap
*10P/50V
Vccsus1_05,VccSus1_5 and (Internal VR for VccLAN1_05 and 0 0 RSVD C802 C804
VccCL1_5) VccCL1.05) *10P/50V *10P/50V
Low = Internal VR disable 0 1 Enter XOR Chain

Low = Internal VR disable LAN100_SLP High = Internal VR
INTVRMEN High = Internal VR enable(Default)
enable(Default) 1 0 Normal opration(Default)
ACZ_RST# R338 33
ACZ_RST#0 34
1 1 Set PCIE port config bit 1
R342 33
ACZ_RST#1 34
VCCRTC VCCRTC VCC3
C800 C799
*10P/50V *10P/50V
A A
R572 R571 R562

332K/F 332K/F *1K
ICH_INTVRMEN LAN100_SLP ACZ_SDOUT

ICH_TP3 22
R399 R379 PROJECT : CH3

*0 *0
R385 Quanta Computer Inc.
*1K
ICH8M 1A

5 4 3 2 1
5 4 3 2 1
VCC3
MINI CARD PCI-E

31
31
31
PCIE_RXN0
PCIE_RXP0
PCIE_TXN0
C871
C870
.1U/10V PCIE_TXN0_C
.1U/10V PCIE_TXP0_C
P27
P26
N29
N28
U33D
PERN1
PERP1
PETN1
DMI0RXN
DMI0RXP
DMI0TXN
V27
V26
U29
U28
DMI_RXN0
DMI_RXP0
DMI_TXN0
6
6
6
STOP#
REQ2#
FRAME#
6
7
8
RP54
5
4
3
REQ3#
INTD#
21
Direct Media Interface

31 PCIE_TXP0 PETP1 DMI0TXP DMI_TXP0 6
REQ1# 9 2 DEVSEL#
M27 Y27 VCC3 10 1 TR DY#
28 PCIE_RXN1 PERN2 DMI1RXN DMI_RXN1 6
28 PCIE_RXP1 M26 PERP2 DMI1RXP Y26 DMI_RXP1 6
C869 .1U/10V PCIE_TXN1_C 8.2KX8
EXPRESS CARD(NEW CARD) 28 PCIE_TXN1
C868 .1U/10V PCIE_TXP1_C
L29
L28
PETN2 DMI1TXN W29
W28
DMI_TXN1 6
VCC3
RP52
PCI-Express
T148 K27 AB26
PERN3 DMI2RXN DMI_RXN2 6
T147 K26 AB25 SERR# 6 5
D PERP3 DMI2RXP DMI_RXP2 6 D
T213 J29 AA29 IRD Y# 7 4
PETN3 DMI2TXN DMI_TXN2 6
T150 J28 AA28 PERR# 8 3 REQ0#
PETP3 DMI2TXP DMI_TXP2 6
LOCK# 9 2 INTG#
PCIE_RXN3 H27 AD27 VCC3 10 1 INTF#
31 PCIE_RXN3 PERN4 DMI3RXN DMI_RXN3 6
PCIE_RXP3 H26 AD26 VCC1.5
31 PCIE_RXP3 PERP4 DMI3RXP DMI_RXP3 6
PCIE_TXN3 C867 .1U/10VPCIE_TXN3_C 8.2KX8
ROBSON 31 PCIE_TXN3
PCIE_TXP3 C866 .1U/10VPCIE_TXP3_C
G29
G28
PETN4 DMI3TXN AC29
AC28
DMI_TXN3 6
VCC3
RP51
T149 PCIE_RXN4 F27 T26 Place within 500
PERN5 DMI_CLKN CLK_PCIE_ICH# 2
T146 PCIE_RXP4 F26 T25 R388 mils of ICH8 INTA# 6 5
PERP5 DMI_CLKP CLK_PCIE_ICH 2
T214 PCIE_TXN4 E29 24.9/F 7 4 INTE#
T212 PCIE_TXP4 PETN5 INTC#
E28 PETP5 DMI_ZCOMP Y23 5/15mils 8 3
Y24 DMI_IRCOMP_R 0.1U C592 9 2 INTB#
DMI_IRCOMP INTH#
32 PCIE_RXN2_LAN D27 PERN6/GLAN_RXN VCC3 10 1
32 PCIE_RXP2_LAN D26 PERP6/GLAN_RXP USBP0N G3 USBP0- 29
C878 .1U/10V PCIE_TXN2_C USB Connector 8.2KX8
PCIE-LAN 32 PCIE_TXN2_LAN
C865 .1U/10V PCIE_TXP2_C
C29
C28
PETN6/GLAN_TXN USBP0P G2
H5
USBP0+ 29
32 PCIE_TXP2_LAN PETP6/GLAN_TXP USBP1N USBP1- 29
USBP1P H4 USBP1+ 29 USB Connector
T143 C23 H2
SPI_CLK USBP2N USBP2- 29
T139 B23 H1 USB Connector
SPI_CS0# USBP2P USBP2+ 29 RP53
T145 SPI_CS1# E22 J3
SPI_CS1# USBP3N USBP3- 29
SPI
J2 USB Connector USBOC#2 6 5
USBP3P USBP3+ 29
T144 D23 K5 USBOC#4 7 4 USBOC#1
SPI_MOSI USBP4N USBP4- 30
F21 K4 BLUETOOTH USBOC#6 8 3 USBOC#7
SPI_MISO USBP4P USBP4+ 30
T142 K2 USBOC#3 9 2 USBOC#0
USBP5N USBP5- 31
USBOC#0 AJ19 K1 3VSUS 10 1 USBOC#5
29 USBOC0# OC0# USBP5P USBP5+ 31
USBOC#1 AG16 L3
29 USBOC1# OC1#/GPIO40 USBP6N USBP6- 25
USBOC#2 Carama USB
29 USBOC2#
USBOC#3
AG15
AE15
OC2#/GPIO41 USB USBP6P L2
M5
USBP6+ 25 10P8R-10K
29 USBOC3# OC3#/GPIO42 USBP7N USBP7- 31
C T117 USBOC#4 AF15 M4 WLAN C
OC4#/GPIO43 USBP7P USBP7+ 31
T121 USBOC#5 AG17 M2 USBOC#8 R360 10K 3VSUS
OC5#/GPIO29 USBP8N USBP8- 31
T108 USBOC#6 AD12 M1 CIR
OC6#/GPIO30 USBP8P USBP8+ 31
T202 USBOC#7 AJ18 N3 USBOC#9 R373 10K 3VSUS
OC7#/GPIO31 USBP9N USBP9- 28
T116 USBOC#8 AD14 N2 NEW CARD
OC8# USBP9P USBP9+ 28
T216 USBOC#9 AH18 OC9#
USBRBIAS# F2
F3 USB_RBIAS_PN CHECK LIST suggest pull up 10k
USBRBIAS
ICH8M REV 1.0 5/5mils
Place within 500 R328 A16 SWAP Override strap
mils of ICH8 22.6/F
For Intel check list PCI_GNT#3 Low = A16 swap override enabled
High = Default
GNT3# R359 *1K

U33B
26 AD[0..31]
AD0 D20 A4 REQ0#
AD0 REQ0# REQ0# 26
AD1 GNT0# ICH8 Boot BIOS select
AD2
E19
D19
AD1 PCI GNT0# D7
E18 REQ1#
GNT0# 26
AD3 AD2 REQ1#/GPIO50 GNT1# T128
A20 AD3 GNT1#/GPIO51 C18
AD4 D17 B19 REQ2# T123 PCI_GNT#0 SPI_CS#1 Boot BIOS Location
AD5 AD4 REQ2#/GPIO52 GNT2# T124
A21 AD5 GNT2#/GPIO53 F18
AD6 A19 A11 REQ3# T199
AD7 AD6 REQ3#/GPIO54 GNT3# T107 0 1 SPI
C19 AD7 GNT3#/GPIO55 C10
AD8 A18
AD9 AD8
B
B16 AD9 C/BE0# C17 C/BE0# 26 B
AD10 A12 E15 1 0 PCI
AD10 C/BE1# C/BE1# 26
AD11 E16 F16
AD11 C/BE2# C/BE2# 26
AD12 A14 E17
AD12 C/BE3# C/BE3# 26
AD13 G16 1 1 LPC(Default)
AD14 AD13 IRD Y# Update Nicole 9/25
A15 AD14 IRDY# C8 IRDY# 26
AD15 B6 D9
AD15 PAR PAR 26
AD16 C11 G6 SPI_CS1# R389 *1K
AD16 PCIRST# PCIRST# 26
AD17 A9 D16 DEVSEL#
AD17 DEVSEL# DEVSEL# 26
AD18 D11 A7 PERR# GNT0# R337 *1K
AD18 PERR# PERR# 26
AD19 B12 B7 LOCK#
AD20 AD19 PLOCK# SERR#
C12 AD20 SERR# F10 SERR# 26
AD21 D10 C16 STOP#
AD21 STOP# STOP# 26
AD22 C7 C9 TR DY#
AD22 TRDY# TRDY# 26
AD23 F13 A17 FRAME#
AD23 FRAME# FRAME# 26
AD24 E11
AD25 AD24 PLT_RST-R#
E13 AD25 PLTRST# AG24 PLT_RST-R# 6,14
AD26 E12 B10 PCLK_ICH
AD26 PCICLK PCLK_ICH 2
AD27 D8 G7 VCC3
AD27 PME# PCI_PME# 26
AD28 A6
AD29 AD28
E8 AD29
AD30 D6
AD31 AD30
A3 AD31 C810
INTA# F9
Interrupt I/F F8 INTE# 0.1U/16V
26 INTA# PIRQA# PIRQE#/GPIO2 INTE# 26
INTB# B5 G11 INTF# U34
26 INTB# PIRQB# PIRQF#/GPIO3
5
INTC# C5 F12 INTG# T111

INTD# PIRQC# PIRQG#/GPIO4 INTH# T194 PLT_RST-R#
A10 PIRQD# PIRQH#/GPIO5 B3 2
4 PLTRST# 22,28,31,32,33
A ICH8M REV 1.0 1 A
TC7SH08FU Don't connect to PCI device / Express card

3
PROJECT : CH3
PCLK_ICH R353 *0 C570 *33P/50V Quanta Computer Inc.
for EMI request Size Document Number R ev
ICH8M 1A

5 4 3 2 1
5 4 3 2 1
RVCC3 VCC3
37 VR_PWRGD_CK410#
1
2
U35
5
VCC3
C809 .1U/16V PCLK_SMB

PDAT_SMB
R378
R412
2.2K
2.2K
RVCC3
SMB_LINK_ALERT# R334 10K

RVCC3
R I#
DNBSWON#
SYS_RST#
SMB_ALERT#
KBSMI#_R
R375
R536
R362
R331
R558
8.2K
10K
10K
10K
10K
CLKRUN#
SERIRQ
SCI#_R
PM_RSMRST#_R
R345
R352
R339
R590
8.2K
8.2K
10K
10K
22
3 4 VR_PWRGD_CK410 PCIE_WAKE# R368 1K SMLINK0 R371 10K
PM_BATLOW# R384 8.2K SMLINK1 R381 10K
NL17SZ14DFT2G R376
100K/F_4
D these pin if unused require 8.2k to D

10k pull-up to +3v
U33C
PCLK_SMB AJ26 AJ12 BOARD_ID1
2,13,28,31 PCLK_SMB SMBCLK SATA0GP/GPIO21
PDAT_SMB AD19 AJ10 BOARD_ID0
2,13,28,31 PDAT_SMB SMBDATA SATA1GP/GPIO19
SMB_LINK_ALERT# AG21 AF11 R557 8.2K VCC3
GPIO
SATA
T134 LINKALERT# SATA2GP/GPIO36
SMB
SMLINK0 AC17 AG11 R555 8.2K VCC3
T120 SMLINK1 SMLINK0 SATA3GP/GPIO37
T126 AE19 SMLINK1
AG9 14M_ICH
CLK14 14M_ICH 2
R I# AF17 G5 CLKUSB_48
Clocks
26 RI# RI# CLK48 CLKUSB_48 2
26 LPC_PD# F4 SUS_STAT#/LPCPD# SUSCLK D3

SYS_RST# AD15 T96
SYS_RESET# R569 100/F
SLP_S3# AG23 SUSB# 36
R358 0 AG12 AF21 R377 100/F
6 PM_BMBUSY# BMBUSY#/GPIO0 SLP_S4# SUSC# 36
SLP_S5# AD18
SMB_ALERT# AG22 T122
T135 SMBALERT#/GPIO11
S4_STATE#/GPIO26 AH27 check list -- 100k
GPIO
R566 0/F PM_STPPCI_ICH# AE20 T211 pull-down to gnd PLTRST_LAN# R380 0
2 PM_STPPCI# STP_PCI#/GPIO15
SYS
R563 0/F PM_STPCPU_ICH# AG18 AE23 PWROK R366 *100K
2 PM_STPCPU# STP_CPU#/GPIO25 PWROK
CLKRUN# AH11 AJ14 DPRSLPVR-ICH R369 100/F DPRSLPVR
26,36 CLKRUN# CLKRUN#/GPIO32 DPRSLPVR/GPIO16 DPRSLPVR 6,37
Power MGT
close to ICH PCIE_WAKE# AE17 AE21 PM_BATLOW#
28,31,32 PCIE_WAKE# WAKE# BATLOW# PM_BATLOW# 36
SERIRQ AF12
26,36 SERIRQ SERIRQ
AC13 C2 DNBSWON#
THRM# PWRBTN# DNBSWON# 36
15,30 THERM_ALERT# 1 2
C R561 0 VR_PWRGD_CK410 AJ20 AH20 PLTRST_LAN# R70 *0 C
VRMPWRGD LAN_RST# PLTRST# 21,28,31,32,33
VCC3 R559 8.2K
AJ22 AG27 PM_RSMRST#_R R589 100/F RSMRST#
T205 TP7 RSMRST# RSMRST# 36
T197 AJ8 TACH1/GPIO1 CK_PWRGD E1 CK_PWG 2

KBSMI# 1 2 KBSMI#_R AJ9
36 KBSMI# TACH2/GPIO6
SCI# BAS316
1 D202 SCI#_R AH9 E3 R330 0
36 SCI# TACH3/GPIO7 CLPWROK ECPWROK 6,17,36
BAS316 D19 AE16 GPIO8 SUSM# RVCC3 VCC3
AC19 GPIO12 SLP_M# AJ25
AG8 T208
T102 TACH0/GPIO17
T200 AH12 GPIO18 CL_CLK0 F23 CL_CLK0 6
AE11 GPIO20 CL_CLK1 AE18
Controller Link
GPIO
AG10 T125
T105 SCLOCK/GPIO22
AH25 F22 R370 R393
T209 QRT_STATE0/GPIO27 CL_DATA0 CL_DATA0 6
AD16 AF19 3.24K/F 3.24K/F
T115 QRT_STATE1/GPIO28 CL_DATA1
AG13 T129
T112 SATACLKREQ#/GPIO35
AF9 D24 CL_VREF0_SB
T103 SLOAD/GPIO38 CL_VREF0
AJ11 AH23 CL_VREF1_SB
T198 SDATAOUT0/GPIO39 CL_VREF1
T106 AD10 SDATAOUT1/GPIO48
CL_RST# AJ23 CL_RST#0 6
AD9 C591
34 ACZ_SPKR SPKR
AJ27 C581 R391
MEM_LED/GPIO24
MISC
MCH_ICH_SYNC#_R AJ13 AJ24 T210 R372 453/F .1U/10V
6 MCH_ICH_SYNC# MCH_SYNC# ME_EC_ALERT/GPIO10
AF22 T206 453/F .1U/10V
EC_ME_ALERT/GPIO14 T141
20 ICH_TP3 AJ21 TP3 WOL_EN/GPIO9 AG19
ICH8M REV 1.0 R401

100K Controller Link 0
B
Controller Link 1 VREF for IAMT B
3VSUS
VREF for IAMT support only
CRB STUFF support only
No Reboot strap 2K%1 C882 .047U/10V
Low = Default VCC3 R617 2K/F

HDA_SPKR High = No
5
Reboot U43
37 DELAY_VR_PWRGOOD 2
4 PWROK
PWROK 6
6,17,36 ECPWROK 1
VCC3
TC7SH08FU R618
3
R418 100K
ACZ_SPKR R348 10K 10K
VCC3 VCC3
R553 R346
Board ID ID0 ID1
*10K 10K
PM+NB8M 0 0
A A
BOARD_ID0 BOARD_ID1
PM+NB8P 0 1
R354
R548
10K
*10K
PROJECT : CH3
ICH8M 1A

5 4 3 2 1
5 4 3 2 1
3VPCU VCC3
VCCRTC
C607 C603 C597 VCCP
23
2
D26 D28
1U .1U/10V .1U/10V U33F 1.13A
AD25 A13 +1.05V_SB R567 0
PDZ5.6B PDZ5.6B VCCRTC VCC1_05[01]
VCC1_05[02] B13
A16 C13
1
U33E R533 10 VCC5 R570 100/F +5VREF_SB V5REF[1] VCC1_05[03] C573 C572
5VPCU T7 V5REF[2] VCC1_05[04] C14
A23 VSS[001] VSS[099] K7 VCC1_05[05] D14
A5 L1 C553 C815 +5VREF_SUS_SB G4 E14 .047U/10V .022U
VSS[002] VSS[100] V5REF_SUS VCC1_05[06]
AA2 VSS[003] VSS[101] L13 VCC1_05[07] F14
AA7 L15 .1U/10V .1U/10V AA25 G14
VSS[004] VSS[102] VCC1_5_B[01] VCC1_05[08]
A25 VSS[005] VSS[103] L26 AA26 VCC1_5_B[02] VCC1_05[09] L11
AB1 L27 AA27 L12 VCC1.5
VSS[006] VSS[104] VCC1_5_B[03] VCC1_05[10]
D AB24 VSS[007] VSS[105] L4 AB27 VCC1_5_B[04] VCC1_05[11] L14 D
AC11 L5 AB28 L16 VCCDMIPLL_ICH L48 1UH R409 1
VSS[008] VSS[106] +1.5V_PCIE VCC1_5_B[05] VCC1_05[12]
AC14 VSS[009] VSS[107] M12 AB29 VCC1_5_B[06] VCC1_05[13] L17
AC25 VSS[010] VSS[108] M13 D28 VCC1_5_B[07] VCC1_05[14] L18
AC26 M14 L43 40 mils(657mA) D29 M11 C872 C608
VSS[011] VSS[109] VCC1_5_B[08] VCC1_05[15]
CORE
AC27 VSS[012] VSS[110] M15 VCC1.5 E25 VCC1_5_B[09] VCC1_05[16] M18
AD17 M16 E26 P11 .01U 10U
VSS[013] VSS[111] BLM21PG220SN1D VCC1_5_B[10] VCC1_05[17]
AD20 VSS[014] VSS[112] M17 E27 VCC1_5_B[11] VCC1_05[18] P18
AD28 M23 + C879 C877 C593 C875 F24 T11
VSS[015] VSS[113] VCC1_5_B[12] VCC1_05[19] VCC1.25
AD29 VSS[016] VSS[114] M28 F25 VCC1_5_B[13] VCC1_05[20] T18
AD3 M29 220U 22U/6.3V 22U/6.3V 2.2U G24 U11
VSS[017] VSS[115] VCC1_5_B[14] VCC1_05[21]
AD4 VSS[018] VSS[116] M3 H23 VCC1_5_B[15] VCC1_05[22] U18
AD6 N1 VCC1.5 H24 V11 +1.25V_DMI R416 0 VCCP
VSS[019] VSS[117] VCC1_5_B[16] VCC1_05[23]
AE1 VSS[020] VSS[118] N11 J23 VCC1_5_B[17] VCC1_05[24] V12
AE12 VSS[021] VSS[119] N12 J24 VCC1_5_B[18] VCC1_05[25] V14
AE2 N13 K24 V16 C625 R410 0
VSS[022] VSS[120] VCC1_5_B[19] VCC1_05[26]
AE22 VSS[023] VSS[121] N14 60 mils(1.56A) K25 VCC1_5_B[20] VCC1_05[27] V17
AD1 N15 L23 V18 22U/6.3V
VSS[024] VSS[122] VCC1_5_B[21] VCC1_05[28]
AE25 VSS[025] VSS[123] N16 100mA L24 VCC1_5_B[22]
C595 C618 C619
VCCA3GP
AE5 N17 R535 0 +1.5V_SATA L41 10UH L25 R29
VSS[026] VSS[124] VCC1_5_B[23] VCCDMIPLL .1U/10V .1U/10V 4.7U/6.3V
AE6 VSS[027] VSS[125] N18 M24 VCC1_5_B[24]
AE9 N26 C796 C794 M25 AE28
VSS[028] VSS[126] VCC1_5_B[25] VCC_DMI[1] +1.05V_V_CPU_IO
AF14 VSS[029] VSS[127] N27 N23 VCC1_5_B[26] VCC_DMI[2] AE29
AF16 N4 10U 1U/16V N24 VCC3
VSS[030] VSS[128] VCC1_5_B[27]
AF18 VSS[031] VSS[129] N5 N25 VCC1_5_B[28] V_CPU_IO[1] AC23
AF3 VSS[032] VSS[130] N6 P24 VCC1_5_B[29] V_CPU_IO[2] AC24
AF4 VSS[033] VSS[131] P12 P25 VCC1_5_B[30] +V3.3_DMI_ICH
20 mils(278mA) R347 0
AG5 VSS[034] VSS[132] P13 R24 VCC1_5_B[31] VCC3_3[01] AF29
AG6 VSS[035] VSS[133] P14 R25 VCC1_5_B[32]
AH10 VSS[036] VSS[134] P15 R26 VCC1_5_B[33] VCC3_3[02] AD2
AH13 VSS[037] VSS[135] P16 R27 VCC1_5_B[34]
AH16 VSS[038] VSS[136] P17 T23 VCC1_5_B[35] VCC3_3[03] AC8
AH19 P23 T24 AD8
VCCP_CORE
VSS[039] VSS[137] VCC1_5_B[36] VCC3_3[04] C562 C557
AH2 VSS[040] VSS[138] P28 T27 VCC1_5_B[37] VCC3_3[05] AE8
C
AF28 VSS[041] VSS[139] P29 T28 VCC1_5_B[38] VCC3_3[06] AF8 C
AH22 R11 T29 .1U/10V .1U/10V
VSS[042] VSS[140] C785 VCC1_5_B[39]
AH24 VSS[043] VSS[141] R12 U24 VCC1_5_B[40] VCC3_3[07] AA3
AH26 VSS[044] VSS[142] R13 U25 VCC1_5_B[41] VCC3_3[08] U7
AH3 R14 1U/16V V23 V7 C566
VSS[045] VSS[143] VCC1_5_B[42] VCC3_3[09]
AH4 VSS[046] VSS[144] R15 V24 VCC1_5_B[43] VCC3_3[10] W1
AH8 R16 V25 W6 .1U/10V
IDE
VSS[047] VSS[145] VCC1_5_B[44] VCC3_3[11]
AJ5 VSS[048] VSS[146] R17 W25 VCC1_5_B[45] VCC3_3[12] W7
B11 VSS[049] VSS[147] R18 Y25 VCC1_5_B[46] VCC3_3[13] Y7
B14 VSS[050] VSS[148] R28
B17 VSS[051] VSS[149] R4 AJ6 VCCSATAPLL VCC3_3[14] A8
B2 VSS[052] VSS[150] T12 VCC3_3[15] B15
B20 VSS[053] VSS[151] T13 AE7 VCC1_5_A[01] VCC3_3[16] B18
B22 T14 C789 AF7 B4
VSS[054] VSS[152] VCC1_5_A[02] VCC3_3[17]
ARX
B8 VSS[055] VSS[153] T15 AG7 VCC1_5_A[03] VCC3_3[18] B9
C24 T16 1U/16V AH7 C15 C555 C550 C556
VSS[056] VSS[154] VCC1_5_A[04] VCC3_3[19]
C26 T17 AJ7 D13
PCI
VSS[057] VSS[155] VCC1_5_A[05] VCC3_3[20] .1U/10V .1U/10V .1U/10V
C27 VSS[058] VSS[156] T2 VCC3_3[21] D5
C6 VSS[059] VSS[157] U12 AC1 VCC1_5_A[06] VCC3_3[22] E10
D12 VSS[060] VSS[158] U13 AC2 VCC1_5_A[07] VCC3_3[23] E7
ATX
D15 VSS[061] VSS[159] U14 AC3 VCC1_5_A[08] VCC3_3[24] F11
D18 VSS[062] VSS[160] U15 AC4 VCC1_5_A[09]
D2 U16 AC5 AC12 +3V_1.5V_HDA_IO_ICH 32mA R356 0 VCC3
VSS[063] VSS[161] VCC1_5_A[10] VCCHDA
D4 VSS[064] VSS[162] U17
E21 U23 AC10 AD11 +VCCSUSHDA 32mA R341 0 RVCC3 C568
VSS[065] VSS[163] VCC1_5_A[11] VCCSUSHDA
E24 VSS[066] VSS[164] U26 AC9 VCC1_5_A[12]
E4 U27 J6 TP_VCCSUS1_05_ICH_1 C559 Can be connect to .1U/10V
VSS[067] VSS[165] VCCSUS1_05[1] TP_VCCSUS1_05_ICH_2 +3V_S5 or
E9 VSS[068] VSS[166] U3 AA5 VCC1_5_A[13] VCCSUS1_05[2] AF20
F15 U5 AA6 0.1U/16V +1.5V_S5 Can be connect to
VSS[069] VSS[167] VCC1_5_A[14] TP_VCCSUS1_5_ICH_1 VCC3 or VCC1.5
E23 VSS[070] VSS[168] V13 VCCSUS1_5[1] AC16
F28 VSS[071] VSS[169] V15 G12 VCC1_5_A[15]
F29 V28 C793 G17 J7 TP_VCCSUS1_5_ICH_2 RVCC3
VSS[072] VSS[170] VCC1_5_A[16] VCCSUS1_5[2]
F7 VSS[073] VSS[171] V29 H7 VCC1_5_A[17]
G1 W2 .1U/10V C3 +V3.3A_ICH 20 mils(177mA) R351 0
VSS[074] VSS[172] VCCSUS3_3[01]
E2 VSS[075] VSS[173] W26 AC7 VCC1_5_A[18]
B G10 VSS[076] VSS[174] W27 AD7 VCC1_5_A[19] VCCSUS3_3[02] AC18 B
G13 Y28 AC21 C558 C554
VSS[077] VSS[175] VCCSUS3_3[03]
G19 Y29 D1 AC22
VCCPSUS
VSS[078] VSS[176] VCCUSBPLL VCCSUS3_3[04] .1U/10V .022U
G23 VSS[079] VSS[177] Y4 VCCSUS3_3[05] AG20
G25 VSS[080] VSS[178] AB4 F1 VCC1_5_A[20] VCCSUS3_3[06] AH28
USB CORE
G26 VSS[081] VSS[179] AB23 L6 VCC1_5_A[21]
G27 AB5 C792 L7 P6
H25 VSS[083] VSS[181] AB6 M6 VCC1_5_A[23] VCCSUS3_3[08] P7
H28 AD5 .1U/10V M7 C1
H29 VSS[085] VSS[183] U4 VCCSUS3_3[10] N7
H3 VSS[086] VSS[184] W24 W23 VCC1_5_A[25] VCCSUS3_3[11] P1
H6 P2 C564
VSS[087] TP_VCCLAN1_05_ICH_1 VCCSUS3_3[12]
J1 A1 F17 P3
VCCPUSB
VSS[088] VSS_NCTF[01] TP_VCCLAN1_05_ICH_2 VCCLAN1_05[1] VCCSUS3_3[13] 4.7U/6.3V
J25 VSS[089] VSS_NCTF[02] A2 G18 VCCLAN1_05[2] VCCSUS3_3[14] P4
J26 A28 P5 TP_VCCLAN1_05_ICH_1 C578 0.1U/16V
VSS[090] VSS_NCTF[03] VCC3 R382 0 +3V_VCCLAN VCCSUS3_3[15] TP_VCCLAN1_05_ICH_2 C582 0.1U/16V
J27 VSS[091] VSS_NCTF[04] A29 F19 VCCLAN3_3[1] VCCSUS3_3[16] R1
J4 VSS[092] VSS_NCTF[05] AH1 G20 VCCLAN3_3[2] VCCSUS3_3[17] R3
J5 AH29 C583 R5 TP_VCCSUS1_05_ICH_1 C565 0.1U/16V
VSS[093] VSS_NCTF[06] +1.5V_VCCGLANPLL VCCSUS3_3[18] TP_VCCSUS1_05_ICH_2 C586 0.1U/16V
K23 VSS[094] VSS_NCTF[07] AJ1 A24 VCCGLANPLL VCCSUS3_3[19] R6
K28 AJ2 .1U/10V
VSS[095] VSS_NCTF[08]
GLAN POWER
K29 AJ28 A26 G22 TP_VCCCL1_05_ICH TP_VCCSUS1_5_ICH_1 T101
VSS[096] VSS_NCTF[09] VCCGLAN1_5[1] VCCCL1_05 TP_VCCSUS1_5_ICH_2 T118
K3 VSS[097] VSS_NCTF[10] AJ29 A27 VCCGLAN1_5[2]
K6 B1 B26 A22 VCCCL1_5_INT_ICH TP_VCCCL1_05_ICH T136
VSS[098] VSS_NCTF[11] R587 1 L63 1UH VCCGLAN1_5[3] VCCCL1_5
VSS_NCTF[12] B29 VCC1.5 B27 VCCGLAN1_5[4]
B28 F20 +V3.3M_ICH C587 C584
ICH8M REV 1.0 C843 C836 VCCGLAN1_5[5] VCCCL3_3[1]
VCCCL3_3[2] G21
B25 1U/16V .1U
10U 2.2U VCCGLAN3_3
ICH8M REV 1.0
80mA
+1.5V_PCIE R386 0 VCC3
C874
VCC3 R591 0 +3V_GLAN
A A
4.7U/6.3V
PROJECT : CH3
ICH8M 1A

5 4 3 2 1
5 4 3 2 1
36 CAPSLED# 1
LED5
LTST-C191TBKT-Q1
2 R427 150
VCC3
3VPCU
SW3
24
4
5
MISAKI_SWITCH SW2
R531 100K 3 2 3 NBSWON#
4
5
3 NBSWON# 36
WR/BT_SW# 2 4 1
LED6 36 WR/BT_SW# 2
1 1 5
7
6
1 2 R426 150 6 C16
36 NUMLED# VCC3
*.1U-10V_4
7
6
LTST-C191TBKT-Q1 C780
D D
*.1U-16V_4
LED2
3 1 R643 150
31 WLAN_LED# VCC3
4 2 R423 150
30 BT_LED#
LED_BL/ORG
VCC3
LED3
R624 *10K_4 WR/BT_SW VCC3 MISAKI_SWITCH SW4
R424 150 CN2 MAIL#
36 PWRLED# 3 1 2 3
R625 *10K_4 MAIL# 14 4 1
R644 150 14
36 SUSLED# 4 2 3VPCU 36 MAIL# 13 13 5
R626 *10K_4 INTERNET# 12 6 C892
36 INTERNET# 12
LED_BL/ORG 11 *.1U-10V_4
36 ECO# 11
R627 *10K_4 ECO# 10
36 SKYPE# 10
36 L-MAIL# 9 9
R628 *10K_4 SKYPE# 8
36 L-INTERNET# 8
36 L1-ECO# 7 7
LED7 MISAKI_SWITCH SW5
36 L2-ECO# 6 6
1 2 R428 150 5 2 3 INTERNET#
33 ODD_LED# VCC3 36 L1-SKYPE# 5
36 L2-SKYPE# 4 4 4 1
LTST-C191TBKT-Q1 3 5
3 C893
2 2 6
1 *.1U-10V_4
1
C C
LED4
3 1 R645 150 SW4, SW5 not stuff in NEC control in BOM NIcole 11/08
36 BATLED0# 3VPCU
4 2 R425 150
36 BATLED1#
for BenQ SW4 used as SRS function, SW5 used as Snapshort. need EC code. from SG
LED_BL/ORG
LED1
VCC3 VCC3 VCC3 CRT_VCC
PWRLED# 3 1 R10 150
3VPCU
DKZ00TFU101
D1
1
SUSLED# 4 2 R646 150 F1
D4 D3 D2 1 2 1 2 VCC5
LED_BL/ORG 3 DA204U 3 DA204U 3 DA204U
POLY_SWITCH RC1206
CH501H
pin1,3 Blue
C14
pin2,4 ORG
2
0.1U
D24
16
CN12 1 2 R434 0 CRT_SENSE# 36
1
6 MEW355
CRT_R L6 BK1608HS470 CRT_R1 1 11
6,16 CRT_R *MEW355
7
CRT_G L5 BK1608HS470 CRT_G1 2 12 CRT_DDCDATA D25
6,16 CRT_G
8
2
B B
CRT_B L4 BK1608HS470 CRT_B1 3 13 HSYNC1
6,16 CRT_B
9
C23 C21 C18 4 14 VSYNC1
R11 R9 10
R12 C20 C22 C24 5 15 CRT_DDCCLK
150/F 150/F
150/F 5.6P 5.6P 5.6P 5.6P 5.6P 5.6P
CRT_CONN
17
VCC3 VCC5
VCC5 R433 R432

2.2K 2.2K
2
Q18
CRTDAT 1 3 CRT_DDCDATA
6,16 CRTDAT
2N7002E-LF
5
C8 .1U/10V
U1 VCC3
VCC5
2 4 VSYNC1
6,16 VSYNC_COM
A A
AHCT1G125DCH R4
2.2K R429
2.2K
5
Q2
U2 AHCT1G125DCH
CRTCLK 1 3 CRT_DDCCLK PROJECT : CH3
6,16 CRTCLK
2 4 HSYNC1
6,16 HSYNC_COM
2N7002E-LF Quanta Computer Inc.
CRT/LED/SW 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
PANEL VCC CONTROL

VCC3
LID
SW6
470 R641
LCD CONNECTOR 25
LCDVCC 2 1
GND VCC 3VPCU LCDVCC
C632 Q29
LID# 3
36 LID# OUT VCC3
5 1 C11 CN1
IN OUT C1 C9
G_0
MRSS23W 0.1U
0.1U 4 IN 1
A C19 0.1U add for NEC nicole 12/14 R5 2.2K .1U A
2
6,17 DIGON 3 ON/OFF GND 2 change for pin definition wrong 01/05 3
.1U VCC3 R3 2.2K
C897 4
R8 G5241T1U 5
6,16,17 EDIDCLK 6
100K/F *4.7u/10V
6,16,17 EDIDDATA 7
16 TXLOUT0- 8
16 TXLOUT0+ 9
10 G_1
Add C897 for LCDVCC and LCD Data sequence request 16 TXLOUT1- 11
R487 and R263 shoud change to 5.6K nicole 12/11 16 TXLOUT1+ 12
13
16 TXLOUT2- 14
16 TXLOUT2+ 15
16
16 TXLCLKOUT- 17
16 TXLCLKOUT+ 18 G_2
19
LP13 20
DSC_5V 21
21 USBP6- 1 2 22
21 USBP6+ 4 3 23
DISPON
*WCM2012-90 24 G_3
BACKLIGHT CONTROL VIN 2

L2
1
ACB2012L-120
VADJ-1 25
26
27
C17 .1U C7 C4 C5 28
VCC3 29
C2
16 TXLOUT4- 30
10U/25V/X5R 10U/25V/X5R
.1U 16 TXLOUT4+ 31 G_4
5
B .1U B
32
36 LCD_ON 2 16 TXLOUT5- 33
4 DISPON
16 TXLOUT5+ 34
6,17 BLON 1 35
U3
16 TXLOUT6- 36
TC7SH08FU
16 TXLOUT6+
3
C15 37
L3 0 38
R7 EMI 16 TXLCLK1UT-
0.1U VADJ-1 39
100K 16 TXLCLK1UT+ 40
G_5
36 VADJ
C12 Add B channel LVDS signals

EMI 0.1U GS12401-1011-9F
12/12
HDMI PORT VCC3 VCC5 VCC5

DSC_5V
R29 *E@0 R1 *0
L1
LP9 E@CMM21T-900M-N R6 R2 BK2125HS330_8
16 EX_TX2_HDMI+ EX_TX2_HDMI+ 4 3 1 3
16 EX_TX2_HDMI- EX_TX2_HDMI- 1 2 10K/F_4 10K/F_4
C AO3403 C
R21 *E@0 Q1
2
C3 C10
2
10U/10V/X5R_8 1U/10V_4
R20 *E@0 LAYOUT must support
1 3
LP10 E@CMM21T-900M-N connectors from JAE, 36 DSC_POWERON#
EX_TX1_HDMI+ Q3
16 EX_TX1_HDMI+
EX_TX1_HDMI-
1 2 Molex and Acon. MMBT3904
16 EX_TX1_HDMI- 4 3 SG add
R19 *E@0
R18 *E@0
CN13
LP11 E@CMM21T-900M-N 20
EX_TX0_HDMI+ TX2_HDMI+ SHELL1
16 EX_TX0_HDMI+ 4 3 19 D2+
16 EX_TX0_HDMI- EX_TX0_HDMI- 1 2 18
TX2_HDMI- D2 Shield L8
17 D2-
R17 *E@0 TX1_HDMI+ 16 E@LQG18HN68NJ00D HDMISCL
D1+ 16 HDMI_SCL E@LQG18HN68NJ00D HDMISDA
15 D1 Shield
TX1_HDMI- 14 16 HDMI_SDA
R16 *E@0 TX0_HDMI+ D1- L7 C25 C26
13 D0+
12 HDMIC_5V
LP12 E@CMM21T-900M-N TX0_HDMI- D0 Shield *E@10P/50V *E@10P/50V
11 D0-
16 EX_TXC_HDMI+ EX_TXC_HDMI+ 1 2 TXC_HDMI+ 10
EX_TXC_HDMI- CK+
16 EX_TXC_HDMI- 4 3 9 CK Shield
TXC_HDMI- 8
R15 *E@0 CK- C633
7 CE Remote
6 *.1U/10V
D HDMISCL NC D
5 DDC CLK
HDMISDA 4 For HDMI Nvidia's PUN issue
DDC DATA
3 GND
VCC5 F2 2 1 E@FUSE1A6V_POLYHDMIC_5V 2
HDMI_DET R436 HDMIDET_R +5V
17 HDMI_DET 1 HP DET
E@1K
SHELL2 21
for EMI request PROJECT : CH3
R437 E@C12814
E@15K
Update CN13 footprint and PN nicole 12/04
LCD /CAMERA 1A

1 2 3 4 5 6 7 8
A B C D E
1394_XIN C812 22P
26
2
Y6
U32A 24.576MHZ
21 GNT0# L2 R19 C808 27P
1
21 REQ0# GNT# XI 1394_XOUT
L3 REQ# XO R18
AD25 R538 150 AD25_R N5
21 FRAME# IDSEL R0 R575 6.34K/F
R6 FRAME# R0 T18
21 IRDY# V5 T19 R1
21 DEVSEL# IRDY# R1 CPS R565 390K
U6 DEVSEL# CPS R12
21 TRDY# W5 P12 TEST0_7412 R568 330
21 SERR# TRDY# TEST0
4
W6 SERR# VSSPLL R17 4
1394 Interface
21 STOP# V6
21 PERR# STOP# TPA0P
R7 PERR# TPA0P V14
21 PAR U7 W14 TPA0N
PAR TPA0N TPBIAS0
TPBIAS0 R13
P2 V13 TPB0P
21 C/BE3# CBE3 TPB0P
U5 W13 TPB0N
21 C/BE2# CBE2 TPB0N
21 C/BE1# V7 CBE1
21 C/BE0# W10 CBE0 TPA1P V16
TPA1N W16
2 PCI_CLK_8402 L1 PCLK TPBIAS1 W17
V15 del 2*4.7K resistors
TPB1P 10/26
21 PCIRST# K3 PRST# TPB1N W15
GRST#_8402 K5 +1.5V_PCM
GRST#
PCI Interface
21 AD[0..31] VDDPLL15 P15
AD0 R11 P17 PHY_TEST_MA R564 4.7K 1394_AVDD
AD1 AD00 PHY_TEST_MA
P11 AD01
AD2 U11 U12 C824
AD3 AD02 PC0_RSVD VCC3 1U
V11 AD03 PC1_RSVD V12
AD4 W11 W12
AD5 AD04 PC2_RSVD
R10 AD05
AD6 U10 U13
AD7 AD06 AGND_00 R537
V10 AD07 AGND_01 U14
AD8 R9 R14 10K
AD9 AD08 AGND_02
U9 AD09
AD10 V9 J5 LPC_PD#_8402 D27 *BAS316
AD10 SUSPEND# LPC_PD# 22
AD11 W9 L5 RI#_PCI_PME# R552 0
AD11 RI_OUT# PCI_PME# 21
AD12 V8 H3 R547 *0
AD12 SPKROUT RI# 22
AD13 U8 AD13 PCMSPK 34
AD14 R8 K2
AD15 AD14 VR_EN#
3 W7 AD15 USB_EN E10 3
Miscellaneous
AD16 W4
AD17 AD16 SCL_CARD
T2 AD17 SCL G2
AD18 T1 G3 SDA_CARD
AD19 AD18 SDA
R3 AD19
AD20 P5 G1
AD21 AD20 MFUNC0 INTE# 21
R2 AD21 MFUNC1 H5 INTB# 21
AD22 R1 H2
AD23 AD22 MFUNC2 INTA# 21
P3 AD23 MFUNC3 H1 SERIRQ 22,36
AD24 N3 J1 MFUNC4 R539 10K
AD24 MFUNC4 VCC3
AD25 N2 J2 T193
AD26 AD25 MFUNC5
N1 AD26 MFUNC6 J3 CLKRUN# 22,36
AD27 M5
AD28 AD27
M6 AD28 LATCH/VD3/VPPD0 C9
AD29 M3 A9
AD30 AD29 CLOCK/VD1/VCCD0#
M2 AD30 DATA/VD2/VPPD1 B9
AD31 M1 C4 +3V_VCCD1 R540 10K
AD31 RSVD_03/VD0/VCCD1#/PS_MODE VCC3
PCI8402
CN14
5
TPBIAS0 L1394_TPB0- 1
L1394_TPB0+ 2
L1394_TPA0- 3
2 VCC3 2
L1394_TPA0+ 4
6
R454 R452
56.2/F 56.2/F C641 020115FR004S501ZL
1U
R544 R542
U39
2.2K 2.2K
8 VCC A0 1
7 NC A1 2
SCL_CARD 6 3 R453 0
SDA_CARD SCL A3
5 SDA GND 4
LP7 *CMF-2012-0160I-S1
TPA0P 1 2 L1394_TPA0+
R546 24LC02BT TPA0N 4 3 L1394_TPA0-
*220 R543
R451 0
*220
R450 0
LP8 *CMF-2012-0160I-S1
TPB0P 4 3 L1394_TPB0+
TPB0N 1 2 L1394_TPB0-
VCC3
R448 0
VCC3
R449 R447
R534 56.2/F 56.2/F
1M
C788
1 .1U 1
GRST#_8402
R446
C781 5.1K/F C634
.1U 270P
PROJECT : CH3
PCI8402-IEEE1394 1A

A B C D E
A B C D E
U32C
SC_OC#
SC_PWR_CTRL
SC_VCC5
SD_CMD/SM_ALE/SC_GPIO2
F2
G5
G6
C5
SC_VCC5
SM_ALE
R541 0 VCC3
27
A4 SM_RE# R586 10K VCC_FM
SD_CLK/SM_RE#/SC_GPIO1 SM_CLE
SM_CLE/SC_GPIO0 B4
SM_R/B#/SC_RFU D1
E3 SM_PHYS_WP#/SC_FCB T192 VCC3
4 SM_PHYS_WP#/SC_FCB 4
SC_CLK E2
48MHz Clock
FlashMedia Interface
F5 VCC3
SC_RST
SC_DATA E1
Y5 Q27
F1 CLK48M 3 4 R619 1 8 VCC_FM
CLK_48 OUT VDD GND OUT
10K 2 IN OUT 7
SC_CD# F3 2 GND OE 1 3 IN OUT 6
E9 SD_CD# C783
SD_CD# MS_CD# TXC-48MHz-30PPM-15Pf MC_PWR_CTRL_0#
MS_CD# A8 .01U 4 EN# OUTNC 5
SM_CD# B8
TPS2061DGNR
A3 XD_CD# VCC_FM VCC3
XD_CD#/SM_PHYS_WP#
C883
C8 MC_PWR_CTRL_0#
MC_PWR_CTRL_0 SM_R/B# R588 10K 10U
MC_PWR_CTRL_1/SM_R/B# F8
E8 MS_BS/SD_CMD/SM_WE# R581 10K
MS_BS/SD_CMD/SM_WE# MS_CLK/SD_CLK/SM_EL_WP#_RR R578 47 MS_CLK/SD_CLK/SM_EL_WP#
MS_CLK/SD_CLK/SM_EL_WP# A7 C890
MS_SDIO(DAT0)/SD_DAT0/SM_D0 .1U
MS_SDIO(DATA0)/SD_DATA0/SM_D0 B7
C7 MS_DAT1/SD_DAT1/SM_D1
MS_DATA1/SD_DATA1_SM_D1 MS_DAT2/SD_DAT2/SM_D2
MS_DATA2/SD_DATA2_SM_D2 A6
B6 MS_DAT3/SD_DAT3/SM_D3
MS_DATA3/SD_DATA3_SM_D3 VCC_FM
E7 SD_WP/SM_CE# R585 10K VCC_FM
SD_WP/SM_CE#
C6 SM_D4
SD_DAT0/SM_D4/SC_GPIO6 SM_D5
SD_DAT1/SM_D5/SC_GPIO5 A5
B5 SM_D6 C861 R608
SD_DAT2/SM_D6/SC_GPIO4 SM_D7 C863 C873 C880 C864
SD_DAT3/SM_D7/SC_GPIO3 E6
.1U .1U .1U .1U 2.2U 150K
PCI8402
3 3
VCC3
+1.5V_PCM
C787 C790 C798 C817 C816

.1U .1U 10U .01U .01U
C822
.1U U32D
J6 VCC3
VCC33_00
K1 1.5V_00 VCC33_01 L6
K19 P6 VCC3
1.5V_01 VCC33_02
U19 VDDPLL33 VCC33_03 P8
1394_AVDD P10
VCC33_04
L14
Power/GND
VCC33_05
H6
K6
GND_00 VCC33_06 J14
F14
6 IN1 CARD READER
GND_01 VCC33_07
N6 GND_02 VCC33_08 F12
P7 F9 C846 C805 C854
GND_03 VCC33_09 1U 1U
P9 GND_04 VCC33_10 F6 .1U
M14 CN25
2 GND_05 1394_AVDD SM_CLE 2
K14 GND_06 AVDD33_00 P13 6 CLE_XD GND 43
G14 P14 MS_DAT2/SD_DAT2/SM_D2 9 42
GND_07 AVDD33_01 MS_CLK/SD_CLK/SM_EL_WP# DAT2_SD GND-SDIO MS_CLK/SD_CLK/SM_EL_WP#
F13 GND_08 AVDD33_02 U15 10 -WP_XD CLK_SD 25
F10 XD_CD# 2 26 MS_BS/SD_CMD/SM_WE#
GND_09 VCC3 SM_R/B# CD_XD MS-BS
F7 GND_10 VCCP_00 P1 3 R/-B_XD VSS_SD 27
W8 SM_ALE 7 28
VCCP_01 SM_RE# ALE_XD MS-VSS MS_DAT1/SD_DAT1/SM_D1
4 -RE_XD D1_XD 29
PCI8402 1 30 MS_SDIO(DAT0)/SD_DAT0/SM_D0
GND_XD DAT0_SD MS_DAT2/SD_DAT2/SM_D2
11 MS-VSS D2_XD 31
VCC_FM 32 MS_DAT1/SD_DAT1/SM_D1
DAT1_SD MS_DAT3/SD_DAT3/SM_D3
13 MS-VCC D3_XD 33
MS_CD# 18 34 SM_D4
MS-INS D4_XD SM_D5
19 VSS_SD D5_XD 35
1394_AVDD L62 BK1608HS800 17 36 SM_D6
1394_AVDD VCC3 GND_XD D6_XD
MS_BS/SD_CMD/SM_WE# 15 37 SM_D7
MS_CLK/SD_CLK/SM_EL_WP# CMD_SD D7_XD
14 MS-SCLK VCC_XD 38 VCC_FM
C801 C803 MS_DAT3/SD_DAT3/SM_D3 16 39 SD_CD#
.1U MS_DAT2/SD_DAT2/SM_D2 MS-DATA3 C/D_SD
1U 20 MS-DATA2 GND_SD 40
41 SD_WP/SM_CE#
SD_WP/SM_CE# W/P_SD
5 -CE_XD
MS_BS/SD_CMD/SM_WE# 8
MS_DAT3/SD_DAT3/SM_D3 -WE_XD MS_DAT1/SD_DAT1/SM_D1
12 CD/DAT3_SD MS-DATA1 24
VCC_FM 21 22 MS_SDIO(DAT0)/SD_DAT0/SM_D0
VDD_SD SDIO/MS-DATA0 MS_SDIO(DAT0)/SD_DAT0/SM_D0
D0_XD 23
MXP038-01-A_CARD READER
NEED PN
1 1
PROJECT : CH3
PCI8402-CARD READER 1A

A B C D E
5 4 3 2 1
U32B
CAD31
CAD30
CAD29
CAD28
C10
A10
F11
E11
LP4
3V_NEWCARD
1
CN6
GND_1
FEB800601
28
C11 USBP9- 1 2 2
CAD27 21 USBP9- USBP9+ USB-
CAD26 B13 21 USBP9+ 4 3 3 USB+
C13 CPUSB# 4
CAD25 *WCM2012-90 CPUSB#
CAD24 A14 5 RSV_0
CAD23 B14 6 RSV_1
CAD22 B15 2,13,22,31 PCLK_SMB 7 SMBCLK
D CAD21 E14 2,13,22,31 PDAT_SMB 8 SMBDATA D
CAD20 A16 9 +1.5V
CAD19 D19 1.5V_NEWCARD 10 +1.5V
CAD18 E17 22,31,32 PCIE_WAKE# 11 WAKE#
CAD17 F15 3VAUX_NEW 12 +3.3VAUX
H19 PERST_C# 13
CAD16 PERST#
CAD15 J17 14 +3.3V_1
CAD14 J15 15 +3.3V_2
J18 PCIE_REQ3# 16
CAD13 2 PCIE_REQ3# CLKREQ#
K15 CPPE# 17
CAD12 CLK_PCIE_NEW_C# CPPE#
CAD11 K17 2 CLK_PCIE_NEW_C# 18 REFCLK-
K18 CLK_PCIE_NEW_C 19
CAD10 2 CLK_PCIE_NEW_C REFCLK+
CAD09 L15 20 GND_2
L18 R545 33K PCIE_RXN1 C563 0.1U 21
CAD08 21 PCIE_RXN1 PERn0
L19 PERST# 1 2 PERST_C# PCIE_RXP1 C567 0.1U 22
CAD07 21 PCIE_RXP1 PERp0
M17 23
CardBus Interface
CAD06 C547 PCIE_TXN1 GND_3

CAD05 M18 21 PCIE_TXN1 24 PETn0
N19 4700P PCIE_TXP1 25
NC1
NC2
NC3
NC4
CAD04 21 PCIE_TXP1 PETp0
CAD03 M15 26 GND_4
CAD02 N17
N18
27
28
29
30
CAD01
CAD00 P19
CCBE3 E13
CCBE2 E18
CCBE1 H18
CCBE0 L17
RSVD_04/D2 B10
CCD1#/CD1# N15
C
CCD2#/CD2# B11 C
CVS1/VS1# A13
CRST# C15 U13
CBLOCK# H15
CREQ#/INPACK# C14
CSERR#/WAIT# C12 3VSUS 17 AUXIN AUXOUT 15 3VAUX_NEW
CDEVSEL# F19 VCC3 2 3.3VIN_0 3.3VOUT_0 3 3V_NEWCARD
CFRAME# E19 4 3.3VIN_1 3.3VOUT_1 5
CGRANT# G17 VCC1.5 12 1.5VIN_0 1.5VOUT_0 11 1.5V_NEWCARD
CINT# E12 14 1.5VIN_1 1.5VOUT_1 13
CVS2/VS2# B16
CPERR# G19
CSTOP# G18 ExpressSwitch
CIRDY F17
G15 20 8 PERST#
CTRDY# SHDN# PERST# CPPE#
1 STBY# CPPE# 10
H17 6 9 CPUSB#
RSVD_02/A18 21,22,31,32,33 PLTRST# SYSRST# CPUSB# 3V_NEWCARD 3VAUX_NEW 1.5V_NEWCARD
RSVD_01/D14 M19 OC# 19
16 NC
CCLKRUN# A11 7 GND0 RCLKEN 18
CPAR H14
A15 C791 C548 C786 C546 C782 C544
VCCCA_01 R5538D001-TR-F
VCCCA_00 J19
A12 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
CSTSCHG
CAUDIO B12 SHDN#, STBY#, PERST# and CPPE# have internal pull-up to AUXIN.
CCLK F18 So del R551, R541, R327, R329 nicole 12/11
PCI8402 Del R532 and R556 nicole 12/11

B B
H10 H1 H15 H25 H26 H18 H23 H5 H24 H16 H7 H4 H3 H2

H-C276D118P2 H-TC354BC276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-TC354BC276D118P2
1
1
H14 H11 H6 H8 H9 H13 H28 H21 H17 H22 H20 H12 H19
H-C236D165P2 H-C236D165P2 H-C236D165P2 H-C236D165P2 H-C236D165P2 H-C236D165P2 H-C236D165P2 H-C217D122P2 H-C217D122P2 H-C217D122P2 H-C217D122P2 H-C217D122P2 H-C217D122P2
1
1
A A
PROJECT : CH3
NEWCARD/HOLE 1A

5 4 3 2 1
A B C D E
USB PORT
5VSUS 2
U9
G545B2RD1U
IN1 OUT3 8
40 mils
USBVCC2 USBVCC2
5VSUS 2
3
U41
G545B2RD1U
IN1
IN2
OUT3
OUT2
8
7
40 mils
USBVCC1 USBVCC1
29
3 7 6 C860
IN2 OUT2 USBON#- E OUT1
OUT1 6 4 EN#
USBON#- E 4 C732 1 C876 100u/6.3V_6032
EN# C736 GND USB_OC1# R415 0 0.1U
1 GND 9 GND-C OC# 5 USBOC1# 21
9 5 USB_OC2# R279 0 0.1U 100u/6.3V_6032
4 GND-C OC# USBOC2# 21 4
40 mils
CN21 LP6
LP2 USBVCC2 USBP1-
4 4 21 USBP1- 1 2
1 2 USBP2- 3 4 3 USBP1+
21 USBP2- 3 21 USBP1+
4 3 USBP2+ 2 6
21 USBP2+ 2 6
1 5 *WCM2012-90
*WCM2012-90 1 5 C858 C862
C748 C744 *47P *47P
*47P *47P USB
U8
G545B2RD1U
40 mils U38
5VSUS 2 8 USBVCC3 G545B2RD1U
40 mils
IN1 OUT3 USBVCC3 USBVCC0 USBVCC0
3 IN2 OUT2 7 5VSUS 2 IN1 OUT3 8
OUT1 6 3 IN2 OUT2 7
USBON#- E 4 6 C842
EN# C700 USBON# R599 0_4USBON#- E 4 OUT1
1 GND 36 USBON# EN#
9 5 USB_OC3#R159 0 C702 1 C833 100u/6.3V_6032
GND-C OC# USBOC3# 21 GND
0.1U 100u/6.3V_6032 9 5 USB_OC0# R396 0 0.1U
GND-C OC# USBOC0# 21
3 3
40 mils
CN19
LP1 USBVCC3 LP5
4 4
1 2 USBP3- 3 1 2 USBP0-
21 USBP3- 3 21 USBP0-
4 3 USBP3+ 2 6 4 3 USBP0+
21 USBP3+ 2 6 21 USBP0+
1 1 5 5
*WCM2012-90 *WCM2012-90
C706 C704 C839 C850
*47P *47P USB *47P *47P
CN8
USBP0+ 1
USBP0- 2
USBVCC0 3
USBVCC1 4
USBP1+ 5
INT KeyBoard USBP1- 6
7
MY15 8
7 8
5 6 MY14 USB-CON
3 4 MY13 update signal sequence, cable need update
1 2 MY12 12/05
CN3
220Px4
MY15 1 CP1
36 MY15 1
MY14 2 7 8 MY11 3VPCU
2 36 MY14 2 2
MY13 3 5 6 MY10
36 MY13 3
MY12 4 3 4 MY9 RP50
36 MY12 4
MY11 5 1 2 MY8 10 1 MY4
36 MY11 5
MY10 6 MY9 9 2 MY1
36 MY10 6 220Px4
MY9 7 MY8 8 3 MY3
36 MY9 7 CP2
MY8 8 MY7 7 4 MY5
36 MY8 8
MY7 9 7 8 MY7 MY6 6 5
36 MY7 9
MY6 10 5 6 MY6
36 MY6 10
MY5 11 3 4 MY5 10KX8
36 MY5 11
MY4 12 1 2 MY4
36 MY4 12
MY3 13 RP49
36 MY3 13 220Px4
MY2 14 10 1 MY10
36 MY2 14 CP3
MY1 15 MY15 9 2 MY14
36 MY1 15
MY0 16 7 8 MY3 MY13 8 3 MY11
36 MY0 16
MX7 17 5 6 MY2 MY12 7 4 MY2
36 MX7 17
MX6 18 3 4 MY1 MY0 6 5
36 MX6 18
MX5 19 1 2 MY0
36 MX5 19
MX4 20 10KX8
36 MX4 20 220Px4
MX3 21
36 MX3 21 CP6
MX2 22
36 MX2 22
MX1 23 7 8 MX7
36 MX1 23
MX0 24 5 6 MX6
36 MX0 24
25 3 4 MX5 DEL MX[7:0] pull-up to 3VPCU
25 MX4
26 26 1 2 nicole 9/25
220Px4
CP5
need P/N AFN260-N2GLZ 7 8 MX3
1 MX2 1
5 6
3 4 MX1
1 2 MX0
220Px4
CP4 PROJECT : CH3
KB / USB 1A

A B C D E
5 4 3 2 1
BT Connector FAN CONN 30

VCC5
VCC3 FANPWR = 1.6*VSET
U15 CN11
D D
C629 0.1U 2 3 +5V_FAN
VIN VO 3
GND 5 2
1
THERM_ALERT# 1 6
15,22 THERM_ALERT# FON# GND 1
1
Q14 7 C630 C628
GND 85205-0300L
36 VFAN 4 VSET GND 8
2 AO3403 10U_0805 0.01U_0603
36 BT_ON#
2
G995
Activate: L C602 .1U_4 CN9

3VPCU
VCC5
3
L44 5 5
2
BT_VCC 4 R431
BK2125HS330_8 4 R430
3 3 100K
R639 0_4 2 10K
2
1 1
LP14 FANSIG
1
36 FANSIG
21 USBP4+ 4 3
3
21 USBP4- 1 2
BT_USB Q17
*WCM2012-90 2N7002E-LF
Del R398 change back to CH2 5pin onnector 2
2
R640 0_4 for BenQ and NEC not share one module
Q15
DTC144EUA nicole 11/28 B ver
C631
1
24 BT_LED# 3 1
4700P_0603
C C
Thermal Senser
TOUCH PAD C654
VCC3
C655
THERM_VCC R458 200
20 mils 0.1U/10V 0.1U/10V
U18
3 H_THERMDA
L29 BLM21P300S +TPVDD 1 8 THMCLK THMCLK 15
VCC5 VCC SMCLK
C659
CN4 2200P H_THERMDA 2 7 THMDAT THMDAT 15
C328 .1U-16V_4 DXP SMDATA
12 H_THERMDC THERM_ALERT#
11 3 DXN -ALT 6 THERM_ALERT# 15,22
TPDATA L28 LZA10-2ACB104MT TPDATA_R
36 TPDATA 10 3 H_THERMDC
-SYS_SHDN-1 4 5
TPCLK L26 LZA10-2ACB104MT TPCLK_R 9 -OVT GND
36 TPCLK 8 MAX6648
B 7 B
R291 R292 6
LEFT# 5
10K_4 10K_4 4
3
RIGHT# 2 VCC5
1
TOUCH_PAD_12P
VCC5
VCC5
R464
200K
R465
SYS_SHDN# 41
10K
3
R463 10K THMDAT 1 3 MBDATA MBDATA 36,44
-SYS_SHDN-1 2 2
CN5 Q20
2N7002 Q24 C661
2
1 LEFT# VCC3 2N7002E Q23

2 RIGHT# .01U 2N7002E
1
2
3 C330 Q19 2N7002

4 C331 *.1U-16V_4
*.1U-16V_4 R456 10K THMCLK 1 3 MBCLK
TB-MB MBCLK 36,44
A A
PROJECT : CH3
FAN/BT/TP 1A

5 4 3 2 1
A B C D E
Mini PCI-E Card

WLAN
3VSUS VCC3 VCC1.5
VCC3 VCC1.5 3VSUS
31
CN22 Activate: L
51 Reserved +3.3V 52
C536 C518 C533 C476 C481 C532 C523 49 50
0.1U 1U_0603 0.1U 0.01U 0.1U Reserved GND R422 0_4 WLAN_LED#
10U/6.3V 10U/6.3V 47 Reserved +1.5V 48 WLAN_LED# 24
D 45 Reserved LED_WPAN# 46 D
43 Reserved LED_WLAN# 44
41 42 LP3 *WCM2012-90
PCLK_DEBUG Reserved LED_WWAN#
39 Reserved GND 40
37 38 USBP7+ 1 2
Reserved USB_D+ USBP7+ 21
35 36 USBP7- 4 3
GND USB_D- USBP7- 21
R305 PCIE_TXP0 33 34
21 PCIE_TXP0 PETp0 GND
*22 PCIE_TXN0 31 32 PDAT_SMB
21 PCIE_TXN0 PETn0 SMB_DATA PDAT_SMB 2,13,22,28
Del two .1u caps 29 30 PCLK_SMB
GND SMB_CLK PCLK_SMB 2,13,22,28
nicole 9/25 27 28
PCIE_RXP0 GND +1.5V
21 PCIE_RXP0 25 PERp0 GND 26
C506 PCIE_RXN0 23 24 R307 10K VCC3
21 PCIE_RXN0 PERn0 +3.3Vaux
*22P 21 22 PLTRST#
GND PERST# PLTRST# 21,22,28,32,33
PCLK_DEBUG 19 20
EMI 2 PCLK_DEBUG
21,22,28,32,33 PLTRST#
PLTRST# 17
Reserved
Reserved
Reserved
GND 18 D16 1SS355
RF_EN 36
15 16 LAD0_1 LAD1_1 RP48

1 2 0X2 LAD1
3VSUS CLK_PCIE_MINI_WLAN GND Reserved LAD1_1 LAD0_1 LAD0 LAD1 20,36
2 CLK_PCIE_MINI_WLAN 13 REFCLK+ Reserved 14 3 4
CLK_PCIE_MINI_WLAN# 11 12 LAD2_1 LAD3_1 RP47
1 2 0X2 LAD3 LAD0 20,36
2 CLK_PCIE_MINI_WLAN# REFCLK- Reserved
9 10 LAD3_1 LAD2_1 3 4 LAD2 LAD3 20,36
CLK_MINI_OE# GND Reserved R522 0 LFRAME# LAD2 20,36
T89 7 CLKREQ# Reserved 8
2
5 6 LFRAME# 20,36
Reserved +1.5V
3 Reserved GND 4
PCIE_WAKE# 3 1 1 2 VCC3 for LPC debug add 0ohm resietor for BenQ request
22,28,32 PCIE_WAKE# WAKE# +3.3V
Q30 1827680-1
*2N7002E-LF
C C
CIR ( Low Speed USB Interface )

Mini PCI-E Card ROBSON
VCC1.5 3VSUS U42 20 MIL
11 1 CIR_OUT
CIR_5V VCC P0-0
CN24 18 2
C610 4.7u/10V P0-4 P0-1
51 Reserved +3.3V 52 17 P0-5 P0-2 3
49 Reserved GND 50 16 P0-6 P0-3 4
47 48 R333 15 5
Reserved +1.5V 36 PWRBTN_CIR# P0-7 P1-0
45 Reserved LED_WPAN# 46 *0 14 P1-1 VSS 6
43 44 R594 0_4 USB8+ 13 7
Reserved LED_WLAN# 21 USBP8+ D+/SCLK VPP
41 42 R593 0_4 USB8- 12 8
Reserved LED_WWAN# 21 USBP8- D-/SDATA VREG/P2-0
39 Reserved GND 40 10 XTALOUT XTALIN/P2-1 9
37 38 USB5+ R363 *0
Reserved USB_D+ USBP5+ 21
35 36 USB5- R357 *0 CY7C63723_SXC
GND USB_D- USBP5- 21
PCIE_TXP3 33 34
21 PCIE_TXP3 PETp0 GND
PCIE_TXN3 31 32 R349 *0 R592 1.5K_4 CIR_VREG
21 PCIE_TXN3 PETn0 SMB_DATA PDAT_SMB 2,13,22,28
29 30 R343 *0
GND SMB_CLK PCLK_SMB 2,13,22,28
27 GND +1.5V 28
PCIE_RXP3 25 26
21 PCIE_RXP3 PERp0 GND
B PCIE_RXN3 23 24 B
21 PCIE_RXN3 PERn0 +3.3Vaux CIR_5V
21 22 PLTRST#
GND PERST# PLTRST# 21,22,28,32,33
19 20 U44 R420
Reserved Reserved CIR_OUT CIR_VCC
17 Reserved GND 18 1 OUT VCC 2
15 16 3 C627 100_8
CLK_PCIE_MINI_RB GND Reserved GND
2 CLK_PCIE_MINI_RB 13 REFCLK+ Reserved 14
CLK_PCIE_MINI_RB# 11 12 4.7u/10V
2 CLK_PCIE_MINI_RB# REFCLK- Reserved
9 10 IRM-v036
GND Reserved
2 PCIE_REQ2# 7 CLKREQ# Reserved 8
5 Reserved +1.5V 6
3VSUS 3 4
Reserved GND TV_SENSE# 36
1 2 +3V_TV R322 0
WAKE# +3.3V VCC3
2
1827680-1 When used TV card, not stuff this resistor

PCIE_WAKE# 3 1
3VPCU 5VPCU 5VPCU 5VSUS CIR_5V
Q11
*2N7002E-LF Nicole update per Intel Rosbon
D23 RB500
need double check VCC3 +3V_TV R607 R601 R402 *0
L42 L65
*BK2125HS330_8 10K/F_4 10K/F_4 BK2125HS330_8
1 3 1 3
*AO? AO3403
2
Q12 Q26 C859 C855
2
2
C580 C811 10U/10V/X5R_8 1U/10V_4
36 TV_POWERON# *10U/6.3V *.1U-10V 1 3
36 CIR_ALWON#
A Q25 A
MMBT3904
3VSUS VCC3 VCC1.5
SG add
not stuff for BenQ PROJECT : CH3
C539 C537 C542 C585 C543 C561 C575
*0.1U *1U_0603 0.1U 10U/6.3V 0.01U 0.1U 10U/6.3V Quanta Computer Inc.
WIRELESS/ ROBSON/CIR 1A

A B C D E
5 4 3 2 1
R73
R77
4.7K_4
4.7K_4
RVCC3
32
(4mA) RVCC3
U20
LAN_VPDCLK 6 1
LAN_VPDDATA SCL A0
5 SDA A1 2
61
45
40
65
36
37
35
34
A2 3 U5
1
D R72 D
7 8
AVDDH(3.3V)
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL
EPAD
SPI_CS
SPI_CLK
SPI_DI
SPI_DO
WP VCC RVCC3
GND 4 10K_4
C106 0.1U_4 PCIE_RXP2_R 49
21 PCIE_RXP2_LAN TX_P
24LC08BT-I 10 LOM_DISABLE#
C109 C105 0.1U_4 PCIE_RXN2_R 50 LOM_DISABLEn
21 PCIE_RXN2_LAN TX_N
0.1U_4 12
VAUX_AVLBL RVCC3
21 PCIE_TXP2_LAN 54 RX_P
11 C135
SWITCH_VCC
21 PCIE_TXN2_LAN 53 RX_N *0.1U_4
VMAIN_AVAL 47
22,28,31 PCIE_WAKE# 6 WAKEn
SWITCH_VAUX 9
RVCC3 55
2 CLK_PCIE_LAN REFCLKP
RESERVED 24
2 CLK_PCIE_LAN# 56 REFCLKN
RESERVED 25
5 R104 4.99K/F
21,22,28,31,33 PLTRST# PERSTn
C104 C148 C103 C102 C119 C114 C125 16 LAN_RTSET
0.1U_4 0.1U_4 0.1U_4 1000P 1000P 1000P *4.7U_6 R101 49.9 MDI0+ RSET
17 MDIP[0]
4 CTRL_18
C185 1000P R102 49.9 MDI0- CTRL18
18
R99 49.9 MDI1+ 20

MDIN[0]
MDIP[1]
88E8055 CTRL12 3 CTRL_12
When stuff 8039, R104 stuff 2.0K

C183 1000P R100 49.9 MDI1- 21 MDIN[1] control in BOM
RESERVED 29
R84 0_6 R97 49.9 MDI2+ 26
RVCC3 MDIP[2]
TESTMODE 46
C684 1000P R98 49.9 MDI2- 27
C670 C681 MDIN[2]
4.7U_6 R467 R89 49.9 MDI3+ 30 59 T11
0.1U_4 4.7K_4 MDIP[3] LED_ACTn
C C685 1000P R87 49.9 MDI3- T10 C
31 MDIN[3] LED_LINK10/100n 60
3
LED_LINK1000n 62 T12
CTRL_12 Q22 LAN_VPDCLK
1 Closed Transfomer 38 VPD_CLK
63
BCP69T1 LAN_VPDDATA LED_LINKn T9
41
4
2
VPD_DATA
VDD LAN_SMB_CLK 42 15 CLK_LAN_X1 C171 22P
T15 CLKREQ# XTALI
1
LAN_SMB_DATA 43 14
T14 RESERVED XTALO
AVDD
AVDD
AVDD
AVDD
Y1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
25MHz/20pF/30ppm
NC
NC
NC
NC
NC
C682 C110 C116 C173 C150 C108 C168 C107 C144 C663
2
0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 1000P 10U/6.3V 1000P 1000P 1000P CLK_LAN_X2 C155 22P
13
33
39
44
48
58
19
22
28
32
51
52
57
23
64
AVDD18
VDD
(426mA) (218mA)
R78 0_6 pin32, 51, 52, 57 64 and 19,22,23 are 2.5V power
RVCC3 Giga: P/N: AJ080550011
C665 C666 C667 R74
10U/6.3V 4.7U_6 0.1U_4 4.7K_4
3
CTRL_18 1 Q21
BCP69T1
4
2
B AVDD18 B
CN16
RJ45_MX0+ 1
RJ45_MX0- RX0+
2 RX0-
C658 C184 C112 C203 C118 C653 C170 C186 C151 C656 C669 C668 RJ45_MX1+ 3
1000P 1000P 1000P 1000P 1000P 4.7U_6 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 RJ45_MX2+ RX1+
4 TX1-
RJ45_MX2- 5
RJ45_MX1- TX2+
6 RX2- GND 14
RJ45_MX3+ 7
RJ45_MX3- TX3+
8 TX3-
AVDD18 13
GND
9 NC
RINGL 10
U21 TIPL RING
11 TIP
C143 1 24 MCT3 12
.01U/16V_4 MDI3+ 2 TCT3 MCT3 RJ45_MX3+ NC
TD3+ MX3+ 23
MDI3- 3 22 RJ45_MX3-
TD3- MX3-
C195 4 21 MCT2 RJ11-C10054
.01U/16V_4 MDI2+ 5 TCT2 MCT2 RJ45_MX2+
TD2+ MX2+ 20
MDI2- 6 19 RJ45_MX2- NEED CHECK
TD2- MX2-
C163 7 18 MCT1
.01U/16V_4 MDI1+ 8 TCT1 MCT1 RJ45_MX1+ CN15
TD1+ MX1+ 17
MDI1- 9 16 RJ45_MX1- C660 470p/3KV_1808 TIPL
TD1- MX1- C652 470p/3KV_1808 RINGL 1
C177 MCT0 2
10 TCT0 MCT0 15
.01U/16V_4 MDI0+ 11 14 RJ45_MX0+ MDC_CABLE
A MDI0- 12 TD0+ MX0+ RJ45_MX0- A
TD0- MX0- 13
NS892402P R112 R93 R85 R81

TRF-10-1-24P 75/F_4 75/F_4 75/F_4 75/F_4
C697
RJ45_TER
1000P/3KV_1808
PROJECT : CH3
1G -- FCE NS892402P DB0ZH1LAN06 Quanta Computer Inc.
10/100 -- FCE NS892404 DBED2LLAN05 Size Document Number R ev
Marvell 8039/55 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
20 PDD[0..15]
PDD[0..15]
CD-ROM CONNECTOR
SMT TYPE CNN SATA HDD 33
CN23
CN20 1
GND1 SATA_TXP0
1 2 TXP 2 SATA_TXP0 20
3 SATA_TXN0
3 4 TXN SATA_TXN0 20
IDERST# PDD8 4
PDD7 5 6 PDD9 GND2 SATA_RXN0_C C576 3900P/25V
7 8 RXN 5 SATA_RXN0 20
A PDD6 PDD10 6 SATA_RXP0_C C574 3900P/25V SATA_RXP0 20 A
PDD5 9 10 PDD11 RXP
11 12 GND3 7
PDD4 PDD12
PDD3 13 14 PDD13 +3.3VSATA R344
15 16 3.3V 8 VCC3
PDD2 PDD14 9 0_0805
PDD1 17 18 PDD15 3.3V
19 20 3.3V 10
PDD0 PDDREQ 11
21 22 PDDREQ 20 GND
PDIOR# 12
23 24 PDIOR# 20 GND
PDIOW#
20 PDIOW#
PIORDY 25 26 PDDACK# GND 13
14
40 mils
20 PIORDY 27 28 PDDACK# 20 5V HDD_5V
IRQ14 15 HDD_5V R324 0_0805 VCC5
20 IRQ14 29 30 5V
PDA1 DIAG# R275 *10K VCC5 16
20 PDA1 31 32 5V
PDA0 PDA2 17 C549 C545
20 PDA0 33 34 PDA2 20 GND
PDCS1# PDCS3# 18 0.1U 10U_0805
20 PDCS1# 35 36 PDCS3# 20 RSVD
ODDLED# 23 19
37 38 ODD_5V GND GND C784
ODD_5V 39 40 80 mils 24
25
GND 12V 20
21 0.1U +3.3VSATA
41 42 GND 12V
43 44 26 GND 12V 22
4.7U_0805
R215 4.7K_4 RCSEL 45 46 C560
VCC5 47 48 VCC5 VCC3
C569
49 50 SATA 0.1U
R227 C320 C341 C335 C359
*470_0603 0.1U 1000P_0603 0.1U 10U_0805
51
52 Update CN23 footprint and PN
VCC3 R549
nicole 12/12 10K
10K/F_4 R560
NC for Slave
5
80 mils 2 ODDLED#
B
ODD_5V R271 0_0805 VCC5 4 B
24 ODD_LED#
1 SATA_LED#
SATA_LED# 20
VCC3 TC7SH08FU
3
U12
VCC3
VCC5
R323 R326 Q9 R281

8.2K 4.7K 2
DTC144EUA
PIORDY 10K_4
IRQ14 PLTRST# 1 3 IDERST#

21,22,28,31,32 PLTRST#
Nicole add 9/25
C C
D D
PROJECT : CH3
ODD/SATA/FAN 1A

1 2 3 4 5 6 7 8
5 4 3 2 1
34
ADOGND
H PR
36 SRS_EN HPR 35
D 35 262_AMP_MUTE# D
DMIC_CLK R613
20K/F HPL
HPL 35
14 SPDIF R614 E@0
4.75VA
4.75VA
ALC262SRS U40
48
47
46
45
44
43
42
41
40
39
38
37
C884 C881 C834 C840
DMIC-CLK
AVSS
SPDIFI/EAPD
HP_OUT_R
AVDD
SPDIFO
NC
GPIO1
GPIO0
HP_OUT_L
JDREF
MONO_OUT
.1U 10U .1U 10U
Close to pin38 and 25
ADOGND
1 DVDD LINE_OUT_R 36
DMIC_DATA 2 35 FRONT-R 35
20 ACZ_SDOUT0 GPIO2/DMIC-DATA LINE_OUT_L FRONT-L 35
20 BIT_CLK0 3 GPIO3 SENSE_B 34
22 R604 4 33
C894 *22P DVSS DCVOL MIC1-VREFO-R
5 SDATA_OUT MIC1_VREFO_R 32 MIC1-VREFO-R 35
CODEC1-BITCLK0 6 31 VCC3
BIT_CLK LINE2_VREFO MIC2-VREFO
20 ACZ_SDIN0 R635 33
7
8
DVSS
SDATA_IN
ALC262 MIC2_VREFO
LINE1_VREFO
30
29
MIC1-VREFO-L
MIC2-VREFO 35
VCC3 9 DVDD-IO MIC1_VREFO_L 28 MIC1-VREFO-L 35
10 27 C851 10U C887 C626 C888 C889
20 ACZ_SYNC0 SYNC VREF
20 ACZ_RST#0 11 RESET# AVSS 26
BEEP-RR 12 25 4.75VA .1U .1U .1U 10U
C853 1U PC-BEEP AVDD
SENSE_A
CD_GND
LINE2_R
LINE1_R
LINE2_L
LINE1_L
MIC2_R
MIC1_R
ADOGND
MIC2_L
MIC1_L
CD_R
CD_L
C C
13
14
15
16
17
18
19
20
21
22
23
24
VCC3
U36 SN74LVC1G86DCKR MIC1-PLG R580 20K/F_4 LINE1-R

35 MIC1-PLG
LINE1-L
5
1 LINE1-PLG R576 10K/F_4 MIC1-R

26 PCMSPK MIC1-R 35
4 BEEP R573 10K MIC1-L
MIC1-L 35
2 R584 39.2K/F_4
22 ACZ_SPKR 35 HP-PLG MIC2-R 35
MIC2-L 35
3
C852 C826 .1U

R598
1K 100P C827 .1U
C828 .1U
C829 .1U
C830 .1U
CN30
1 R633 0_4 DMIC_CLK
ADOGND 1
2 2
3 3 VCC3
4 R634 0_4 DMIC_DATA
4
MIC CON(53398-0471)
B B
Add digital MIC nicole 12/01
LINE-IN
For MDC Module
RVCC3
CN29
1 9
CN26 LINE1-L C604 4.7U-25V R403 0 2
1 2 C848 6 7
GND RSV LINE1-R C601 4.7U-25V R404 0
20 ACZ_SDOUT1 3 AC_SDO RSV 4 .1U 3 8
5 GND 3.3V 6 4
7 8 LINE1-PLG 5 10
20 ACZ_SYNC1 AC_SYNC GND
R636 33 SDIN1_M 9 10
20 ACZ_SDIN1 AC_SDI GND
11 12 C612 C613 2SJ-S351-005
20 ACZ_RST#1 AC_RST# AC_BCLK BIT_CLK1 20
MDC 150p_4 150p_4
R595
C849
*10P *22
ADOGND
A A
C847
*10P
PROJECT : CH3
ALC262/MIC/LINE/MDC 1A

5 4 3 2 1
5 4 3 2 1
Package 1206 for THD+N Add for Realtek AE suggestion
34
34
FRONT-L
FRONT-R
performance and Vista Logo
requirements.
C821 2
C832 2
1 1U/25V
1 1U/25V
Gain and low frequency consider nicole 12/01
R629
R630
0
0
SPKR_INL
SPKR_INR
3
2
U37
SPKR_INL
SPKR_INR
OUTL+
OUTL-
6
7
INSPKL+
INSPKL-
R574 0
35
R616 0
C838 2 1 4.7U/25V R631 4.7K HP_INL 27 20 INSPKR+
34
34
HPL
HPR
C845 2 1 4.7U/25V R632 4.7K HP _INR 26
HP_INL
HP_INR
MAX9789A OUTR+
OUTR- 19 INSPKR- R596 0
C856 1U
TQFN 32PIN HPL
1
C596 C590 C588 ADOGND 1 2 24 16 HP_L C837 .1U
C600 *47P/50V *47P/50V *47P/50V SPKR_EN# 23 BIAS HP_R
SPKR_EN# HPR 15
*47P/50V HP_EN 22 C813 .01U
2
HP_EN LDO_EN
D 25 MUTE# LDO_EN 4 max 120mA continuous D
AUD_AMP_GAIN1 31 1 C886 1000P
AUD_AMP_GAIN2 GAIN1 LDO_SET ADOGND LDO output +5V_ADO
32 GAIN2
+5V_ADO VOUT 29 4.75VA
ADOGND ADOGND 17 FOR EMI
HPVDD ADOGND
9 CPVDD VDD 30
+5V_ADO C835 1U 8 +5V_ADO
PVDD_8
1
C857 C820 10 18
10U 1U C1P PVDD_18 C589 C594
12 C1N
11 28 .1U 10U
2
R600 CPGND GND_28 C823 C818
PGND_5 5
10K 14 PVSS PGND_21 21 .1U 10U
ADOGNDADOGND 13
MUTE CPVSS VCC5
34 262_AMP_MUTE# 1 2
D30 *SW1010CPT C844 ADOGND BK2125HS330
1U MAX9789A ADOGND L64
1 2 ADOGND
36 AMP_VOLMUTE#
D29 SW1010CPT U14
+5V_ADO *G913C
ADOGND
4 3
20 mil
OUT IN
GND 2
R394 *28.7K/F C825 C831
5 SET SHDN 1
.1U 10U
+5V_ADO R383
+5V_ADO *10K/F_6
C +5V_ADO R637 10K_4 V out=Vset{1+R(4,5)/R(5,gnd)} C

2
4.75VA HP_EN Vse t =1.25V R392 *0

R387 R579 ADOGND MAINON 36,38,39,40,41,42
*100K 100K R577 Vo u t=1 .2 5 (1 +2 9 .4 K/1 0 K )=4.925V
10K Vout=1.25(1+28.7K/10K)=4.8375V
1
1
AUD_AMP_GAIN1 C599 C598 SPKR_EN# Vo u t=1 .2 5 (1 +2 7 K/1 0 K)= 4.625V

AUD_AMP_GAIN2 1U 1U
2
LDO_EN
1
GAIN1 GAIN2 GAIN

1
R390 R583 0 0 6dB

100K *100K C819 ADOGND R638
0 1 15.6dB 0.01U 10K_4
2
Layout Note:
1 0 10dB Place close chip. INT-MIC
ADOGND 1 1 21.6dB ADOGND
ADOGND
MIC2-VREFO R603 2.2K_4
34 MIC2-VREFO
L47
MIC2-L C606 1U-16V_6 BLM11A121S INT-MIC2
34 MIC2-L
MIC2-R C609 1U-16V_6
Headphone out 34 MIC2-R
CN10
INT-MIC2
1
B 2 B
CN27 C885 R615
R405 0_4 MIC_INT
1 9
HP_L 1 2 HPOUT_L 2 22P-50V_4 *1K_4
6 7 ADOGND
HP_R 1 2 HPOUT_R 3 8
R406 0_4 4
C615 C614 5 10 ADOGND
180P 180P 2SJ-S351-003
ADOGND ADOGND
34 HP-PLG
HP-PLG update sense circuit for realtek AE suggestion
SPEAKER
CN7
12/06 INSPKR+ L52 BK1608LL121 INSPKR+N
MIC-IN INSPKR- L51 BK1608LL121 INSPKR-N
1 1
2 2 7 7
ADOGND 3 3 6 6
INSPKL+ L50 BK1608LL121 INSPKL+N 4
INSPKL- L49 BK1608LL121 INSPKL-N 4
5 5
47P 47P
INT_SpK
R407 2.2K_4 CN28 C622 C623 C620 C621 ADOGND
34 MIC1-VREFO-L
1 9
C616 2.2U-25V BLM11A121S L46 MICINL_SYS 2 47P 47P need check PN
34 MIC1-L
6 7 11/13
A 3 8 A
C611 2.2U-25V BLM11A121S L45 MIC INR_SYS 4
34 MIC1-R
5 10
R408 2.2K_4 MIC1-PLG
34 MIC1-VREFO-R 34 MIC1-PLG
2SJ-S351-001 ADOGND
C617 C605
change PN for wrong footprint PROJECT : CH3
nicole 01/11/07 150p_4 150p_4

AMPLIFIER&JACKS 1A
ADOGND
5 4 3 2 1
5 4 3 2 1
LDRQ#(pin 8) internal is no use
VCCRTC C534 C535 C527 C540

3VPCU
C463
36
3VPCU 3VPCU
U11 .1U-10V_4 .1U-10V_4 .1U-10V_4 .1U-10V_4
MBCLK 6 1 10U-6.3V_6
MBDATA SCL A0 3VPCU 30mA R316
5 SDA A1 2
3 C517 0_4
A2 R294
.1U-10V_4
7 8 Should have a 0.1uF capacitor close to every
WP VCC
GND 4 GND-VCC pair + one larger cap on the supply.
C462 0_4 C468
591_AVCC
24LC08 .1U-10V_4 .1U-10V_4
C531 3VPCU
*.1U-10V_4
D D
ENV1 R290 10K_4
VCC3
2mA C467
123
136
157
166
161
.1U-10V_4 BADDR0R289 *10K_4
16
34
45
95
U10
VDD
AVCC
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VBAT
BADDR1R288 *10K_4
SHBM R287 10K_4

3VPCU SERIRQ 7 81 TEMP_MBAT VCC3
22,26 SERIRQ SERIRQ AD0 TEMP_MBAT 43,44
T93 8 82 SHBM=1: Enable shared memory with host BIOS
LFRAME# LDRQ AD1
20,31 LFRAME# 9 LFRAME AD2 83
R321 LAD0 15 84 MBATV R295
20,31 LAD0 LAD0 AD3 MBATV 44
LAD1 14 Host interface 87
20,31 LAD1 LAD1 IOPE0 WR/BT_SW# 24
470K_4 LAD2 13 88 T90 10K_4 3VPCU
20,31 LAD2 LAD2 IOPE1
LAD3 10 89 SUSC#
20,31 LAD3 LAD3 IOPE2 SUSC# 22
PCLK_541 18 AD Input 90 HWPG HWPG MBCLK R530 4.7K_4
2 PCLK_541 LCLK IOPE3
19 93 T88
KBSMI# LREST NC12 T86 MBDATA R529 4.7K_4
22 KBSMI# 22 SMI NC11 94
22 PM_BATLOW# 2 1 23 PWUREQ
D18 SW1010CPT 99 CC-SET NBSWON# R623 10K_4
DA0 CC-SET 43
100 CV-SET
DA1 CV-SET 43
SCI# 31 DA output 101
22 SCI# IOPD3/ECSCI DA2 VADJ 25
102 VFAN
DA3 VFAN 30
GATEA20 2 1
20 GATEA20
D31 SW1010CPT 5 32
GA20/IOPB5 IOPA0/PWM0 LCD_ON 25
RC IN# 2 1 6 33
20 RCIN# KBRST/IOPB6 IOPA1/PWM1 INTERNET# 24
PCLK_541 D32 SW1010CPT 36 BATT_TYPE I/O Address
PWM IOPA2/PWM2 BATT_TYPE 43
IOPA3/PWM3 37 AMP_VOLMUTE# 35
MX0 71 or PORTA 38 R318 *0_4 BADDR1-0 Index Data
29 MX0 KBSIN0 IOPA4/PWM4 TV_SENSE# 31
R320 MX1 72 39
29 MX1 KBSIN1 IOPA5/PWM5 MAIL# 24
*22_4 MX2 73 40 00 2E 2F
29 MX2 KBSIN2 IOPA6/PWM6 L1-SKYPE# 24
MX3 74 43 CRT_SENSE#
29 MX3 KBSIN3 IOPA7/PWM7 CRT_SENSE# 24
MX4 77 01 4E 4F
29 MX4 KBSIN4
MX5 78 153
29 MX5 KBSIN5 IOPB0/URXD SRS_EN 34
C538 MX6 79 154 10 (HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
29 MX6 KBSIN6 IOPB1/UTXD ECO# 24
*10P-50V_4 MX7 80 Key matrix scan 162
29 MX7 KBSIN7 IOPB2/USCLK SKYPE# 24
163 MBCLK 11 Reserved
IOPB3/SCL1 MBCLK 30,44
MY0 49 PORTB 164 MBDATA
29 MY0 KBSOUT0 IOPB4/SDA1 MBDATA 30,44
C MY1 50 165 C
29 MY1 KBSOUT1 IOPB7/RING/PFAIL L2-SKYPE# 24
MY2 51
29 MY2 KBSOUT2
MY3 52 168 REFON
29 MY3 KBSOUT3 IOPC0 REFON 44
MY4 53 169
29 MY4 KBSOUT4 IOPC1/SCL2 L1-ECO# 24
MY5 56 170 D17 BAS316
29 MY5 KBSOUT5 IOPC2/SDA2 L2-ECO# 24
MY6 57 171 1 2 R622 *10K_4
29 MY6 KBSOUT6 IOPC3/TA1 DNBSWON# 22
MY7 58 PORTC 172 FANSIG CRT_SENSE# VCC3
29 MY7 KBSOUT7 IOPC4/TB1/EXWINT22 FANSIG 30
MY8 59 175
29 MY8 KBSOUT8 IOPC5/TA2 DSC_POWERON# 25
MY9 60 176 LID#
29 MY9 KBSOUT9 IOPC6/TB2/EXWINT23 LID# 25
MY10 61 1 PWROK_1 R319 0_4 R622,R623, no stuff if is OK can del in B stage
29 MY10 KBSOUT10 IOPC7/CLKOUT ECPWROK 6,17,22
MY11 64
29 MY11 KBSOUT11
MY12 65 26
29 MY12 KBSOUT12 IOPD0/RI1/EXWINT20 PWRBTN_CIR# 31
MY13 66 PORTD-1 29 AC IN
29 MY13 KBSOUT13 IOPD1/RI2/EXWINT21 ACIN 43
MY14 67 30
29 MY14 KBSOUT14 IOPD2/EXWINT24 CIR_ALWON# 31
MY15 68
29 MY15 KBSOUT15
2 NBSWON#
IOPE4/SWIN NBSWON# 24
VCC5 105 44 SUSB#
TINT PORTE IOPE5/EXWINT40 SUSB# 22
106 TCK IOPE6/LPCPD/EXWIN45 24
107 25 CLKRUN#
TDO JTAG debug port IOPE7/CLKRUN/EXWINT46 CLKRUN# 22,26
R286 R293 108 TDI ENV0
4.7K_4 4.7K_4 109 TMS IOPH0/A0/ENV0 124
125 ENV1
IOPH1/A1/ENV1 BADDR0
110 PSCLK1/IOPF0 IOPH2/A2/BADDR0 126 portA, portB, portC, portC, portE4,6,7,
111 127 BADDR1 portF, portQ0,1,2 all internal pull-high,
PSDAT1/IOPF1 IOPH3/A3/BADDR1 TRIS
114 128
115
PSCLK2/IOPF2 PORTH IOPH4/A4/TRIS
131 SHBM programmable
TPCLK PSDAT2/IOPF3 PS2 interface IOPH5/A5/SHBM A6
30 TPCLK 116 132 U31
TPDATA PSCLK3/IOPF4 IOPH6/A6 A7 ENV0 D0
30 TPDATA 117 PSDAT3/IOPF5 IOPH7/A7 133 21 A0 D0 25
CAPSLED# 118 ENV1 20 26 D1
24 CAPSLED# PSCLK4/IOPF6 A1 D1
NUMLED# 119 138 D0 BADDR0 19 27 D2
24 NUMLED# PSDAT4/IOPF7 IOPI0/D0 A2 D2
139 D1 BADDR1 18 28 D3
IOPI1/D1 D2 TRIS A3 D3 D4
IOPI2/D2 140 17 A4 D4 32
141 D3 SHBM 16 33 D5
541_32KX1 PORTI IOPI3/D3 D4 A6 A5 D5 D6
158 32KX1/32KCLKOUT IOPI4/D4 144 15 A6 D6 34
145 D5 A7 14 35 D7
R526 20M_6 541_32KX2 IOPI5/D5 D6 A8 A7 D7
160 32KX2 IOPI6/D6 146 8 A8
147 D7 A9 7 10 VCC1_PWROK
R527 IOPI7/D7 A10 A9 RESET#/NC
36 A10 RY/BY#/NC 12 T187
A1A 7/8 change 121K to 62K 150 R D# A11 6 29
PORTJ-1 IOPJ0/RD W R# A12 A11 NC1
IOPJ1/WR0 151 5 A12 NC2 38
1
2
B B
62K/F_6 A13 4 11
Y4 A14 A13 NC3
SELIO 152 3 A14
A15 2 31 3VPCU
32.768KHZ A16 A15 VCC
24 PWRLED# 62 IOPJ2/BST0 IOPD4 41 L-MAIL# 24 1 A16 VCC 30
63 42 A17 40
L-INTERNET# 24
4
3
USBON# IOPJ3/BST1 PORTD-2 IOPD5 A18 A17

29 USBON# 69 IOPJ4/BST2 IOPD6 54 BAT/AC# 43 13 A18
70 PORTJ-2 55 A19 37
24 SUSLED# IOPJ5/PFS IOPD7 CHG# 43 A19
24 BATLED0# 75 IOPJ6/PLI GND 23
C774 C770 76 143 A8 CS# 22 39
24 BATLED1# IOPJ7/BRKL_RSTO IOPK0/A8 CE# GND
15P 15P 142 A9 R D# 24
IOPK1/A9 A10 W R# OE#
31 RF_EN 148 IOPM0/D8 IOPK2/A10 135 9 WE#
BT_ON# 149 PORTK 134 A11
30 BT_ON# IOPM1/D9 IOPK3/A11
155 130 A12
22 RSMRST# IOPM2/D10 PORTM IOPK4/A12
*0 R317 156 129 A13 SST39VF080
31 TV_POWERON# IOPM3/D11 IOPK5/A13/BE0
VRON 3 121 A14
37 VRON IOPM4/D12 IOPK6/A14/BE1
MAINON 4 120 A15
35,38,39,40,41,42 MAINON IOPM5/D13 IOPK7/A15/CBRD
SUSON 27
41,42 SUSON IOPM6/D14 3VPCU
28 113 A16
41 RVCC_ON IOPM7/D15 IOPL0/A16
112 A17
CS# PORTL IOPL1/A17 A18
173 SEL0 IOPL2/A18 104
174 103 A19 R521
SEL1 IOPL3/A19 T91
47 CLK IOPL4/WR1 48
10K_4
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7
VCC1_PWROK
NC10
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
1
PC87541 C764
17
35
46
122
159
167
137
96
11
12
20
21
85
86
91
92
97
98
.1U-10V_4
2
C541
change PN to 87541
nicole 01/11/07 1U-16V_6
1 2 HWPG
40 PG_1.5V
D9 SW1010CPT
40 MCHPG 1 2
D10 SW1010CPT
A
38 PG_EXT_VGA 1 2 A
D11 E@SW1010CPT
39 PG_INT_VGA 1 2
D12 *I@SW1010CPT
41 PG_SYS 1 2
D13 SW1010CPT
42 PG_DDR 1 2
D14 SW1010CPT
40 PG_LDO 1 2
D15 SW1010CPT
PROJECT : CH3
PC87541&FLASH 1A

5 4 3 2 1
5 4 3 2 1
VCC5 VIN_SC452
PL7
VIN
37
BLM21PG220SN1D
2
PC51 PC21 PC31 PC25 PC135 PC145 PC16
+
PL8
470u/25V
10U/25V/X6S/1206
10U/25V/X6S/1206
*10U/25V/X6S/1206
0.1U/50V/X7R/0603
2200P/50V/X7R/0402
VIN_SC452 1u/25V/X5R/0603
1
PD9 PR135 PR4
CH551H-30PT-30V-0.5A PQ17 *2.2R/0603/J BLM21PG220SN1D
1
D 10R/0603/F NTMFS4707NT1G D
5
PC45
0.1U/50V/X7R/0603
PC4
V-RC1 4
2
PC22
PC136 *2200P/50V/X7R/0603
1
2
3
PR31 1U/25V_X5R/0603
1
100R/0402/F
2 2A
1000P/50V/X7R/0402
PC32
PR136 *0R/0402 PR30 .015U/16V/X7R/0603 PL6
CS1P PQ7 PQ20 0.36uH 30A
7.5K/0603/F NTMFS4119NT1G NTMFS4119NT1G
DRN1
3,6,20 H_DPRSTP#
PR137 0R/0402
36 VRON
1
PR134 499/0603/F Z2902 TG1
6,22 DPRSLPVR
PD7
VPN1
DRN1
VCC3 BG1 4 4 EC31QS03L/30V/3A
ISH
2
Max Current 44A
1
2
3
1
2
3
PU6
44
43
42
41
40
39
38
37
36
35
34
PR39
680/0603/F PC34
EN
NC
ISH
DPRSL
VPN1
VIN1
BST1
TG1
DRN1
BG1
V5_1
0.1U/50V/X7R/0603
PC139 100P/50V/X7R/0402
22 VR_PWRGD_CK410#
CLK_EN#
1 CLKEN# CS1+ 33 4 4A
PR38 2 1 24K/0402/F PR139 VREF_452 2 32 CS1N VCC_CORE
120K/0603/F HYS VREF CS1- CS2N
CS1N
3 HYS CS2- 31
CLSET 4 30
PR146 160K/0603/F PR141 VID6 CLSET CS2+ Z2906 PR40 0R/0603 VCC_CORE
4 CPU_VID6 5 VID6 ERROUT 29
C 130K/0603/F VID5 VCCA C
4 CPU_VID5 6 VID5 VCCA 28
470U/2.5V_7343/12m/1.9
470U/2.5V_7343/12m/1.9
470U/2.5V_7343/12m/1.9
470U/2.5V_7343/12m/1.9
PC42 100P/50V/X7R/0402 VID4 7 27
4 CPU_VID4 VID4 SC452 AGND
PC140
470U/2.5V_7343/12m/1.9
VID3 8 26 DAC PR41
4 CPU_VID3 VID3 DAC
PC198
0.1U/50V/X7R/0603
PC132
PC142
PC149
PC138
VID2 9 25 SS
4 CPU_VID2 VID2 SS
1
PC35 1000P/50V/X7R/0402 VID1 10 24 2K/0603/F PR140 0R/0603
4 CPU_VID1 VID1 DRP+
2
VID0 11 23 PC44 PC41 PC40 + + + + +
4 CPU_VID0 VID0 PWRGD DRP- PC46 100P/50V/X7R/0402
CS2N
E-RC VIN_SC452
1000P/50V/X7R/0402
1U/25V/X5R/0603
DRN2
VCC3 VPN2
BST2
V5_2
GND
VIN2
PSI#
BG2
2
TG2
FB+
FB-
0.01U/50V/X7R/0603
PC37
PR154 PR155
45
12
13
14
15
16
17
18
19
20
21
22
PC148 680/0603/F 560P/50V/X7R/0603
*.1U/10V/X5R/0402 PC49 PC47 PC146 PC48 PC50
1K/0603/F NTMFS4707NT1G
10U/25V/X6S/1206
*10U/25V/X6S/1206
0.1U/50V/X7R/0603
10U/25V/X6S/1206
2200P/50V/X7R/0402
PQ22
22 DELAY_VR_PWRGOOD
5
VREF_452
3 PM_PSI#
PR156 10R/0603/F FB+ Update this net name PR3
4 VCCSENSE
PR152 10R/0603/F FB- nicole 9/29 4 *2.2R/0603/J
4 VSSSENSE
DRP-
1
2
3
DRP+
PC1
PR143
CS2P
DRN2
*2200P/50V/X7R/0603
PC39 .015U/16V/X7R/0603
7.5K/0603/F 2 2A
VPN2
TG2 PL9
PQ21 PQ8 0.36uH 30A
1
BG2 NTMFS4119NT1G NTMFS4119NT1G
PD8
B DRN2 B
4 4 EC31QS03L/30V/3A
PR44
2
PC52
1
2
3
1
2
3
2
Delete Curent Sensor:

100R/0402/F PC147
1000P/50V/X7R/0402
V-RC2 1u/25V_X5R/0603
PR158, PR161,159,160
1
VIN_SC452
1
CS1N PD5
PC43
TH 0.1U/50V/X7R/0603 CH551H-30PT-30V-0.5A
PR22 PR25
2
2 1 DRP_L1 2 1 VCC5
2
18.2K/0402/F 33K/0402/F PC26

PR28 PR138
DRN1 2 1 2 1 1U/25V/X5R/0603
1
PC29 .022U/16V/X7R/0603
2
30.1K/0402/F 47K/0402/F PC144

PR46
47K/0402/F *100P/50V/X7R/0402
1
D CR_DR1 2 1 DRP+
PR45
68P/50V/COG/0402
D CR_DR2 2 1
PC143
1
A PR47 47K/0402/F
PR157 A
DRN2 2 1 2 1 PR148
PC141 .022U/16V/X7R/0603 30.9K/0603/F
30.1K/0402/F 47K/0402/F all resistor footprints in this aera all changed to 0402, except PR148
P/N need Terry update to meet footprint.
2
PR145 PR42
2 1 DRP_L2 2 1
nicole 06/11 PROJECT : CH3
DRP-
18.2K/0402/F 33K/0402/F Quanta Computer Inc.
1
PC24
CS2N TH *100P/50V/X7R/0402 Size Document Number Rev

2
CPU CORE ( SC452 ) 1A

5 4 3 2 1
5 4 3 2 1
39
D D
VIN_1993 5VPCU
PL11
E@HI0805R800R-10_8
PR165 E@20R/0603_F
VIN
VGA_P_VCC
PC80 PC70 PC81 PC83 PC152 PC154 VCC3
E@10U/25V/X6S/1206 E@10U/25V/X6S/1206 [email protected]/50V/X7R/0603 E@2200P/50V/X7R/0402 E@1U/10V/X5R/0603 E@1U/10V/X5R/0603
PD17
E@RB500V-40/UMD2
VGA_BST
19
24
22
VIN_1993
PR176
VDD
VCC
OVP/UVP
5
C PR72 14 E@100K/0402/F C
PQ40 E@0R0402 V+
17 BST
POK 4 PG_EXT_VGA 36
E@AOL1414 4 1993_DH 15
DH PR78 *0R/0402
LSAT 3
20A
3
2
1
PC61 23 PR167 E@0R/0402
SHDN MAINON 35,36,39,40,41,42
[email protected]/50V/X7R/0603
1993_LX 16 LX 21
VGACORE_G73 GATE V_PWRCNTL 17
PL15
[email protected] 25A 7 VGA_REFIN PR82 E@75K/0603/F VGA_P_REF PC153
REFIN
8
7
6
5
8
7
6
5
PQ11 PQ38 PU7 *[email protected]/25V/X7R/0603
E@AO4456 E@AO4456 18
PC72 + + 1993_DL DL E@MAX1993
4 4
[email protected]/50V/X7R/0603 PC65 PC159 PR83 PR85 PC68
E@470U/2.5V/H1.8 E@470U/2.5V/H1.8 20 E@91K/0603/F E@470P/50V/NPO/0402
E@698/0603/F GND
3
2
1
3
2
1
OD 8
11 CSP
PC73 V_PWRCNTL NB8P-SE
2006-0120 12 CSN
PR182 LO 1.2V Vo=VREF*(PR85+PR182)/(PR82+PR85+PR182)
[email protected]/10V/X7R/0603 1 [email protected]/0402/F
TON
VGA_CSP 10 OUT HI 1.1V Vo=VREF*PR85/(PR82+PR85)
FBLANK
6 VGA_P_REF
REF
9
SKIP
ILIM
FB
TON= REF F=450k
PR180 PC155
13
5
E@140K/0402/F E@1U/10V/X5R/0603
Add Low Side MOS
B B
OCP 35A PC160 PR181

E@470P/50V/Y5V/0402 E@100K/0402/F
PR73 short
A A
PROJECT : CH3
VCORE 3B

5 4 3 2 1
1 2 3 4 5
39
5VPCU
f=298KHz
A A
PR192
*I@10R/0402/J PD18
*I@RB500V-40/UMD2
PC170
8776VCC *I@1U/10V/X5R/0603
PL18 *I@33/6A VIN
PC177 VIN_8776
*[email protected]/10V/X5R/0603 8776BST_R
PC178 PC174 PC175 PC173 PC171 PC169

3VSUS 3VSUS
*[email protected]/50V/X7R/0603
*[email protected]/50V/X7R/0603
*I@2200P/50V/X7R/0402
*I@2200P/50V/X7R/0402
*I@10U_25V/X6S/1206
*I@10U_25V/X6S/1206
VIN_8776
PR187 PC165
*I@0R/0603 *[email protected]/16V/X7R/0603
5
6
7
8
PR212
*I@200K/0603/F
PR210 PR218 Delete Current Sensor
16
19
4
PU9
*I@22K/0402/J *I@100K/0402/F
7 PQ41 PR188 1/22 Terry
VCC
VDD
TON *I@AO4408
1
2
3
8776BST
BST 24
7.7A
22 8776LX PL17 *[email protected] 30a +VGFX_CORE
LX
36 PG_INT_VGA 1 PWRGD +VGFX_CORE
5
6
7
8
23 8776DH
DH PQ45
20 8776DL 4 *I@AO4410 PR189 PC184 PC183 PC186
DL
*I@330UF_2V_7mohm/2.8
*I@330UF_2V_7mohm/2.8
*[email protected]/0603/F + +
*[email protected]/25V/X7R/O0402
GVR_VID4 25 21
GVR_VID0 D0 PGND
6 GVR_VID0 26
1
2
3
GVR_VID1 D1 PC172
B
6 GVR_VID1 27 D2
B
GVR_VID2 28 *I@1nF/50V/X7R/0402 PR195 PR205
6 GVR_VID2 D3
GVR_VID3 29
6 GVR_VID3 D4
GND 33
*[email protected]/0402/F *I@10K/NTC/0603
update per design guide v1.1 pin 33 is thermal PAD
9/29
PR219 *I@0R/0402 14 8776CSP
CSP
32
PR204 *I@0R/0402 SKIP PC179 *[email protected]/10V/X5R/0402
35,36,38,40,41,42 MAINON 31 13
PR202 *I@0R/0402 SHDN CSN
30 STDBY
2 OFS
PC187 *I@1000P/50V/X7R/0402 PR207 PR201
8 10 *[email protected]/0402/F *I@10R/0402/J Loadline=-8mV/A
CCV FB VCC_SENSE
PR214 *[email protected]/0603/F
6 PC182
TIME *I@1000P/50V/X7R/0402 PR208
PC188 *[email protected]/10V/X7R/0603 *I@10R/0402/J
8776REF 9 REF
PR206 +VGFX_CORE
8776VCC 15 *I@10R/0402/J
GND
11 VSS_SENSE
*I@MAX8776 GNDS
PR203 *I@10K/0402/F
5 PC181
C THRM *I@1000P/50V/X7R/0402 PR211 C
IC1 12 8776VCC
3VSUS *I@10R/0402/J
PR213 17 GVR_VID0
**I@10K/NTC/0603 N.C. GVR_VID1
4 18 GVR_VID3
PR215 VRHOT IC2 GVR_VID4
*I@100K/0402/F 3 POUT
PR216
*I@10K/0402/J PR200 PR193 PR197 PR198
*I@22K/0402/J *I@22K/0402/J*I@22K/0402/J *I@22K/0402/J
PC180
*[email protected]/10V/X5R/0402 update per design guide v1.1
01/11
PR109 short
D D
PROJECT :CH3
GMCH (MAX8776) 1A

1 2 3 4 5
5 4 3 2 1
VCCP&VCC1.5V&VCC1.25&VGA1.2 41
VIN
VIN_51124_150 VIN
D D
PL13 PL14
VIN_51124_105
FBMJ3216HS800-T/1206 FBMJ3216HS800-T/1206
0.1U/25V/X7R/0603
0.1U/25V/X7R/0603
0.1U/25V/X7R/0603
0.1U/25V/X7R/0603
2200P/50V/X7R/0603
2200P/50V/X7R/0603
2200P/50V/X7R/0603
2200P/50V/X7R/0603
PC93 PU3
PC82 PC164
10U/25V/X6S/1206 TPS51124
PC87
PC90
PC85
PC92
10U/25V/X6S/1206 10U/25V/X6S/1206
PC77
PC64
8
7
6
5
PC71
PC66
V CCP VCC1.5
5
6
7
8
PQ39 4
1
VCCP @ 4.5A AO4468
PR79 PR184 4
VO2
TON
GND
VO1
51124BST2 9 22 51124BST1 PQ43
BST2 BST1
VCCP Delete Current Sensor 0R/0603 51124DH2 0R/0603 PC86 AO4468
10 21 51124DH1
1
2
3
PR76 1/22 Terry DH2 DH1
PL10 PC63 0.1U/25V/X7R/0603 0.1U/25V/X7R/0603 PL16 6A
3.8UH/CHOKE-MSCDRI-104R 3.8UH/CHOKE-MSCDRI-104R
3
2
1
V CCP 51124LL2 11 20 51124LL1 VCC1.5 VCC1.5
LL2 LL1
PC74
V CCP VCC1.5
PC79
8
7
6
5
5
6
7
8
PR71 51124DL2 12 19 51124DL1 PR100
PR178 DL2 DL1 PR92
*2.2R/0603/J
*2.2R/0603/J
330UF_2V_7mohm/2.8
470U/2.5V_7343/12m/1.9
Delete Current Sensor
0.1U/25V/X7R/0603
100P 50V(+-5%,NPO,0603)EP
C 8.06K/0603/F 20K/0603/F C
PR101 1/22 Terry
100P 50V(+-5%,NPO,0603)EP
*2200P/50V/X7R/0603
+ 4 FB2 5 2 FB1 4 +
FB2 FB1 PC161
FDS6690AS_NL 0.1U/25V/X7R/0603
PC75
PC167
PC158
8 EN2 EN1 23
PC60 PQ37 PC97
*2200P/50V/X7R/0603 PQ46
*1U/10V/X5R/0603
14 17
PGOOD2
PGOOD1
PR179 PR89
1
2
3
3
2
1
TRIP2 TRIP1
PGND2
PGND1
V5FILT
20K/0603/F FDS6690AS_NL 20K/0603/F
V5IN
2
PR175
PC62
PR87
13
15
16
24
18
8.45K/0603/F
6.49K/0603/D Vo=0.75Vx(1+R1/R2)
Vo=0.75Vx(1+R1/R2)
1
PR183 0R/0402
MAINON 35,36,38,39,41,42
2
PR173 0R/0603
PC76
35,36,38,39,41,42 MAINON PC89
PR90 10R/0603/J
10U/10V/Y5V/0805
1
10U/10V/Y5V/0805
36 MCHPG PG_1.5V 36
2
PR166 short PR172 PR96
100K/0603/F 100K/0603/F 5VSUS
5VSUS
1
1
B B
2
PR70
100K/0603/F
1
PU5 PG_LDO PU4
36 PG_LDO
PG_LDO
G966-25ADJF1UF VCC1.25 PR104 0R/0402 E@G966-25ADJF1UF VGA1.2V
35,36,38,39,41,42 MAINON
1 5 2.5A 100 mils PC202 1 5 2A 80 mils
PR106 0R/0402 966EN_1 2 POK NC 966EN_2 POK NC
35,36,38,39,41,42 MAINON VEN VO 6 2 VEN VO 6
*4.7U/6.3V/X5R/0603
5VSUS 4 VPP PR103 7.15K/0603/F 5VSUS 4 VPP PR102 [email protected]/0603/F
PGND
PGND
7 7
GND
GND
ADJ ADJ
VCC1.5 3 VIN VCC1.5 3 VIN
R1 PC108
R1 PC106
9
8
9
8
PC102 PC107 PR105 0.1U/25V/X7R/0603 PC101 PC105 PR107 [email protected]/25V/X7R/0603
PC103 PC109
0.1U/25V/X7R/0603 10U/6.3V/X5R/0805 R2 12K/0603/F
10U/6.3V/X5R/0805
[email protected]/25V/X7R/0603 E@10U/6.3V/X5R/0805 R2 E@12K/0603/F
E@10U/6.3V/X5R/0805
change PR105, PR107 PN

nicole 01/11/07
PU4 close to GPU
A
Vo=0.8*(1+R1/R2) Vo=0.8*(1+R1/R2) A
PROJECT : CH3
VCCP(1.05V)/VCC1.5 1A

5 4 3 2 1
1 2 3 4 5
3VPCU& 5VPCU& 2.5V& Discharge

PR117 10R/0603/J
VIN_8734_3V
PL21
VIN
FBMJ3216HS480NT/1206
41
PD1.2
PD12
UDZS5.6B TE17
2
PR118 PC120 PC194
PC117 PC119 PC116 PC111 PC114 PC104
10K/0603/F 0.1U/25V/X7R/0603
5
6
7
8
1U/25V/X5R/0603 0.1U/25V/X7R/0603 *10U/25V/X5R/1206 10U/25V/X5R/1206 10U/25V/X5R/1206 *10U/25V/X5R/1206 10U/25V/X5R/1206
A
8734_SHDN#
Delete Current Sensor A
4
PR119 1/22 Terry
PQ49
AO4468 PL22
PR227 3VPCU 3VPCU PQ14 AO4468
8734_SKIP# 5.2UH/CHOKE-MSCDRI-104R 5A 200 mils 40mils 1A
3
2
1
100K/0603/J 8 1
7 2 3VSUS
5
6
7
8
6 3
PR225 5
PR122
PR125
0R/0603 4 *0R/0603 + PC196 PC122 PC121
4
8734LDO3 *2.2R/0603/J
PQ50 FB3 330U/6.3V_7343/2.8 1U/10V/X5R/0603 0.01U/50V/X7R/0603 SUSD
PU10 FDS6680AS
MAX8734AEEI+ PC125 PR124
PR229 3VPCU
3
2
1
PR231 0R/0603 *2200P/50V/X7R/0603 0R/0603
100K/0603/J 1 28 8734BST3
N.C BST3
5
8734PG 2 27 8734LX3
36 PG_SYS PGOOD LX3
VIN
3 26 8734DH3
ON3 DH3 VIN_8734_5V PL20
PC123
8734LDO5 4 25 8734LDO3 FBMJ3216HS480NT/1206
ON5 LDO3
1U/10V/X5R/0603 PC124
ILIM3 5 24 8734DL3 PQ13
ILIM3 DL3 0.22U/16V/X7R/0603 AO4812
PR228 0R/0603 8734LDO5
30 SYS_SHDN# 6 23 1
4
SHDN GND
FB3 7 FB3 OUT3 22 3VPCU 3
PD19
DAP202UT106
PC191 PC189 PC185 3.2A 120 mils
PC118 1U/10V/X5R/0603 VCC3 RVCCD
8734REF 8 21 5VPCU 2
REF OUT5 0.1U/25V/X7R/0603 10U/25V/X5R/1206 *10U/25V/X5R/1206
5
6
7
8
B FB5 9 20 8734V+ PC192 MAIND RVCC3 B
FB5 V+ PC127
100K/0603/J 0.22U/16V/X7R/0603
PR226 8734DL5 4.7U/16V/X5R/1206
10 PRO DL5 19 35 mils
ILIM5 8734LDO5
4 Delete Current Sensor
11 ILIM5 LDO5 18
PR115 47R/0603/J PR112 1/22 Terry
8734_SKIP# 12 SKIP VCC 17 8734VCC PQ48
PR220 0R/0603 5VPCU
8734VCC 8734TON 13 16 8734DH5 AO4468 PL19
TON DH5 3.8UH/CHOKE-MSCDRI-104R 6A 240 mils
3
2
1
8734BST5 14 15 8734LX5 5VPCU
BST5 LX5
5
6
7
8
PC193
PR120
1U/10V/X5R/0603 PR111
4 *0R/0603
PR126 short *2.2R/0603/J + PC190 PC113 PC112
PQ47 FB5
330U/6.3V_7343/2.8 0.01U/50V/X7R/0603 1U/10V/X5R/0603
PR113 0R/0603 FDS6680AS
PC110 PR116
3
2
1
*2200P/50V/X7R/0603 0R/0603
5VPCU
PR127 0R/0603
5
8734REF 8734DL3
5VPCU 5VSUS 3VSUS 1.8VSUS 15VPCU

PC126 PC195
PR222 PR114
150K/0603/F 150K/0603/F 0.01U/50V/X7R/0603 0.01U/50V/X7R/0603
PQ12
PR63 PR61 PR60 PR59 PR68
3
AO4812
C ILIM3 ILIM5 100K/0603/J 22R/0603/J 22R/0603/J 22R/0603/J 1M/0603/J C
4
PD20 PD13
SUSG SUSD 2.6A
BAT54S BAT54S 5VSUS MAIND
3
PR230
3A
2
PR223
3
75K/0603/F 75K/0603/F SUSD
15VPCU 5VPCU VCC5
36,42 SUSON 2 2 2 2 2 PC59
PC197 PC115 *0.01U/50V/X7R/0603
1
0.1U/25V/X7R/0603 0.1U/25V/X7R/0603
1
PQ31 PQ30 PQ29 PQ28 PQ35
DTC144EUEUA-7-F 2N7002E-T1-E3 2N7002E-T1-E3 2N7002E-T1-E3 2N7002E-T1-E3
5VPCU RVCC3 15VPCU

5VPCU VCC5 VCC3 VCC1.5 VGACORE_G73 +VGFX_CORE 15VPCU
PR65 PR66 PR67

PR62 PR56 PR50 PR53 PR64 PR69 PR48 100K/0603/J 22R/0603/J 1M/0603/J
100K/0603/J 22R/0603/J 22R/0603/J 22R/0603/J E@22R/0603/J *I@22R/0603/J 1M/0603/J
MAING MAIND RVCCG RVCCD

MAIND 42
3
3
3
PC53
D 35,36,38,39,40,42 MAINON MAINON 2 2 2 2 2 2 2 2 2 2 PC58 D
36 RVCC_ON
*0.01U/50V/X7R/0603
*0.01U/50V/X7R/0603
1
1
1
PQ27 PQ26 PQ24 PQ25 PQ9 PQ10 PQ23 PQ32 PQ33 PQ34
DTC144EUEUA-7-F 2N7002E-T1-E3 2N7002E-T1-E3 2N7002E-T1-E3 E@2N7002E-T1-E3 *I@2N7002E-T1-E3 2N7002E-T1-E3 DTC144EUEUA-7-F 2N7002E-T1-E3 2N7002E-T1-E3
PROJECT : CH3
3V / 5V 1A

1 2 3 4 5
5 4 3 2 1
1.8VSUS & VCC1.8 & SMDDR_VTERM 42
D D
VIN 5VPCU
PL2
VIN_TPS51116
FBMJ3216HS800-T/1206
OCP 20A
PC99 PC98 PC100 PC166 PR99 PC168
PC95 PC96 PC94
16.5K/0603/F
0.1U/25V/X7R/0603 0.1U/25V/X7R/0603 2200P/50V/X7R/0603 PD11 10U/6.3V/X5R/0805 0.01U/50V/X7R/0603
10U/25V/X6S/1206 10U/25V/X6S/1206 10U/25V/X6S/1206
RB500V-40/0.1A/UMD2
5VPCU
51116CS
2
PR186
14
15
PR52
8
7
6
5
0R/0603
51116BST 20 100K/0603/F
CS
V5IN
VBST
1
PQ44 4 51116DH 19 13 51116_PG
DRVH PGOOD PG_DDR 36
PR91 and PR97 1/22 Terry S5 12 51116S5 PR185 0R/0402
SUSON 36,41
AO4468 11 51116S3 PR98 0R/0402 MAINON
S3 MAINON 35,36,38,39,40,41
1.8VSUS
PC91
1
60 mils 1.8VSUS
0.1U/25V/X7R/0603 VLDOIN
1.8V / 12A 400 mils PL12
PC67
1
2
3
1.8VSUS 51116LX 18
LL
PR74 1/23 Terry
0.45uH 25A 10U/6.3V/X5R/0805
8
7
6
5
PC162 PC163
+ + PC84 PR95
470U/2.5V_7343/12m/1.9
470U/2.5V_7343/12m/1.9
*2.2R/0603/J 2 SMDDR_VTERM SMDDR_VTERM

VTT
0.1U/25V/X7R/0603
C 4 51116DL 17 PR170 C
DRVL SMDDR_VTERM
VTTSNS 4
16 PGND MODE 6 0R/0603
PC88 21
PR168 GND1 PC157 PC78 PC151
PQ42 PR84
*0R/0603 *2200P/50V/X7R/0603
1
2
3
FDS6680AS 3 *0R/0603 10U/6.3V/X5R/0805 10U/6.3V/X5R/0805 0.1U/25V/X7R/0603
5VPCU VTTGND
9 VDDQSNS VTTREF 7
PR51 51116FB 10 VDDQSET
GND2
GND3
GND4
GND5
GND6
GND7
VDDQSET 0R/0402
GND
GND = 2.5V 8 COMP
PR77 PR86 0R/0603
5V = 1.8V *0R/0603
22
23
24
25
26
27
5
R = 1.5~3V SMDDR_VREF
PU8
TPS51116
PC69
0.033U/25V/X7R/0603
PR164 short
VCC1.8
PQ36 1.8VSUS
AO4704
B 3A 1 8
B
2 7
3 6
5
1
PC156
4
0.1U/16V/X7R/0603
2
41 MAIND
A A
PROJECT : CH3
1.8VSUS /SMDDR_VTERM 1A

5 4 3 2 1
5 4 3 2 1
Battery Charger
VA
43
AC ADAPTOR IN CONN PL4
E E
FBMJ3216HS480NT/1206 PD15
*SSM34PT PR129 PQ15 AO4407 PQ16 AO4407
VIN
PF1
PJ2 PL3
RES 0.01R 2W +-2%/7520
1 8 1 8
1 PJ1.1 PF1.1 CS_IN 2 1 CS_OUT 2 7 2 7
2 PD16 3 6 3 6
1000P/50V/X7R/0603
3.3N/50V/X7R/0402
0.1U/25V/X7R/0603
FBMJ3216HS480NT/1206 FUSE 10A 0453010.MR
0.1U/25V/X7R/0603
3 2P 1P 5 5
0.1U/25V/X7R/0603
SSM34PT
4
PR11
220K/0603/F
4
88291-0400-4P-R PC7 33K/0603/F
PR128
PR5
8724CSSN
8724CSSP
PD14
PC199 10K/0603/F
PC128
PC2
PC5
PC3
SSM34PT 0.1U/25V/X7R/0603
PD2
PR10
1SS355/UMD2/80V/100mA
2.2K/0603/F
Add 3.3N CAP for EMI suggestion
Nicole 12/11
220K/0603/F
3
PR17 PR14
PR8
1 6
0R/0603 0R/0603
2 5 2
PQ1
PD1 3 4 2N7002E-T1-E3
UDZS15B-7-F
1
PC131 PC133 PQ4
D PR6 4.7K/0603/F IMD2AT108 D
*0.1U/25V/X7R/0603 *0.1U/25V/X7R/0603
36 ACIN BAT/AC# 36
2
PR7 PR15 PC6
4.7K/0603/F 1U/25V/X5R/0603
470K/0603/J
1
VIN
CELLS PR35 *0R/0402 REFIN
REFIN PL1
DCIN
VIN
3VPCU PR49 *0R/0603 FBMJ3216HS480NT/1206
Vout 5.4V
PR37 33R/0603/J
8724_LDO PC38 PC33 PC28
PR23 PR132
8724_LDO 0.1U/25V/X7R/0603 10U/25V/X5R/1206 0.1U/25V/X7R/0603
27
26
PC36 PC30
1.33K/0603/F 825/0603/F
CSSP
CSSN
CELLS 17 1U/10V/X5R/0603 1U/10V/X5R/0603
PR34 1 DCIN
LDO 2
*0R/0603
Set to 1.67V 10 ACIN DLOV 22 8724_DLOV
1
2
4+0.4*VCTL/REFIN PR24 2.2R/0603/J
PR36 0R/0603 24 PD6
C VCTL BST C
36 CV-SET 15 VCTL RB500V-40/0.1A/UMD2
PR27 1K/0603/J PC23 PQ19
ICTL 13 0.22U/16V/X7R/0603 FDS6900AS PR130
36 CC-SET ICTL
Set to 1.67V DHI 25 CHG_DH 8 RES 0.015R 1W +-2%/3720
3
REFIN 12 PL5
5*VICTL/REFIN=2.5A PR29 0R/0603
REFIN
23 CHG_LX 7 Ichg+ 1 2 MBAT+
LX MBAT+
36 CHG# 2 6
PC15 11 21 CHG_DL 5 6.8uH 1P 2P
ACOK DLO
PQ5 0.1U/16V/X7R/0603 8724ICHG 9 20 PC129 PC134 PC137 PC200 PC201
1
DTC144EUEUA-7-F ICHG PGND PR18

8724IINP 28 19 8724CSIP 3 *2.2R/0603/J 0.1U/25V/X7R/0603 10U/25V/X5R/1206 10U/25V/X5R/1206 3.3N/50V/X7R/0402 3.3N/50V/X7R/0402
IINP CSIP
36,44 TEMP_MBAT 8 SHDN CSIN 18 8724CSIN

PR16 220R/0603/J PC13
8724CCV 7 16 MBAT+
4
CCV BATT VREF *2200P/50V/X7R/0603
Vref = 4.096V
8724CCI 6 4 8724_REF Add two 3.3N CAP for EMI suggestion
CCI REF
Change Sensor Position Nicole 12/11
PR13 PR12 Nicole 12/04
5 CCS CLS 3 8724CLS
1K/0603/J
8724CCS
GND
GND
37.4K/0603/F
0.01U/50V/X7R/0603
0.01U/50V/X7R/0603
14
29
PC9 PU1 PR9 PC8

MAX8724ETI+ 1U/10V/X5R/0603 ICHG=(VICTL/REFIN)*75mV/15mR = 2.5A
PC11
PC10
0.1U/25V/X7R/0603 56K/0603/F
B B
I_INPUT=[56/(40.2+56)]*75mV/10mR = 3.966A. (85W)
8724ICHG 8724IINP REFIN CELLS

BATT-TYPE
1 6
2 5 BATT_TYPE 36 High L ow
PR131 PC130 PR19 PC14 3 4
Li-ion 4S2P
20K/0603/J *1000P/50V/X7R/0603 10K/0603/F *1000P/50V/X7R/0603 Li-ion 4S1P Li-ion 3S2P
PQ18
Ni-MH 8S1P
*IMD2AT108
A A
PROJECT : CH3
BATTERY CHARGER 1A

5 4 3 2 1
5 4 3 2 1
Battery Connector 44
E E
Battery Connector
PN is different for BenQ and NEC. need control in BOM Delete Fuse PF2 and PC254
nicole 11/07 Terry 10/11 MBAT+
PJ1 Read Battery Temperature

5
6 4 TEMP_MBAT 36,43
P_CLK PR20 330R/0603/J
0.1U/25V/X7R/0603
0.01U/50V/X7R/0603
7 3 P_DATA PR21 330R/0603/J
2
1
PR32
BATTERY CN
PC12
PC18
200K/0603/F
47P/50V/NPO/0603
47P/50V/NPO/0603
MBDATA 30,36
D D
MBCLK 30,36
UDZS5.6B TE17
UDZS5.6B TE17
PQ2
PC19
3
PC17
IMD2AT108
PQ6
PD4
PD3
VIN 1 6 REFP 2 REFP
2N7002E-T1-E3
IMD2A
2 5
3 4
1
PC20 MBATV MBATV 36
Read Battery Voltage

0.1U/25V/X7R/0603 REFP
36 REFON PC27 PR33
2
0.01U/50V/X7R/0603 40.2K/0603/F
PR26 10K/0603/F
3VPCU 3VPCU 3 1
PQ3
2N7002E-T1-E3
C C
TEMP_MBAT voltage : MBATV voltage :

System Off System On 16.8V*40.2/(200+40.2)= 2.812V
Li-ion 4S*P
12.0V*40.2/(200+40.2)= 2.008V
Battery 0V 1.6V
Ni-MH 8S1P 8.0V*40.2/(200+40.2)= 1.34V
Adapter 3.3V 3.3V
Battery+Adapter 1.6V 1.6V
B B
A A
PROJECT : CH3
BATTERY CNN 1A

5 4 3 2 1
5 4 3 2 1
CH3 B stage change list

1. P9. Del R117,R217,R233, R496, R485 and R486, update the relative net name. 12/01
CH3 C stage change list
1. P25. Change SW pin definition for not coincident with layout library 01/05/07
45
2. P13. Update SDRAM SMbus clock and data net name 12/01
2. P17. Update GPU PCI device strapping for NB8P-SE 01/11/07
3. P17. Update the HW VRAM strap setting 12/01
3. P35. Change C611, C616 PN 01/11/07
4. P28. Del H27 12/01
D 4. P36. Change U10 PN 01/11/07 D
5. P30. Del R398 12/01

5. P40. Change PR105, PR107 PN 01/11/07
6. P34. Change the capacities of C601 and C604 from 1u to 4.7u for Realtek AE suggestion 12/01
6. Delete CPU_Vcore Current Sensor:PR158, PR159, PR160, PR161 1/22
7. P34. Add digtal MIC array 12/01
7. Delete Current Sensor PR188, PR76, PR101,PR119, PR112, PR91, PR97, PR74 1/22
8. P35. Add R629, R630, R631 and R632, Change C838, C845 from 1u to 4.7u, C616, C611 from 1u to 2.2u . 12/01
8. P33. Change CN20 footprint 1/24
9. P34. Add R635 and R636 in HDA_SDIN signal 12/05
9. P24. Add R643, R644, R645 and R646 1/26
10. P25. Del C6 and C13 for EDID CLK and DATA issue 12/05
10. Delete CPUVcore 0 ohm resistor: PR142, PR144, PR43, PR147, PR149, PR150, PR153 02/01/07
11. P29. Update CN8 signal sequence, cable need update 12/05 11. Delete Max1993 0ohm resistors PR88, PR163, PR171, PR177 02/01/07
12. P34, 35. Del Q28, R620, R621, add R637, R638 and C894 12/06 12. Delete SC452 reserved 0 ohm resistors: PR133, PR151 02/01/07
13. P39. Change PC170 from 10u to 1u 12/06 13. Delete Max8776 Reserved 0 ohm resistors: PR190, PR191, PR194, PR196, PR217, PR209, PC176 02/01/07
C
14. P33. Update CN23 footprint, need new PN 12/06 14. Delete TPS51124 Power Good Reserved 0 ohm resistor: PR80, PR94 02/01/07 C
15. P14. Change R230 footprint to 0402 12/07 15. Delete G966 Power Good Reserved 0 ohm resistor: PR110, PR108 02/01/07
16. P2. Change U19 PN from B version to D version. 12/01 16. Move PC93 behind PL13 02/01/07
17. P24, P36. Change quick button function definition 12/08 17. Delete Max8734 Reserved 0 ohm resistors: PR123, PR221, PR121, PR224 02/01/07
18. P25. Change CN13 footprint from SMT to DIP. 12/04 18. Delete TPS51116 PC150, PR162, PR93, PR169, PR75 02/01/07
19. P41. Change PQ12, PQ13 net name 12/08 19. Del C740 and C693 02/05/07
20. P39. Change PQ41to AO4408, PQ45 to AO4410 12/08 20. Add R643, R644, R645 and R646 02/05/07
21. Add signal L2-ECO# 02/05/07

21. P38. Change PQ40 to AOL1414, PQ11, PQ38 to AO4456 12/08
22. Change C732, C700, C842, C860 footprint 02/05/07
22. P2.P42. Add C895, C896, PC199, PC200, PC201 3.3nF for EMI issue 12/11
23. Change R10, R423-R428, R643-R646 from 330ohm to 150ohm 02/06/07
23. Add C897 and PC202 for frequency adjust 12/11
B
24. Del SW1 02/07/07 B
24. P39. Change MAX8776 FB net from +VGFX_CORE to VGFX_CORE 12/11

25. Stuff LP9--LP12 and change them footprint, unstuff 0ohm resistors 02/02/07
25. P25. Add magnetic sense LID SW for NEC 12/11
26. P31. Change U44 footprint, need apply new PN 12/11
27. P28. Del R327,R329, R551 and R554 for they have intternal pull-up, del R532 and R556 for wrong connection 12/12
28. P16, P25. Add B channel LVDS signals for EXTERNAL SKU 12/12
29. P24. Change R427, R426, R428 from 150ohm to 330ohm, LED power change from VCC5, 5VPCU to VCC3 and 3VPCU 12/12
30. P25. Change LID SW footprint and PN for NEC 12/14
31. P36, P26. C770, C774 change from 10pF to 15pF, C808 from 22pF to 27pF. 12/14
32. P30. Change BT connector for NEC and BenQ share 12/14
A 33. P9. Del R170, R161, add R642 and change net +VCCA_MPLL_L 12/18 A
PROJECT : CH3
46--CHANGE LIST A
Date: Wednesday, February 07, 2007 Sheet 45 of 46

5 4 3 2 1
5 4 3 2 1
SLP_S3#(SUSB#):Control non-critical power plane when system into S3(Suspend to RAM)/S4(Suspend to Disk)/S5(Soft off). 46
SLP_S4#(SUSC#):1.Control non-critical power plane when system into S4(Suspend to Disk)/S5(Soft off).Used to control DRAM power
NBSWON#
D 6 D
2 5
RVCCD
8734LDO5 S4 POWER RVCC3
3
1 7
3VPCU
AC Adapter RSMRST#
VIN
Charger Circuit Always System power
5VPCU 8
Battery
DNBSWON#
10 9
For other device to know system is below the S3 state SUSC#
SUSON
20
Power off when system into S3-S5 SUSB#
MAINON
CK_PWG
EC CLOCK
SB
15
VRON
14 19
21
ECPWROK
PWROK H_PWRGD
CPU
C C
13
HWPG
23
H_RESET#
16
VCC_CORE 22
CPU CORE VR 17
PLTRST_MCH#
VR_PWRGD_CK410
DELAY_VR_PWRGOOD
18
11
VCC1.25
System power 3 VCC2.5
VGA1.2V
B B
VCC1.05
System power 2 VCC1.5
NB
VCC5 12
System power 1 VCC3

PG_LDO
PG_1.5V/MCHPG
PG_SYS
PG_DDR AND
PG_EXT_VGA
PG_INT_VGA
SLP_S4(Other 3VSUS
device to know 5VSUS
below the S3) 10
11
1.8VSUS MAINON INT VGA Power
DDR VR SMDDR_VTERM chip +VGFX_CORE
A A
EXT VGA Power

chip VGACORE_G73
PROJECT : CH3
POWER SEQUENCE 1A

5 4 3 2 1

Quanta CH3

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5 4 3 2 1

LAYER 7 : SGND2 479P (uPGA)/35W

SYSTEM POWER MAX8734 PAG 5,6,7,8,9,10,11

VGACORE X MAINON PAG 31 PAG 31 PAG 32

Date: Tuesday, February 06, 2007 Sheet 1 of 46

internal build-in 33ohm PN change from B version to D version

C896 C101 CLK_BSEL0 R106 2.2K/F_4 12

10K 10K 21 31 CLK_PCIE_MINI_# 4 3

VCC3 R60 1K/F_4 47 39 RSRC1_LAN RP4 4 3 4P2R-S-33

Update for Robson CLKREQ# CLKUSB_48 C689 15P

1.Level 1 Environment-related Substances Should NEVER be Used.

Date: Tuesday, February 06, 2007 Sheet 2 of 46

H_A#20 W6 AD3 ITP_BPM#1 T6 Layout Note: H_D#20 L23 AB21 H_D#52

A5 C7 PM_THRMTRIP# CPU_TEST3 C24 Y1 COMP3

RSVD[05] CPU_TEST1 CPU_TEST3

Place C close to the

ITP_DBRESET# R61 *54.9/F_4 FSB BCLK BSEL2 BSEL1 BSEL0

Date: Tuesday, February 06, 2007 Sheet 3 of 46

AA9 VCC[052] VCCA[01] B26 F25 VSS[052] VSS[133] AC19

VCC[054] VSS[054] VSS[135]

VCC[067] VSSSENSE VSS[067] VSS[148]

C53 C98 C54 C99 C55 C100 Merom Ball-out Rev 1a

Route VCCSENSE and VSSSENSE

Date: Tuesday, February 06, 2007 Sheet 4 of 46

H_D#17 W10 H20 H_A#21

H_SWING H_D#22 H_D#_21 H_A#_25 H_A#26

H_D#24 W6 E19 H_A#28

R114 H_D#25 W9 B17 H_A#29

H_D#28 H_D#_27 H_A#_31 H_A#32

H_D#29 H_D#_28 H_A#_32 H_A#33

H_D#42 AB1 AM7

H_SCOMP H_D#47 H_D#_46 H_HITM#

10-mil wide with 15-mil H_D#59 H_D#_58 H_DSTBN#_0

Date: Tuesday, February 06, 2007 Sheet 5 of 46

11 MCH_CFG_9 CFG9 C20 AJ47 DMI_RXP0 W42 C_PEG_TXP6 C731 [email protected]/10V

T44 M24 CFG_17 For Calero : 255 PEG_TX_14 PEG_TXP_C14 14

R247 0 PM_EXTTS#1_R J36 E36 DFGT_VR_EN 16 lanes NC

BK51 NC_2 CL_RST# AN49 CL_RST#0 22 I&E Dis/Enable setting

BK1 <design guide V1.1 P195> R231 E@0 DDCDATA

A5 NC_11 CLK_REQ# G39 PCIE_REQ4# 2

CRESTLINE_1p0 CRT R/G/B TV A/B/C Per desigen guide V1.1 p195

R220 E@0/I@150 NB_B

R200 E@0/I@150 NB_G

C274 C268 R519

R509 1 2 10K PM_EXTTS#0 3.01K/F

R251 1 2 10K PM_EXTTS#1 MCH_CLVREF SMRCOMPP

C301 C315 0.1U/10V 392/F

Size Document Number Rev

Date: Tuesday, February 06, 2007 Sheet 6 of 46

M_A_DQ34 AW11 BK27 M_A_A2 M_B_DQ32 BK13 BC18 M_B_A0

M_A_DQ47 SA_DQ_46 M_B_DQ45 SB_DQ_44 SB_MA_12 M_B_A13

Date: Tuesday, February 06, 2007 Sheet 7 of 46

AU32 VCC_SM_1 VCC_AXG_NCTF_26 Y19 current 7.7A AA35 VCC_NCTF_27

BF33 AF19 U36

VCC_SM_20 VCC_AXG_NCTF_45 VCC_NCTF_46

VCC AXM NCTF

AC23 VCC_AXG_15 VCC_AXG_NCTF_80 V26

Date: Tuesday, February 06, 2007 Sheet 8 of 46

I&E Dis/Enable setting

LVDS Disable/Enable guideline

I@BLM18PG181SN1 L56 I@1UH