Pe Lab Manual 2016
Pe Lab Manual 2016
Pe Lab Manual 2016
7. Single phase full bridge parallel inverter connected to R load (conventional & simulation )
8. Complementary Commutation ( conventional & simulation)
9. Auxiliary Commutation ( conventional & simulation)
10. Speed control of a separately excited DC motor using a MOSFET chopper
11. Speed control of single phase induction motor using AC voltage controller
12. Assignment (an additional experiment will be given to students, which they have to
design and implement themselves)
LIST OF EXPERIMENTS
I CYCLE
Expt. No
Page No
11
II CYCLE
5. Single phase full wave rectifier using R and R-L loads (conventional & simulation)
16
20
23
26
III CYCLE
9. Auxiliary Commutation (conventional & simulation)
29
32
11. Speed control of single phase induction motor using AC voltage controller.
34
12. Assignment
36
ALSO
Question Bank
38
Viva Questions
40
I CYCLE
EXPT. NO 1
STATIC CHARACTERISTICS OF SCR
AIM: To obtain the static V-I characteristics of the given SCR
APPARATUS REQUIRED:
board.
CIRCUIT DIAGRAM:
PROCEDURE:
The SCR is a unilateral device. It is a current controlled device. Separate DC supplies are given to the
gate and anode of the device as shown. The supply to the gate is lower than the anode supply.
1. The circuit is connected as shown. The terminals of the device are identified according to the
pin diagram shown below:
BT136
CAG
2. Measuring the resistances between the gate and cathode and anode and cathode checks the
healthiness of the device. The resistances have to be high. The resistance between anode and
cathode is higher than the one between gate and cathode.
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3. Initially, a gate current of 1.5mA is supplied to the gate by adjusting the gate supply as well as
the 145 resistor in the gate circuit.
4. The anode supply is now gradually increased. The voltage will be blocked by the device,
which will be recorded by the voltmeter which is connected across the anode and cathode of
the device.
5. As the voltage is further increased, for some value of the forward voltage, the device will
breakdown. This condition is called turn-on of the device. This condition is indicated by the
voltmeter across the device collapsing to about 1V. The voltage at which the device breaks
down is called the forward break over voltage, VBO. This voltage is noted down.
6. After the device starts conducting, which is also indicated by the ammeter in the anode circuit
indicating a current, the anode supply is increased and the corresponding increase in the anode
current is noted and the readings are tabulated as shown. The procedure outlined in the above
steps is repeated for another gate current, and tabulated.
Ig1= -Sl.
No.
mA: VBO1= -- V
Anode current
Ia, in mA
Ig2= --
mA: VBO2= -- V
Sl.
No.
Vak, Across
device in V
Anode current
Ia, in mA
Vak, Across
device in V
7. Using the readings tabulated for two values of gate currents. The V-I characteristics of the
SCR are plotted as shown below:
Ia (mA)
Ig2
Ig1
IL
Vak (V)
VBO2
VBO1
Ig1 > Ig2
-Ia (mA)
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PROCEDURE:
The MOSFET is a voltage controlled static switch. It can be considered as the static equivalent of the
vacuum tube triode.
1. The circuit can be connected as shown above after verifying that the device is healthy and
identifying the terminals of the device by means of the pin diagram below:
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730
GDS
2. Apply a suitable voltage (15V) across the drain and source terminals of the device. Now
slowly increase the gate to source voltage by adjusting the supply till the device turns on
which is indicated by the ammeter showing a reading. The corresponding voltage across the
gate and source is called the threshold voltage whose value is noted down.
3. The readings for the drain characteristics are noted by increasing the Vds supply by keeping
Vgs constant. The procedure is repeated for another higher value of Vgs and Vds is increased
in steps and the corresponding increases in drain current Id are noted and tabulated as below:
Vgs1= ---V
Sl. No.
Vds (v)
Vgs2= ---V
Sl. No.
Id (mA)
Vds (v)
Id (mA)
Drain Characteristics
Id(mA)
Vgs1
Vgs2
Vgs1 > Vgs2
Vds(volts)
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3. For obtaining the transfer characteristics, the drain voltage Vds is fixed at some value (15v)
and the gate to source voltage is increased in steps and the increase in the drain current is
noted and tabulated. The procedure is repeated for a larger value of drain voltage (30V) and
the corresponding values of Vgs and Id are noted and tabulated as shown. The drain and
transfer characteristics are also shown below:
Vds1= ---V
Vds2 = ---V
Sl. No. Vgs (V) Id(mA)
Transfer Charecteristics
Id (mA)
Vds1
Vds2
Vgs(volts)
Vth
CALCULATION:
From the drain characteristics and transfer characteristics the device parameters like drain resistance
rd, trans conductance gm and amplification factor can be found using following equations.
gm = Id / Vg = ________ ohm-1
rd = Vds / Ids= ________ ohm
= rd x gm
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B. CHARACTERISTICS OF IGBT
APPARATUS REQUIRED: IGBT, two 0-30V power supplies, 0-2A ammeter, multi-meter
connecting board, connecting wires etc.
CIRCUIT DIAGRAM:
PROCEDURE:
1. After checking that the device is healthy, in the usual way, the circuit given above is
connected. The supplies are kept at the minimum (zero volts).
2. The IGBT is a switching device which is a voltage controlled device. From the output end it
works a NPN transistor. A minimum voltage at the gate is required to turn on the device, the
value of which is called the threshold voltage.
4. To start with, a voltage of 15V is applied to the collector circuit.
5. The gate to emitter voltage Vge is very slowly increased till the device switches on which is
indicated by the ammeter in the collector circuit showing a reading. The value of Vge is noted
down.
6. The collector to emitter voltage (Vce) is further increased to record the
increases in the collector current till it reaches saturation.
corresponding
7. This procedure is repeated for another value of Vge and the readings are tabulated & a graph
of Vce against Ic is drawn for the two different values if Vge as shown below:
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Vge1 = ----V
Vge2 = ----V
Sl.No. Vce in V Ic in A
Sl.No. Vce in V Ic in A
Ic(mA)
Vge1
Vge2
Vge1 > Vge2
Vce (volts)
EXPT.NO 3
LINE SYNCHRONISED UJT TRIGGERING CIRCUIT
AIM: To study the UJT as a triggering device and obtain the waveforms of the triggering circuit. To
also study how the UJT can be used as a line synchronized device and record the waveforms of the
load voltage and the SCR voltage.
APPARATUS REQUIRED: One UJT (2N2646), one 230V/18V, 150VA transformer, load resistor,
one SCR, resistors, one 15V, 400mW zener diode, one pulse transformer, diodes (BY127/1N4001),
connecting board, patch cords, CRO.
CIRCUIT DIAGRAM: A line synchronized UJT triggering circuit for triggering an SCR connected
in a half wave rectifier circuit is shown below:
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PROCEDURE:
1.
2.
After connecting the circuit, switch on the AC supply to the transformer. Connect the
oscilloscope across the points shown and record the waveforms. One precaution to be
taken is that only one channel of the CRO is to be connected across the pulse
transformer output and the other cannel should not be connected to any other part
of the circuit.
3.
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t
ZENER VOLTAGE WITH
SUPER IMPOSED PULSES
VZ
t
VC
VPEAK
t
VPUL
t
4.
After verifying that the triggering circuit is working satisfactorily and the Pulses are
transferred to the secondary of the pulse transformer; the triggering circuit is connected to
the half wave controlled rectifier circuit shown:
5.
The terminals marked G and K in the triggering circuit are connected to the gate and
cathode terminals of the SCR in the half wave rectifier circuit shown. The variable
resistor R in the triggering circuit is varied and the variation of the delay/triggering angle
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is observed on the CRO. The voltage across the load and SCR are recorded and drawn
to scale as shown below:
V
V = Vmsint
t
VL
VSCR
Sl
No:
Firing Angle ()
t
Vo (Practical)
Vo (Theretical) =
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EXPT. NO 4
SCR DIGITAL TRIGGERING CIRCUIT FOR A SINGLE PHASE
CONTROLLED RECTIFIER
AIM: To assemble a digital firing scheme to trigger an SCR in a half wave rectified circuit using
CD4047. To also study the method of trigger angle control or phase control of SCR.
APPARATUS REQUIRED: IC 741, IC CD 4047( 2 Nos), CL 100 ( 3 NOs) resistors and
capacitors.
CIRCUIT DIAGRA:
STAGE 1;
The above circuit is called a Zero Crossing Detector or ZCD which is a synchronizing circuit to be
synchronized to the ac supply. The op-amp 741 works as a comparator. The waveforms at point A
are shown below.
Input signal to ZCD from
Vi
transformer
wt
out put of ZCD
12v
wt
-12v
o/p at A
wt
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Description of CD 4047
CD 4047 is a very versatile timer digital IC which has three important modes of operation, namely
free running astable, positive edge triggered and negative edge triggered monostable and gated
astable modes. The connections given above are for negative edge triggered monostable. The 4047
IC also has two outputs obtainable at pins 10 and 11. one output at pin 10 is the normal output. Its
complimentary output is available at pin 11. the pulse width of the output can be designed using the
relationship tm=2.48RC, where tm is the width of the pulse to be designed, R and C are the
externally connected components as shown. A fixed resistor potentiometer combination has been
used to vary the triggering angle of the line commutated SCR. The associated waveforms are shown
below.
A
wt
o/p at
pin 10
wt
o/p at
pin 11
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The CD 4047 in the true gated astable mode, will convert an input pulse at pin 5, into very high
frequency pulses suitable for triggering an SCR. The input to pin5, called trigger input is given
from the emitter follower as shown which acts as a buffer. CL100 is the transistor used for the
buffer. The output from pin 10 ( normal output ) is obtained as a high frequency train of pulses. The
associated input and output waveforms of stage 3 are as shown below:
o/p at 11
wt
high frequency
o/p at 10
of gated Astable
wt
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The output of the gated astable is given to a CL 100 based pulse amplifier. P and S are the windings
of a pulse transformer which will transmit the pulse from the input to the input.
These pulses are given to the gate of an SCR connected as a half wave rectifier circuit shown below
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The output pulses obtained from secondary winding of pulse transformer are given to the gate of the
SCR. The output waveform is shown below.
V = Vmsint
V
t
VL
t
Vscr
Firing Angle ()
Vo (Practical)
Vo (Theretical) =
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II CYCLE
EXPT NO 5
SINGLE PHASE FULL WAVE RECTIER USING R AND R-L LOADS
( CONVENTIONAL AND SIMULATION )
a. AIM: To connect a center-tapped rectifier circuit and to study the waveforms of the load
voltage, voltage across the SCRs and to show that the conduction of the SCRs will be beyond
180. To calculate the average value of the output voltage for triggering angles above and
below 90.
APPARATUS REQUIRED: A center-tapped transformer of rating 230/12-0-12V 150VA, two
SCRs, load resistor of 30, load inductance of 15mH, two 330, 3W resistors, two 100, 3W pots,
two o.1uF capacitors, connecting wires, one CRO.
CIRCUIT DIAGRAM: The circuit diagram is shown below:
PROCEDURE:
1. The circuit shown above is connected after ensuring that the SCRs are healthy by checking
their gate to cathode and anode to cathode resistances.
2. To start with, the inductance of the load, i.e. the 15mH inductor is removed and the
waveforms across the load and the devices are observed as shown below, the CRO being
connected across the load resistor RL.
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3. The triggering angle is varied by varying the 100 pots on both the triggering circuits of the
SCRs and the corresponding waveforms are observed and recorded for value of above and
below 90.
4. Typical waveforms across the load and one of the SCRs are shown below:
vL
vSCR1
vLOAD
t
= Triggering angle
= Conduction angle
[It should be observed that across the nonconducting SCR, the voltage will be twice the peak
voltage of the input which is the drawback of this circuit.]
The above procedure is repeated by including the load inductance of 15mH as shown in the circuit
diagram above. From the waveforms it should be observed that the SCRs will be conducting beyond
180. A typical set of waveforms are shown below:
vL
vSCR1
vLOAD
Firing Angle ()
Vo (Practical)
Vo (Theretical)
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PROCEDURE:
1. Circuit is drawn as shown in pspice schematics
2. The values and attributes of components to be se as indicated in diagram
3. select transient analysis and set step time as 10ns and final time as 35ms.
4. save the file and simulate circuit and observe the waveform across load as shown.
5. the same be repeated for RL- load and observe the output wave form
.
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R-LOAD
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EXPT NO 6:
IMPROVED SERIES INVERTER
AIM: To rig up a class-A based SCR series inverter and study its operation and observe the
waveforms of the load and capacitor voltage and to verify that the circuit behaves as an under damped
oscillatory circuit.
APPARATUS REQUIRED: Two SCRs, one 0-30V DC supply, commutating capacitor (4uF),
center-tapped inductance, CRO, load resistance, triggering card and patch cords.
CIRCUIT DIAGRAM:
TRIGGERING CARD
:
ASTABLE
G1K1
MONO STABLE
BLOCKING
OSCILLATOR
PULSE
AMPLIFIER
G2 K2
INVERTER
MONO
STABLE
BLOCKING
OSCILLATOR
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TRIGGERING REQUIREMENT:
In the power circuit, there are two SCRs, which have to be alternately turned on, and therefore, two
sets of high frequency pulses have to be generated which are out of phase and there is no overlap
between the pulses.
PROCEDURE:
1. The circuit is connected after checking all the components. The power supply voltage knobs are
kept in minimum position and the current knobs are kept in maximum position.
2. The triggering card is also checked as indicated above and the pulses in both the channels of the
card are checked on the oscilloscope.
3. The supply to the power (SCR) circuit is energized by applying about 15V.
4. The supply to the triggering card is also varied very slowly, taking the precaution mentioned
above.
5. Once the required waveform is obtained, the voltage to the triggering card is not increased further.
6. The CRO channels are connected once across the load and once again across the capacitor and the
waveforms are noted down. Typical waveforms are shown below. The values of the inductance (one
half), capacitance and the load resistance are measured using a digital L C R meter. These values are
used to check whether the circuit is behaving as an under damped oscillatory circuit by using the
equation: R<=2L/C.
Vl
vL
Vc
iC
Tr / 2
f =1/2(1/ LC) (R2 /4 L2)1 / 2
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PROCEDURE:
1. Circuit is drawn as shown using pspice schematic editor, the values & attributes of the
components are set. The different attributes are DC=0, AC=1, V1=0, V2=10, TD=0, TR=1ns,
TF=1ns, PW=100us, PER=1ms for vpulse part for the thyristors 1 and DC=0, AC=1, V1=0,
V2=10, TD=.05m, TR=1ns, TF=1ns, PW=100us, PER=1ms for vpulse part for the thyristors
2. In the set up analysis select transient analysis, and set print time as 10ns and final time as 3ms.
3. save the file and simulate to observe the output waveform.
OUTPUT:
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EXPT NO 7:
MOSFET BASED SINGLE PHASE FULL BRIDGE INVERTER
CONNECTED TO R LOAD
a. AIM: To study the load voltage waveforms for different load resistances and observe and
record the load voltage waveforms with the switching transients.
APPARATUS REQUIRED: One parallel inverter module, a 40 tubular resistor, CRO, connecting
wires.
CIRCUIT DIAGRAM:
PROCEDURE:
1. The circuit is connected as shown in the circuit diagram shown above. All the connections are
externally made on the module where the terminals are provided.
2. The load resistor is kept in the maximum position and the supply voltage is kept in minimum
position.
3. The supply switch is closed and the external switch shown which is provided on the module is
also switched on.
4. With the load in maximum position, the supply voltage is increased to about 15- 20V. The
load resistor is reduced a little and for this value of load, the waveforms across the load and
one of the SCRs are noted down, by connecting the CRO first across the load and then across
one of the SCRs.
5. The load resistor is reduced further and for this value of load resistance, the waveforms are
noted down.
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PROCEDURE:
1.
2.
The values of the components and attributes of VPULSE are set for Q! and Q3 the
attributes for VPULSE are DC=0, AC=1, V1=0, V2=10, TD=0, TR=1ns, TF=1ns,
PW=0.5ms, PER=1ms and for Q2 and Q4 the attributes are DC=0, AC=1, V1=0, V2=10,
TD=0.5ms, TR=1ns, TF=1ns, PER=1ms,PW=0.5ms
3.
Select transient analysis set print step as 10ns and final time as 4 ms
4.
OUTPUT:
EXPT NO 8:
COMPLEMENTARY COMMUTATION
AIM: To connect a complementary commutation circuit and study and record the relevant wave
forms and to calculate and verify the critical turn-off time or available circuit turn-off time from the
waveforms. To also observe the condition for commutation failure and identify the condition from the
waveforms.
APPARATUS REQUIRED: A 0-30V regulated supply, two SCRs, one 4uF capacitor, two tubular
145 resistors, one CRO, one triggering module, one digital LCR meter, connecting wires one
multimeter.
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CIRCUIT DIAGRAM:
PROCEDURE:
1. The power circuit shown above is connected after ensuring all the components are in working
order.
2. The triggering module is tested by energizing it by 10V DC supply and ensuring that the
current is well within the normal limits (0.25A).
3. The duty cycle of the astable in the triggering card is adjusted to 50%.
4. The outputs of the triggering card namely G1K1 and G2K2 are checked.
5. The gates of both the SCRs are connected to the triggering card outputs.
6. To start with the power circuit is energized with 15V.
7. The supply to the triggering card is slowly increased till the proper output is observed in the
CRO, which is connected across one of the 145 load resistors.
8. The CRO is next connected across the capacitor and the voltage across the capacitor is
observed and recorded.
9. The CRO is connected across one of the SCRs and the voltage across it is recorded. From this
waveform, the critical or circuit turn-off time is toff is noted down.
10. The load resistance is varied and the influence of load current on toff is noted down.
11. The digital LCR meter is used to measure the values of C and R and toff is calculated as:
toff = 0.6931RC.
A set of typical waveforms are shown below:
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iC
vC
vC
iC
t
-V
iC = Capacitor current
vC = Capacitor voltage
vL
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PROCEDURE:
1. The circuit diagram is drawn as shown using pspice schematic editor
2. The values of components are set and the attributes for VPULSE part to be set are for
thyristor 1 DC=0, AC=1, V1=0, V2=10, TD=0, TR=1ns, TF=1ns, PW=0.5ms, PER=1ms for
thyristor 2 DC=0, AC=1, V1=0, V2=10, TD=0.5m, TR=1ns, TF=1ns, PW=0.5ms, PER=1ms
3. select transient analysis set print time as 10us and final time as 4ms
4. save the file and simulate to see the output.
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III CYCLE
EXPT NO 9:
AUXILIARY COMMUTATION
AIM: To study the principle of auxiliary commutation or impulse commutation.
APPARATUS REQUIRED: Two 0-30V DC supplies, two SCRs, one triggering card (both
channels), L, C, CRO and patch cords.
CIRCUIT DIAGRAM:
PROCEDURE:
As two SCRs are used, the triggering requirements are the same as the series inverter. Two sets of
pulses out of phase with each other are to be generated.
1. The circuit is connected as shown in the figure.
2. Power supply is first given to the SCR circuit (about 15V).
3. To start with; the auxiliary SCR is triggered, with the gate of the main SCR kept open.
4. The capacitor will charge with its upper plate positive to VDC.
5. The main SCR is now turned on by connecting the gate of this SCR to the gate terminal on the
triggering card. (The triggering card would already be checked as given earlier).
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6. The relevant waveforms across the load and across the capacitor are obtained, noted down and
plotted to scale. Typical waveforms are shown below.
GATE
PULSES
iGM
iGA
iGA
t
iC
vC
VDC / RL
VDC
2VDC / RL
VDC / RL
vL
VDC / RL
t
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PROCEDURE:
1. The circuit diagram is drawn as shown using pspice schematic editor
2. The values of components are set and the attributes for VPULSE part to be set are for thyristor
1 DC=0, AC=1, V1=0, V2=10, TD=0, TR=1ns, TF=1ns, PW=0.5ms, PER=1ms for thyristor 2
DC=0, AC=1, V1=0, V2=10, TD=0.5m, TR=1ns, TF=1ns, PW=0.5ms, PER=1ms
3. select transient analysis set print time as 10us and final time as 4ms
4. save the file and simulate to see the output.
OUTPUT:
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EXPT NO 10:
SPEED CONTROL OF A SEPARATELY EXCITED DC MOTOR
USING A MOSFET CHOPPER
AIM: To build a single quadrant MOSFET based chopper using a suitable control circuit. To vary
the duty cycle of the chopper and hence vary the average voltage of the chopper. To also study the
variation in speed of the motor with respect to the duty cycle of the chopper.
APPARATUS REQUIRED: 4047 CMOS timer ICs (2 Nos),resistors and capacitors, CL100
(2 Nos), one PMDC 12V motor.
CIRCUIT DIAGRAM:
FIRST STAGE:
The CMOS timer IC(4047) is connected as an astable in the free running mode as shown.
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CIRCUIT DIAGRAM:
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Pulse of various widths can be obtained, by simply varying the variable resistance in the monostable
circuit.
The power circuit using the MOSFET is rigged up as shown in the figure.
POWER CIRCUIT:
The PMDC motor is connected as shown. The output of the monostable is buffered and connected to
the MOSFET between the gate and source as shown.
PROCEDURE:
1. Rig up the control circuit stage by stage and check the outputs.
2. Connect the control circuit to the gate of the MOSFET after connecting the power circuit .
3. Vary the duty cycle and record the voltage across the motor in the DMM connected across the
motor as shown.
4. Plot a graph of duty cycle versus the voltage across the motor.
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EXPT NO 12:
SPEED CONTROL OF 1-PHASE INDUCTION MOTOR
USING AC VOLTAGE CONTROLLER.
AIM: To control the speed of a universal motor and a single-phase induction motor and to study the
variation of the output voltage with the control voltage and to draw the graph of the same.
APPARATUS REQUIRED: Two SCRs, one triggering card (both channels)I phase induction motor
and patch cords.
CIRCUIT DIAGRAM:
PROCEDURE:
1) The circuit is connected as shown in the figure, after ensuring that the devices are in good
working condition. The triggering module for the above circuit is energized with a 10V dual
supply and the triggering signals are observed on the CRO.
2) The triggering circuit is connected to the gates of the respective SCRs and the supply to the
power circuit is given.
3) A moving 0-250V voltmeter is connected across the motor terminals and a DMM is connected
across the pedestal voltage pot. The pedestal pot is slowly varied and the corresponding
pedestal voltage and the voltage across the motor are noted down and tabulated as shown
below:
Sl No:
Pedestal Voltage
Motor Voltage
~~**~~**~~**~~
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QUESTION BANK.
1.
Obtain the static characteristics of the given SCR, clearly indicating the switching region.
Demonstrate that the gate current has no effect on the device after it is turned on.
2.
Experimentally obtain the latching current of the given SCR. Also demonstrate that there will
be a drastic fall in the break-over voltage with a marginal increase in the gate current
3.
4.
Obtain experimentally, the static characteristics of the given MOSFET and hence find its
constants.
5.
6.
Obtain the characteristics of the given IGBT, clearly indicating the various regions of
operation
7.
Generate high frequency pulse using a UJT, relaxation oscillator. Using these pulses, trigger
an SCR operating off a sinusoidal supply. Show that the triggering circuit is synchronized
with the power circuit from waveforms.
9.
10.
Rig up circuit for improved series inverter.. Form the load waveform, calculate the frequency
of oscillation. Also obtain the capacitor voltage waveform..
11.
12.
13.
14.
15.
Experimentally demonstrate the principal of auxiliary commutation. Draw all the relevant
waveforms to scale. Verify the frequency of oscillation obtained by measuring the
commutating elements.
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16.
Simulate a circuit for an auxiliary commutation. Draw all the relevant waveforms to scale.
Verify the frequency of oscillation obtained by measuring the commutating elements.
17.
Show experimentally how turning on and SCR will automatically turn-off another conducting
SCR. Record all the waveforms and hence obtain critical turn off time verify the value
obtained by measuring the commutating capacitor.
18.
Demonstrate the principal of complementary commutation. Draw all the relevant wave forms
to scale. Find the value of the commutating capacitor from the critical turn-off time.
16.
Rig-up a simple triggering circuit to generate high frequency pulse, using digital ICs. Show
the waveforms at various stages of the circuit.
17.
Wire-up digital firing circuit and hence generate high frequency firing pulse. Using these
pulses, trigger an SCR. Draw the waveforms at all the stages to scale.
18.
Control the speed of a PMDC motor using a suitable DC chopper circuit. Experimentally
demonstrate that the speed of the motor controlled is directly proportional to the duty cycle of
the chopper.
19.
Design and assemble a FWR circuit (using 2 SCRs) using the RC triggering principle. Obtain
and draw to scale the following waveforms.
(i)
Voltage across load and SCR for a resistive (R) load.
(ii)
Voltage across the load and SCR for an inductive load (R-L) load. Also for an R-L
load determine from the waveforms, the triggering angle for conduction and discontinuous
conduction.
20.
Design a UJT firing circuit to generate triggering pulses of a frequency of 500 Hz to fire an
SCR in a HWR circuit. Obtain the range of triggering angles. Show all the relevant
waveforms in the UJT firing circuit.
21.
Rig up a circuit for capacitor commutated single phase parallel inverter feeding a resistive
load and obtain load waveform.
22.
Control the speed of the given 1 Induction motor using a suitable power circuit. Draw a
graph of the stator voltage against the control voltage.
23.
Rig-up a single phase voltage controller circuit with its associated triggering circuit. Control
the speed of the given 1 Induction motor from the converter in the open loop. Draw a graph
of converter output versus the control voltage.
24.
Simulate single phase bridge inverter circuit and obtain the relevant waveforms.
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Department of EEE
RVCE
37
RVCE
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23. What is the process of turn OFF of a thyristor? Explain the dynamic turn OFF characteristics
of thyristors.
24. What are the necessary conditions to be satisfied for effective turn OFF of thyristor?
25. What are the components of turn ON time of thyristors?
26. With the help of a circuit diagram explain how a thyristor can be protected against di/dt.
27. Explain the design of a circuit which can be used to protect the thyristor against dv/dt.
28. What is a snubber circuit? Explain the design of a typical snubber circuit to protect against
dv/dt.
29. What are the conditions to be satisfied to connect a set of thyristors in series?
30. What conditions must be satisfied to operate a set of thyristors in parallel?
31. What is the derating factor of series connected thyristors?
32. What is an UJT? Explain its static V I characteristics.
33. How can a UJT be designed to work as an oscillator?
34. What conditions must be satisfied to operate an UJT as an oscillator?
35. Why is an UJT considered to be an ideal triggering device?
36. What are the requirements of triggering a thyristor?
37. What is meant by hard driving the gate?
38. What is the intrinsic stand off ratio of an UJT?
39. What are the peak and valley point voltages of an UJT?
40. What are the two general types of commutation?
41. What is forced commutation? When is it required?
42. What are the types of forced commutation?
43. What is the difference between self commutation and natural commutation?
44. Explain with the help of a circuit the principle of self commutation?
Department of EEE
RVCE
39
RVCE
40
Department of EEE
RVCE
41