Scribd Logo
Upload

Welcome to Scribd!

  • 44 views

    Presentation Portfolio

    Uploaded by

    api-243868301

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd

    Presentation Portfolio

    Uploaded by

    api-243868301
    44 views1 page

    Original Title

    presentation portfolio

    Copyright

    © © All Rights Reserved

    Available Formats

    DOCX, PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    44 views1 page

    Presentation Portfolio

    Uploaded by

    api-243868301

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    of 1

    TALKS & PRESENTATIONS

    1.
    2.
    3.
    4.
    5.
    6.
    7.
    8.
    9.
    10.
    11.
    12.
    13.
    14.
    15.
    16.

    User Experience Design, Modeling, and Prototyping for a 1-Stop Ecommerce-ready Farmers Market
    Web Application, UC Extension, 11/2014
    User Interface Design and Prototyping of a Complete Fitness Management Solution for Android based
    Mobile Systems, UC Extension, 08/2013
    Neural Mechanisms of Alcoholism: Alcohol Acts Directly on Dopaminergic Neurons, Georgia Tech,
    10/2008
    Using Electrical Impedance Scanning to Detect Breast Cancer, Georgia Tech, 12/2008
    Circuit Characterization of UltraSPARC III Derivative Dual ported IVP SRAM block using TI 120nm
    technology to obtain Timing Model Parameters and tune Self Timed Design Margins, Sun
    Microsystems, 11/2002
    Feasibility Study of Process, Voltage, and Temperature Compensation Schemes for a 2.2 Gb/s HBus
    Current Mode Driver, and Source/Receiver Terminations for a Low Power UltraSPARC V Derivative,
    Sun Microsystems, 04/2002
    Circuit Characterization of UltraSPARC III Derivative Dual ported IVP SRAM block using TI 160nm
    technology to obtain Timing Model Parameters and tune Self Timed Design Margins, Sun
    Microsystems, 11/2001
    Circuit Characterization of High Speed Dynamic Logic Megacells in the Integer Execution Unit
    Pipeline for a 1.4 GHz UltraSPARC III derivative, Sun Microsystems, 11/2000
    Circuit Characterization of High Speed Dynamic Logic Megacells in the Floating Point and Graphics
    Unit Pipeline for a 1.4 GHz UltraSPARC III derivative, Sun Microsystems, 11/2000
    Design and Implementation of Multi-ported Register File Macros for a 64 bit TriMedia VLIW
    Processor, Philips Semiconductors, 05/2000
    Design and Implementation of Single ported SRAM Lookup Table for a 64 bit TriMedia VLIW
    Processor, Philips Semiconductors, 02/2000
    Circuit Level Implementation of a High Speed Sliceable Adder for a 64 bit Tri Media VLIW Processor,
    Philips Semiconductors, 11/1999
    Implementation Circuit Design Review of Delta 39K Programmable Macrocell, Cypress
    Semiconductors, 04/1999
    Initial Circuit Design Proposal for Delta 39K Programmable Macrocell, Cypress Semiconductors,
    11/1998
    Full Chip Functional Verification of MAX 7K CPLDs in Normal Operation and JTAG Boundary
    Scan Modes, Altera Corporation, 05/1998
    VHDL Modeling of a 64-bit IEEE Compliant Floating Point ALU, UT Austin, 11/1996

    You might also like