ESD: Analog Circuits and Design
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About this ebook
A comprehensive and in-depth review of analog circuit layout, schematic architecture, device, power network and ESD design
This book will provide a balanced overview of analog circuit design layout, analog circuit schematic development, architecture of chips, and ESD design. It will start at an introductory level and will bring the reader right up to the state-of-the-art. Two critical design aspects for analog and power integrated circuits are combined. The first design aspect covers analog circuit design techniques to achieve the desired circuit performance. The second and main aspect presents the additional challenges associated with the design of adequate and effective ESD protection elements and schemes. A comprehensive list of practical application examples is used to demonstrate the successful combination of both techniques and any potential design trade-offs.
Chapter One looks at analog design discipline, including layout and analog matching and analog layout design practices. Chapter Two discusses analog design with circuits, examining: single transistor amplifiers; multi-transistor amplifiers; active loads and more. The third chapter covers analog design layout (also MOSFET layout), before Chapters Four and Five discuss analog design synthesis. The next chapters introduce the reader to analog-digital mixed signal design synthesis, analog signal pin ESD networks, and analog ESD power clamps. Chapter Nine, the last chapter, covers ESD design in analog applications.
- Clearly describes analog design fundamentals (circuit fundamentals) as well as outlining the various ESD implications
- Covers a large breadth of subjects and technologies, such as CMOS, LDMOS, BCD, SOI, and thick body SOI
- Establishes an “ESD analog design” discipline that distinguishes itself from the alternative ESD digital design focus
- Focuses on circuit and circuit design applications
- Assessible, with the artwork and tutorial style of the ESD book series
- PowerPoint slides are available for university faculty members
Even in the world of digital circuits, analog and power circuits are two very important but under-addressed topics, especially from the ESD aspect. Dr. Voldman’s new book will serve as an essential and practical guide to the greater IC community. With high practical and academic values this book is a “bible” for professionals, graduate students, device and circuit designers for investigating the physics of ESD and for product designs and testing.
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ESD - Steven H. Voldman
1
Analog, ESD, and EOS
In 1993, I was invited to consult for two days with a well-known semiconductor analog corporation on electrostatic discharge (ESD) protection of analog components. A vice president of the corporation sat with me and said, Our analog products are superior to any of our competitors. As a result, no one cared about the level of our ESD protection results! All of our products did not achieve 2000 V HBM or 4000 V HBM levels. Today, with growth of competition in the analog business sector, overnight, 75% of our customers want us to achieve better than 2000 V HBM levels on all of our products! How do I build a corporate ESD strategy for this analog corporation ?…
This was my first introduction to the world of ESD in analog design.
1.1 ESD in Analog Design
In every technology sector, electrostatic discharge (ESD) protection was not an issue when there was a sole supplier of critical products and the customer was willing to accept the product. Eventually, as the technology or application space matured, customers wanted better ESD protection as both technology and application became mainstream or high volume. This was true historically in digital and analog applications with CMOS, bipolar, silicon on insulator (SOI), silicon germanium (SiGe), and gallium arsenide (GaAs) technologies. With mainstream introduction of a technology, it is desirable not to have customer field returns from ESD or electrical overstress (EOS).
As a result of the unique needs of analog design, there are a significant number of issues to be addressed in analog ESD design. These issues extend from chip design to system-level design in both architecture and layout, which consist of the following:
Matching and layout issues
Matching requirements in differential receivers
Domain-to-domain separation and ESD coupling
Circuit topology chip architecture and ESD
Interdomain digital-to-analog ESD failures
Semiconductor chip layout floor planning
Printed circuit board (PCB) design floor planning
High-voltage applications
Ultrahigh-voltage applications
In this text, examples will be provided of ESD failures and problems in past analog applications to modern-day practices in analog design. The text will discuss how the present-day architecture of mixed-signal chips evolved and its implications.
1.2 Analog Design Discipline and ESD Circuit Techniques
In analog design, unique design practices are used to improve the functional characteristics of analog circuitry [1–10]. In the ESD design synthesis of analog circuitry, the ESD design practices must be suitable and consistent with the needs and requirements of analog circuitry [11, 12] (Figure 1.1). Fortunately, many of the analog design practices are aligned with ESD design practices.
c1-fig-0001Figure 1.1 Analog and ESD design.
In the analog design discipline, there are many design techniques to improve tolerance of analog circuits [10]. Analog design techniques include the following:
Local matching: Placement of elements close together for improved tolerance
Global matching: Placement in the semiconductor die
Thermal symmetry: Design symmetry
A key analog circuit design requirement is matching. To avoid semiconductor process variations, matching is optimized by the local placement. Placement within the die location also is an analog concern due to mechanical stress effects. In analog design, there is a concern of the temperature field within the die and the effect of temperature distribution within the die.
Many of the analog design synthesis and practices are also good ESD design practices. The design practices of matching and design symmetry are also suitable practices for ESD design. But there are some design practices where a trade-off exists between the analog tolerance and ESD; this occurs when parasitic devices are formed between the different analog elements within a given circuit or circuit to circuit.
1.2.1 Analog Design: Local Matching
Matching is important in analog design due to the usage of many circuit blocks that require good matching characteristics. The matching is important locally in a semiconductor device or within a circuit. In this case, local matching
is needed to provide the ideal characteristics of an analog network. Local matching is critical in multifinger structures, where mismatch can occur between two adjacent structures. In future sections, discussion of semiconductor processes such as photolithography and etching influences the local matching.
1.2.2 Analog Design: Global Matching
Matching is important in analog design due to the usage of many circuit blocks that require good matching characteristics from circuit to circuit. Many functional analog circuit blocks are repeated within a semiconductor chip. In this case, global matching
is needed to avoid mismatch between two circuits. Global matching is influenced by spatial separation of two circuits, global density variations, arrangement, and orientation. Global matching is influenced by across chip linewidth variation (ACLV).
1.2.3 Symmetry
Symmetry is critical to establish matching within a semiconductor device or an analog circuit (Figure 1.2). Symmetry is influenced by design layout, current distribution, temperature field, and thermal distribution [10].
c1-fig-0002Figure 1.2 Symmetry and layout.
1.2.3.1 Layout Symmetry
Layout symmetry is a form of symmetry through physical design. Layout symmetry establishes matching within a semiconductor device or an analog circuit [10].
1.2.3.2 Thermal Symmetry
Thermal symmetry is a form of symmetry through the temperature field and thermal distribution. Thermal symmetry establishes matching within a semiconductor device or an analog circuit [10].
1.2.4 Analog Design: Across Chip Linewidth Variation
In semiconductor development, semiconductor process variation can introduce structural and dimensional nonuniformity which influences both analog circuits and ESD devices [13–22]. Photolithography and etch tools can introduce these nonuniformities that exist on a local and global design level. These variations can manifest themselves by introducing variations in both active and passive elements. For MOSFET transistors, variation in the MOSFET channel length in single-finger and multifinger MOSFET layouts can lead to nonuniform turn-on
; this effect can influence both active functional circuits and ESD networks. In bipolar transistors, the linewidth variation can lead to different sizes in emitter structures, leading to nonuniform current distribution in multifinger bipolar transistors. For resistor elements, resistor elements that are utilized for ballasting in multifinger structures can also lead to nonuniform current in the different fingers in the