Open and Standardized Resources for Smart Transducer Networking

3754 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 58, NO. 10, OCTOBER 2009 Open and Standardized Resources for Smart Transducer Networking Silvano R. Rossi, Aparecido A. de Carvalho, Alexandre C. R. da Silva, Edson A. Batista, Cláudio Kitano, Tércio A. Santos Filho, and Thiago A. Prado Abstract—IEEE 1451 standard is intended to address the smart transducer interfacing problem in network environments. Usually, proprietary hardware and software are a very efficient solution for implementing the aforementioned normative, although they can become expensive and inflexible. In contrast, the use of open and standardized resources for implementing the IEEE 1451 smart transducer interface standards is proposed in this paper. Tools such as Java and Phyton programming languages, Linux, low-cost programmable logic devices, personal computer resources, and Ethernet architecture were integrated to construct a network node based on the IEEE 1451 standard. The node can be used in systems based on the client–server communication model. The evaluation of the employed tools and experimental results are presented. Index Terms—IEEE 1451, interface, network, open and standardized resources, smart transducer. I. I NTRODUCTION T RANSDUCERS are an essential part of a distributed measurement and control (DMC) system. In basic terms, a DMC system is composed of a set of transducers interconnected via a control network. In this kind of system, the goal is to control a process where multiple transducers are involved. At the process level, transducer information is sent or received from the network nodes, where distributed intelligence can be executed. In addition, smart transducer technology 1) facilitates the reduction of instrumentation system costs due to wiring simplification, 2) enables shared information, using local area network technologies, and 3) enables Internet connectivity, providing remote access to the “sensor information.” Thus, the interconnection of multiple devices in a distributed instrumentation environment can be a necessity. Nevertheless, the appropriate network and interconnection technology can become a critical problem to resolve, as that which befell in the indusManuscript received February 13, 2008; revised September 22, 2008. First published July 24, 2009; current version published September 16, 2009. This work was supported in part by Fundunesp, São Paulo State University, São Paulo, Brazil, by the Brazilian sponsoring agency Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES), and by the Investigación Tecnológica en Electricidad y Mecatrónica (INTELYMEC) Group, Center of the Buenos Aires Province National University. The Associate Editor coordinating the review process for this paper was Dr. Sunil Das. S. R. Rossi is with the INTELYMEC Group, Department of ElectroMechanical Engineering, Center of the Buenos Aires Province National University, Olavarria B7400JWI, Argentina (e-mail: [email protected]). A. A. de Carvalho, A. C. R. da Silva, C. Kitano, and T. A. Santos Filho, are with the Department of Electrical Engineering, São Paulo State University (UNESP), Ilha Solteira 15385-000, Brazil (e-mail: [email protected]). E. A. Batista and T. A. Prado are with the Department of Engineering, Dom Bosco Catholic University (UCDB), Campo Grande 79117-900, Brazil. Digital Object Identifier 10.1109/TIM.2009.2019710 trial context, because many solutions have been provided by several heterogeneous manufacturers in various network levels. Nowadays, the suitable choice of a specific system can turn into a dilemma due to the widespread existence of field buses, device buses, and many other network technologies [1]. IEEE 1451 standards can be applied to address the interfacing problem [2]–[4]. By using IEEE 1451.1 and IEEE 1451.2, it is possible to implement a network node composed of a network capable application processor (NCAP) and a smart transducer interface module (STIM) containing up to 255 transducer channels. Each with its own channel transducer electronic data sheet (TEDS) stored in a nonvolatile memory, enabling the plug-andplay mode at the transducer level. The IEEE 1451.2 normative also defines a standardized digital interface between STIM and NCAP, named transducer independent interface (TII). Several implementations and applications of the IEEE 1451 smart transducer interface standards have been carried out using microprocessors, microcontrollers, embedded commercial solutions, and multicore technologies. An early demonstrative implementation example of the STIM–NCAP node was developed using IEEE 1451.2 hardware based on the ADuC812 microconverter and NCAP based on the BFOOT 66501 embedded Web server produced and discontinued by Hewlett Packard [5]. Another interesting STIM–NCAP approach using microcontrollers and implemented for a controller area network can be found in [6]. Microcontrollers and microprocessors were used later in the implementation of IEEE 1451 network nodes in several specific applications involving networked smart transducers, e.g., [7]– [9]. Another alternative is the utilization of programmable logic devices (PLDs). The programmable logic allows parallel processing; however, when compared to microcontroller-based applications, it can get relatively expensive. Some researchers have carried out experimental works using programmable logic with the support of hardware description languages [10], [11] and multicore technologies [12]. Pioneers like Lee and Schneeman [13], [14] have explored the use of open approaches and concepts associated with the Internet for implementing smart transducer interface standards. On the other hand, due to many reports regarding the complexity of the ten-wire TII, effort was made to search for methods of simplifying and checking the mentioned interface to customize it to others, for instance, RS232 and USB, which use fewer wires [15]–[18]. Sensors networks pose the challenge of integrating data processing, communication, and sensor management [19]. 0018-9456/$26.00 © 2009 IEEE ROSSI et al.: OPEN AND STANDARDIZED RESOURCES FOR SMART TRANSDUCER NETWORKING Furthermore, there are a set of services, mainly associated with real-time smart transducer networks. These services include transmission of real-time data with a predictable timing, diagnostic, flexible components integration, constraint checking, and dynamic reconfiguration [20]. To implement an appropriate real-time communication interface for smart transducers, specific techniques are needed. Pitzek and Elmenreich [21] have investigated the configuration and management aspects of real-time transducer networks. Elmenreich [22] has proposed a time-triggered approach for smart transducer networks for implementing distributed real-time systems. Nevertheless, this paper focuses on the implementation of a basic network node using the IEEE 1451 concepts, considering the following two main issues: 1) flexibility and 2) availability of open and standardized resources for implementing it, more than other aforementioned aspects. This paper introduces the development of an IEEE 1451 network node based on open and standardized resources for applications in distributed measurement systems built based on the client–server communication model. Tools such as Java and Phyton programming languages, Linux, programmable logic technology, conventional personal computer resources, and Ethernet architecture were integrated to implement the system. The node contains a PC-based NCAP that holds a server application and a protocol controller fully developed in very high speed integrated circuit (VHSIC) hardware description language (VHDL) comprising a small part of the NCAP and implementing the I/O hardware to connect the TII to the STIM. In contrast to other existing ones, this approach allows using any conventional PC without serial or parallel port modifications, keeping the original ten-wire TII. The NCAP software was developed in Java and is executed in the PC; the Phyton language has also been tested. The STIM, with two transducer channels, was implemented with a low-cost field-programmable gate array (FPGA), and its functionality was fully developed in VHDL. In this case, our STIM layer was implemented with a general-purpose FPGA with 50 000 typical gates. The STIM–NCAP system was connected to an Ethernet 10 Base-T network. A client application can execute remote control and monitoring of physical parameters associated with the transducer channels over the Internet. Within this context, the challenge is not only to design a DMC based on the IEEE 1451 Smart Transducer Interface Standards to connect transducers to network environments, but also to try to apply open and standardized resources to improve the system flexibility. In fact, this is the main driving reason behind the work developed and presented in this paper. The rest of this paper is structured as follows. Section II introduces a brief commentary about open approaches for smart sensor. Section III focuses on the proposed architecture, featuring the tools and explaining the methodologies used to construct the IEEE 1451 network node. Section IV describes the simulation and experimental results. Section V presents a discussion of the system behavior. In Section VI, conclusions are presented. II. O PEN A PPROACHES FOR S MART S ENSOR The design of a distributed instrumentation system demands the application of many techniques and methodologies that are 3755 Fig. 1. Proposed IEEE-1451-based architecture. closely related to important instrumentation and control issues such as interfacing, data acquisition, and communication. The goal is to design a system with a high degree of flexibility and integration characterized by clear and well-defined interfaces [23]. The utilization of universally accepted standards for implementing the interfaces and communications in distributed instrumentation environments is a relevant point. Desired protocols and interface characteristics can be achieved using either open or proprietary solutions. Usually, proprietary hardware and software are a very efficient solution, although they can become expensive and inflexible. To confront and resolve the aforementioned problems, open and standardized resources can be a convenient solution because the systems developed by means of these tools can be continuously improved. III. P ROPOSED IEEE-1451-B ASED A RCHITECTURE Fig. 1 shows the proposed architecture using the IEEE 1451.1 and IEEE 1451.2 standards. The IEEE 1451 network node, composed of an NCAP PC, programmable logic-based NCAP I/O hardware, and a programmable logic-based STIM, was connected to an Ethernet 10 Base-T network. Through the intranet and via Internet, many client applications can obtain the information associated with the transducer channels implemented in the STIM. The STIM can be extracted from the powered NCAP through the TII’s physical connector to connect other STIMs on account of the plug-and-play mode introduced by the IEEE 1451.2 normative. A. Standardized Approach for the STIM Implementation The STIM was implemented with a versatile and generalpurpose FPGA model ACEX 1K50TC144-3 with over 50 000 typical gates (Altera Corporation), and the IEEE 1451.2 functionalities were fully developed in VHDL using modular codes. 3756 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 58, NO. 10, OCTOBER 2009 Fig. 2. Block diagram of the programmable logic-based STIM. TABLE I RESOURCE USAGE FOR THE STIM IMPLEMENTATION Fig. 4. Block diagram of the protocol controller. TABLE II RESOURCE USAGE FOR THE PROTOCOL CONTROLLER Fig. 3. Example of address and function module coded in VHDL. VHDL was chosen because of its convenience for developing digital systems built on open and standardized resources due to its standardized nature that allows technology independence and source code reusability, hence, enabling the modularity of the developed system. To implement the entire STIM functional blocks and the associated protocols, behavioral and structural VHDL description styles and state machine concepts were used. Modular description was achieved considering the following functional blocks: 1) interface control; 2) IEEE 1451.2 functionalities; 3) address and function; 4) TEDS ROM; 5) auxiliary and standard status registers; 6) service request; and 7) interface with the transducers. Fig. 2 depicts the programmable logic-based architecture for the modular STIM implementation. Fig. 3 presents an illustrative example of how the address and function module is coded in VHDL. For the sake of simplicity, the example depicts only a few parts of the code, and as can be seen, it shows part of the entity definition and part of the 160 functional address-processing for a channel-TEDS reading. ROSSI et al.: OPEN AND STANDARDIZED RESOURCES FOR SMART TRANSDUCER NETWORKING Fig. 5. 3757 Reading channel example. Two transducer channels were considered. In channel 1, a general-purpose sensor temperature model LM35 was used, associated with a signal conditioning circuit and an 8-bit analogto-digital converter ADC0804. Internal logic of the STIM provides a digital signal in response to a command sent by a client over the network to set in motion a cooler connected to channel 2. This action can be also achieved by means of a simple algorithm implemented in the STIM that uses the data provided by the temperature sensor. Channel-TEDS and meta-TEDS were implemented with a parameterized ROM using VHDL. To access this memory, a counter-based system was used. A counter triggers the TEDS ROM functional block when a transition in the NACK line is detected. Whenever a reading TEDS function is required for a specific transducer channel, this design allows the performance of a multibyte transmission over the TII, where the most significant byte of the considered TEDS data structure is transmitted first. Table I shows resource usage for the FPGA-based STIM configured with two transducer channels, two channel-TEDS blocks, and one meta-TEDS block. Using a general-purpose FPGA to implement the STIM module is possible, and a minimal STIM implementation requires about 30% of the 2880 logic elements of the FPGA, as seen in the table. B. Open and Standardized Approach for the NCAP The NCAP is composed of both a logical and a physical part. The logical part constitutes the software for the NCAP, and the physical part encompasses the hardware elements. From the hardware point of view, a conventional PC was chosen for this work, considering the following two fundamental aspects: 1) that a low-cost PC containing a virtual Java machine (JVM) is sufficient and 2) from a didactic point of view; it is an extremely flexible tool. Although integration of the server into the FPGA that holds the NCAP layer is possible, one of the objectives of this paper is to demonstrate that a PCbased NCAP without serial or parallel port modifications is also possible. To achieve this goal, a hardware interface in this work, called protocol controller, was implemented with a low-cost PLD (model FLEX EPF10K20RC240-4), with over 20 000 typical gates. This device comprises a small part of the NCAP and implements the I/O hardware to connect the TII with the STIM. The module functionality has been fully developed in VHDL, implementing the control of the IEEE 1451.2 protocol over the TII. The protocol controller is connected to the parallel port of a PC, although serial and USB ports are currently being tested. Through the software of the NCAP, commands, functions, and data are sent and received via the PC’s parallel port. Fig. 4 shows the architecture diagram of the protocol controller, including the following functional blocks: 1) IEEE 1451.2 protocol control; 2) STIM detection module; and 3) multiplexer; and 4) trigger control module. Table II shows resource usage for the FPGA-based protocol controller. Using a programmable logic-based device to implement the I/O hardware part of a PC-based NCAP is also possible with a lowcost FPGA, as can bee seen in the table. The software for the NCAP was developed using the Java development kit (JDK 1.4.0) from Java technology. Java is an attractive resource for DMC systems because it is a fully objectoriented language, including classes, objects, and methods. in addition, when a Java program is compiled, a file (.class) is created and can be interpreted by different JVMs, introducing portability. On the other hand, Java enables the code reusability and supports distributed applications. The client–server model was implemented through Java NET application programming interface (API) built base on the socket concept and transmission control protocol/Internet protocol (TCP/IP). 3758 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 58, NO. 10, OCTOBER 2009 Fig. 6. IEEE 1451.2 protocol; experimental results. (a) NTRIG signal versus NACK signal. (b) NIOE signal versus NACK signal. (c) NACK signal versus DOUT line. (d) DOUT line versus NACK for a TEDS transmission. To communicate the protocol controller to the parallel port of the NCAP-PC, communication API (COMM) and Java native interface (JNI) were tested. COMM API is an extension of JDK, enabling the communication of a device with the RS 232 serial port and the IEEE 1284 parallel port. By means of JNI, it is possible to write a code in C that can be used by Java. At the time that this work was developed, the communication API appeared unstable, and JNI is the alternative that actually implements the interface between Java application software and the code for the protocol controller. Another interesting approach in this level is the Phyton language because it is fully object-oriented, modular, portable, interpreted, open source, and easy to learn. Phyton implements a virtual machine in the same manner as Java, although compiling the programs is unnecessary. Phyton was used to read and write binary codes through the parallel port in local and remote fashion using only library resources from Phyton in a Linux environment. IV. R ESULTS The protocol controller is the master device, and the STIM performs actions involving standardized functional addresses, channel addresses, and commands according to the IEEE 1451.2 standard. Fig. 7. Server side of the application. Fig. 5 shows a reading channel transducer data example over the TII. As can be seen, data from the parallel port are multiplexed and placed in buses for STIM internal processes. Through the ctrl signal, protocol controller triggers the handshake process between STIM and NCAP, enabling the IEEE 1451.2 protocol over the TII. After completing the initialization process, an NTRIG signal is sent from NCAP to STIM via the protocol controller to request a sensor reading (A). A NACK signal is sent by STIM to NCAP to acknowledge a trigger event (B). An NIOE signal is sent by NCAP to STIM to start a transaction frame (C). A DCLK signal is a clock sent by NCAP to synchronize the data transfer. The maximum clock frequency is 6 MHz. When ROSSI et al.: OPEN AND STANDARDIZED RESOURCES FOR SMART TRANSDUCER NETWORKING Fig. 8. Displaying the client menu. Fig. 9. Prototype implemented in laboratory. an NIOE signal is asserted in the next negative-going edge of the NACK signal (D) and synchronized with the clock, the corresponding data are placed on the DIN line (E). The first byte transferred is the functional address (128)10 , and the second byte is the channel number for which the function must be addressed (1)10 . The subsequent bytes are the channel transducer data sent by the STIM to the NCAP via the DOUT line of the TII interface. In the example, only a byte is transferred. Finally, the NIOE line signals the end of the transaction. The NACK line also signals when a byte is transferred (F, G). Fig. 6 depicts, in different sequences, the following experimental results: Fig. 6(a) shows the NTRIG signal versus the NACK signal, associated with a transport data frame with an even number of bytes transferred; Fig. 6(b) shows the NIOE signal versus the NACK signal; Fig. 6(c) shows NACK versus DOUT; and Fig. 6(d) shows DOUT versus NACK for a TEDS multibyte transmission. To implement the server side of the system, Java NET was used. Fig. 7 shows the server NCAP, displaying the connection received from a remote client. Fig. 8 shows the graphic interface 3759 for the client application. Server and client were tested on Linux and Windows platforms. Server based on Windows, interacting with a client based on Linux was tested, and vice versa. The graphic interfaces have been developed using graphic programming techniques from abstract windowing toolkit and Swing from Java core technology. The server accepts a client connection with a specific domain name server using a TCP/IP socket. Thus, the client application is able to obtain the information associated with the transducers connected to the STIM via the Internet, allowing the implementation of several tasks related to a set of standardized functions to write and read data from a transducer channel. Finally, Fig. 9 shows the prototype implemented in laboratory, emphasizing their main parts. V. D ISCUSSION Hardware description languages, Java technology, low-cost PLDs, and PC hardware and software for implementing IEEE 1451-based systems are attractive alternatives due to their 3760 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 58, NO. 10, OCTOBER 2009 flexible characteristics. Thus, it is possible to implement scalable distributed instrumentation systems, involving smart transducer networks and the client–server communication model. By implementing the IEEE 1451 normative, the industry can gain substantial benefits such as optimizing the instrumentation system costs due to reduced complexity, flexibility for transmitting information through a communication network, and a greater degree of flexibility for enhancing their instrumentation systems without complicated configurations. Ethernet has been used at the control network level because it is a low-cost standardized technology with integration capability. Nevertheless, in industrial applications with critical response-time requirements, Ethernet must be carefully analyzed due to its mechanism for medium access based on collision detection. VI. C ONCLUSION The implementation of an IEEE 1451 node based on open and standardized resources for smart transducer networking has been presented. Open and standardized tools and technologies such as Java, Phyton, VHDL, Linux, and Ethernet were used and explored. A general-purpose FPGA-based STIM with a VHDL modular implementation has been developed, allowing independence of the target implementation technology, reduced design time, and source code reusability. With little effort, the existent code source can be reutilized with other complex PLDs. The hardware for the NCAP was implemented using conventional PC hardware and software and a FPGA based-protocol controller developed in VHDL, enabling the use of any conventional PC without serial and parallel port modifications, hence introducing portability. The software for the NCAP was developed in Java using the client–server communication model and a set of APIs to implement many other IEEE 1451.1 functionalities. Open and standardized resources for smart transducer networking enable the design of flexible, scalable, and low-cost DMC systems. The network node developed in this work can be used in industrial applications without any critical response-time requirements for monitoring parameters in electrical machines and for temperature, level, and pressure control. Home automation with one NCAP node and a combination of sensors and actuators into one STIM can also be implemented. R EFERENCES [1] K. Lee, “Sensor networking and interface standardization,” in Proc. IEEE Instrum. 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Kopetz, “Interface design for smart transducer,” in Proc. Instrum. Meas. Technol. Conf., 2001, vol. 3, pp. 1642–1647. Silvano R. Rossi was born in Tandil, Argentina, in 1970. He received the B.Sc. degree in electromechanical engineering from the Universidad Nacional del Centro de la Provincia de Buenos Aires (UNCPBA), Olavarria, and the Ph.D. degree in electrical engineering from the São Paulo State University (UNESP), Ilha Solteira, Brazil, in 1999 and 2005, respectively. He is currently involved with instrumentation systems and IEEE 1451 standard applications. He is an Assistant Professor with the Department of ElectroMechanical Engineering, UNCPBA, where he is also a Member Researcher of the Investigación Tecnológica en Electricidad y Mecatrónica (INTELYMEC) Group. His research interests include instrumentation systems and measurements, smart transducer networks, autonomous vehicles, and digital systems. ROSSI et al.: OPEN AND STANDARDIZED RESOURCES FOR SMART TRANSDUCER NETWORKING Aparecido A. de Carvalho was born in Bebedouro, Brazil. He received the B.Sc. degree in electrical engineering in 1976 and the Ph.D. degree in applied physics from the University of São Paulo (USP), São Paulo, Brazil, and the M.Sc. degree in biomedical engineering from the Federal University of Rio de Janeiro, Rio de Janeiro, Brazil, in 1979. In 1993 and 1994, he was an Honorary Fellow with the Department of Computer and Electrical Engineering, University of Wisconsin, Madison, granted by Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP) of Brazil. He is currently a Professor with the São Paulo State University (UNESP), Ilha Solteira, Brazil. His research interests include sensors and electronic instrumentation. Alexandre C. R. da Silva received the B.Sc. degree in electrical engineering from the University of Mogi das Cruzes, Mogi das Cruzes, Brazil, in 1984, the M.Sc. and Ph.D. degrees in electrical engineering from the University of Campinas (UNICAMP), Campinas, Brazil, in 1989 and 2003, respectively, and the degree of Free Lecture from the São Paulo State University (UNESP), Ilha Solteira, Brazil, in 2003. In 2007, he developed postgraduate stage at the University of Limerick, Limerick, Ireland. He is currently involved with synthesis tools for mixed-signal circuits, embedded systems, and IEEE 1451 standard applications. He is an Associate Professor and a Researcher with the Department of Electrical Engineering, College of Engineering (FEIS), UNESP. His research interests include analysis and synthesis of mixed-signal circuits, embedded systems, smart transducer networks, hardware description languages, and Petri Net. Edson A. Batista received the B.Sc. and the M.Sc. degrees in electrical engineering in 2001 and 2004, respectively, from the São Paulo State University (UNESP), Ilha Solteira, Brazil, where he is currently working toward the Ph.D. degree in electrical engineering in the area of electronic instrumentation and control, which involves the application of the IEEE 1451 standard. He is a Professor with the Universidade Católica Dom Bosco (UCDB), Campo Grande, Brazil. His research interests include hardware and software development, programmable logic, electronic instrumentation, and Java technology. 3761 Cláudio Kitano received the B.S. degree in electrical engineering from the São Paulo State University (UNESP), Ilha Solteira, São Paulo, Brazil, in 1986 and the M.S. degree in electronic engineering and computation and the Ph.D. degree from the Institituto Tecnólogico de Aeronáutica (ITA), São José dos Campos, São Paulo, in 1993 and 2001, respectively. He is currently an Assistant Professor with the Department of Electrical Engineering, UNESP. His research interests include optical interferometry, optical fiber sensors, integrated optics, and photothermal techniques. Tércio A. Santos Filho received the degree in computer science in 2004 from the University of Rio Verde, Rio Verde, Brazil, and the M.Sc. degree in electrical engineering in 2007 from the São Paulo State University (UNESP), Ilha Solteira, Brazil, where he is currently working toward the Ph.D. degree in the area of electronic instrumentation and control. His research interests include operational systems and computer networks, embedded systems, and sensor networks. Thiago A. Prado received the B.Sc. degree in electrical engineering in 2006 from the São Paulo State University (UNESP), Ilha Solteira, Brazil, where he is currently working toward the M.Sc. degree in electrical engineering in the area of electronic instrumentation and control. He is a Professor with the Universidade Católica Dom Bosco (UCDB), Campo Grande, Brazil. His research interests include embedded systems, sensor networks, instrumentation and measurements, automation, and biomedical instrumentation.