This article develops a gradient-based search algorithm for selective harmonic elimination (SHE) ... more This article develops a gradient-based search algorithm for selective harmonic elimination (SHE) to address the problems of high-computational cost, low-convergence speed, modulation index error, and slow-dynamic response often associated with SHE algorithms. First, the dimension of the search space is reduced by deriving intuitive equations to increase the search speed. Second, the desired modulation index is achieved by applying the proposed constraints. Third, gradient equations are modified to move and hold points in the reduced search space. Extensive comparative simulation studies show that, compared to conventional SHE methods, the proposed algorithm is highly efficient in producing smooth switching angle curves with minimal fluctuations over the entire modulation index range. The proposed method minimizes execution time and modulation index error, even with unbalanced dc input voltages. These superior characteristics are also experimentally verified on cascaded H-bridge inverters with different number of stages up to 25.
The Equivalent Series Resistance (ESR) of the output capacitor may cause output voltage Vo jumps,... more The Equivalent Series Resistance (ESR) of the output capacitor may cause output voltage Vo jumps, that are not modeled commonly for second order DC-DC converters, i.e., converters with two second order switched subsystems. These jump discontinuities in Vo lead to performance issues in Switching Surface (SS) controllers. In this paper, these ESR effects are modeled using switched systems with state jumps, called Jump-Flow Switched (JFS) systems. Furthermore, it is shown that approximating the capacitor voltage (Vc), with Vo, can cause undesired limit cycles, oscillations, chattering or instability issues. To resolve these issues, a non-jumping normal switched system is defined for JFS systems, that is equivalent to the internal continuous dynamics. Also, the challenges of designing SS controllers, for this equivalent switched system is studied, and the Constrained Near Optimal (CNO) SS is designed for the equivalent switched system of buck, boost, and buck-boost converters. To elimin...
Suppressing the negative effects of grid voltage harmonics on the estimated frequency of a phase-... more Suppressing the negative effects of grid voltage harmonics on the estimated frequency of a phase-locked loop (PLL) is a challenge in literature. This article proposes an easy-to-implement quadrature signal generator (QSG) to attenuate the oscillations on the estimated frequency in single-phase grid-connected inverters, which use second-order generalized integrator (SOGI)-PLL. It is shown that SOGI exerts a stronger filtering effect in generating the quadrature signal than the in-phase signal. Against this background, in this work, a modified integrator is introduced into the path of the in-quadrature signal to generate another in-phase component with much lower harmonic content. The proposed method imposes only a small computational burden on the existing SOGI-PLL compared to the previously presented methods that address the input voltage harmonic problem. Moreover, this method can work properly within the allowable range of grid voltage frequency deviations. The proposed integrator benefits from an error-decaying mechanism to overcome dc drift in pure integrators. The integrator has been designed based on theoretical equations. The validity of the proposed QSG and theoretical equations is evaluated using simulations and experimental studies. A fixed-point representation of the proposed QSG is also provided for implementation on low-cost microcontrollers.
International Journal of Industrial Electronics, Control and Optimization, 2020
A direct torque control (DTC) controlled induction motor drive is presented in this paper. Quanti... more A direct torque control (DTC) controlled induction motor drive is presented in this paper. Quantization errors of current and voltage measurements are simulated and considered. To reduce the average quantization error and other offset errors of current and voltage measurement and eliminating the increasing integrator errors, a random dither signal is added to the truncating analog to digital converter (ADC) outputs. In this method, the analog to digital converter (ADC) mean error is reduced to zero and therefore integrator output error is mitigated. Proposed quantization method can improve the digital converter result, thus this method can decrease the current measurement result. Proposed quantization method can improve the digital converter result, thus this method can decrease the current measurement result. Thus, the torque and flux ripple were be decreased. Proposed ditter injection method can be used in Digital signal processor (DSP) or FPGA implemented applications. Experiment...
In the Boost converter, the equivalent series resistance (ESR) of the output capacitor, may cause... more In the Boost converter, the equivalent series resistance (ESR) of the output capacitor, may cause output voltage jumps, that are not modeled commonly in the literature. These jump discontinuities in, lead to performance issues in switching surface (SS) controllers. In this paper, these ESR effects are modeled using switched systems with state jumps, called jump-flow switched (JFS) systems. Furthermore, it is shown that approximating the capacitor voltage, with, can cause undesired limit cycles, oscillations, chattering or instability issues. To resolve these issues, a non-jumping normal switched system is defined for JFS systems, that is equivalent to the internal continuous dynamics. Simulation and experimental results show the fast and robust responses of the controller board with Boost converter.
It is well known in the literature studies that the theoretical time-optimal control of boost con... more It is well known in the literature studies that the theoretical time-optimal control of boost converters can be achieved using switching surfaces based on the converter’s natural state trajectories. However, this method has two important drawbacks: First, the transient current peak of the time-optimal controller is far beyond the current limitations of related circuit elements in many practical cases. Second, switching based on the converter’s natural trajectories has high computational complexity and high dependence on circuit parameters. In this paper, based on the hybrid dynamical model of the converter and geometrical representation of its corresponding vector fields, a proximate constrained time-optimal sliding mode controller is proposed. The proposed method has a fast response that is near that of a time-optimal controller, with less computational complexity and sensitivity to parameter changes. The proposed method and its relevant theoretical framework are validated on an ex...
Time-optimal (TO) control of dc-dc converters, using switching surface controllers, has been inve... more Time-optimal (TO) control of dc-dc converters, using switching surface controllers, has been investigated extensively in the literature. Studies show that such controllers are of a minimum-switching and bang-bang nature and have the fastest possible response time. However, this method has three drawbacks: First, the inductors' maximum current goes beyond practical limits. Second, due to a marginal status in existence condition of the switching surface, stability of the controller is sensitive to parameter changes. Third, its nonlinear switching surface needs high computational power and is hard to implement. To overcome these problems, the switched affine model of boost converters is used in this paper to study the time response and equilibrium states. Then, the current-constrained TO state trajectory is studied, and its optimality is discussed. A constrained near-optimal (CNO) controller is proposed with a piecewise linear switching surface to guarantee the robustness of stability and the simplicity of implementation. A general condition for the existence of sliding mode and a novel method to check finite time reaching are proposed for arbitrary switching surfaces. The Lyapunov stability for the CNO controller is also discussed. The proposed method is validated on an experimental setup with a boost converter prototype and a TMS320F2812 processor board.
This article develops a gradient-based search algorithm for selective harmonic elimination (SHE) ... more This article develops a gradient-based search algorithm for selective harmonic elimination (SHE) to address the problems of high-computational cost, low-convergence speed, modulation index error, and slow-dynamic response often associated with SHE algorithms. First, the dimension of the search space is reduced by deriving intuitive equations to increase the search speed. Second, the desired modulation index is achieved by applying the proposed constraints. Third, gradient equations are modified to move and hold points in the reduced search space. Extensive comparative simulation studies show that, compared to conventional SHE methods, the proposed algorithm is highly efficient in producing smooth switching angle curves with minimal fluctuations over the entire modulation index range. The proposed method minimizes execution time and modulation index error, even with unbalanced dc input voltages. These superior characteristics are also experimentally verified on cascaded H-bridge inverters with different number of stages up to 25.
The Equivalent Series Resistance (ESR) of the output capacitor may cause output voltage Vo jumps,... more The Equivalent Series Resistance (ESR) of the output capacitor may cause output voltage Vo jumps, that are not modeled commonly for second order DC-DC converters, i.e., converters with two second order switched subsystems. These jump discontinuities in Vo lead to performance issues in Switching Surface (SS) controllers. In this paper, these ESR effects are modeled using switched systems with state jumps, called Jump-Flow Switched (JFS) systems. Furthermore, it is shown that approximating the capacitor voltage (Vc), with Vo, can cause undesired limit cycles, oscillations, chattering or instability issues. To resolve these issues, a non-jumping normal switched system is defined for JFS systems, that is equivalent to the internal continuous dynamics. Also, the challenges of designing SS controllers, for this equivalent switched system is studied, and the Constrained Near Optimal (CNO) SS is designed for the equivalent switched system of buck, boost, and buck-boost converters. To elimin...
Suppressing the negative effects of grid voltage harmonics on the estimated frequency of a phase-... more Suppressing the negative effects of grid voltage harmonics on the estimated frequency of a phase-locked loop (PLL) is a challenge in literature. This article proposes an easy-to-implement quadrature signal generator (QSG) to attenuate the oscillations on the estimated frequency in single-phase grid-connected inverters, which use second-order generalized integrator (SOGI)-PLL. It is shown that SOGI exerts a stronger filtering effect in generating the quadrature signal than the in-phase signal. Against this background, in this work, a modified integrator is introduced into the path of the in-quadrature signal to generate another in-phase component with much lower harmonic content. The proposed method imposes only a small computational burden on the existing SOGI-PLL compared to the previously presented methods that address the input voltage harmonic problem. Moreover, this method can work properly within the allowable range of grid voltage frequency deviations. The proposed integrator benefits from an error-decaying mechanism to overcome dc drift in pure integrators. The integrator has been designed based on theoretical equations. The validity of the proposed QSG and theoretical equations is evaluated using simulations and experimental studies. A fixed-point representation of the proposed QSG is also provided for implementation on low-cost microcontrollers.
International Journal of Industrial Electronics, Control and Optimization, 2020
A direct torque control (DTC) controlled induction motor drive is presented in this paper. Quanti... more A direct torque control (DTC) controlled induction motor drive is presented in this paper. Quantization errors of current and voltage measurements are simulated and considered. To reduce the average quantization error and other offset errors of current and voltage measurement and eliminating the increasing integrator errors, a random dither signal is added to the truncating analog to digital converter (ADC) outputs. In this method, the analog to digital converter (ADC) mean error is reduced to zero and therefore integrator output error is mitigated. Proposed quantization method can improve the digital converter result, thus this method can decrease the current measurement result. Proposed quantization method can improve the digital converter result, thus this method can decrease the current measurement result. Thus, the torque and flux ripple were be decreased. Proposed ditter injection method can be used in Digital signal processor (DSP) or FPGA implemented applications. Experiment...
In the Boost converter, the equivalent series resistance (ESR) of the output capacitor, may cause... more In the Boost converter, the equivalent series resistance (ESR) of the output capacitor, may cause output voltage jumps, that are not modeled commonly in the literature. These jump discontinuities in, lead to performance issues in switching surface (SS) controllers. In this paper, these ESR effects are modeled using switched systems with state jumps, called jump-flow switched (JFS) systems. Furthermore, it is shown that approximating the capacitor voltage, with, can cause undesired limit cycles, oscillations, chattering or instability issues. To resolve these issues, a non-jumping normal switched system is defined for JFS systems, that is equivalent to the internal continuous dynamics. Simulation and experimental results show the fast and robust responses of the controller board with Boost converter.
It is well known in the literature studies that the theoretical time-optimal control of boost con... more It is well known in the literature studies that the theoretical time-optimal control of boost converters can be achieved using switching surfaces based on the converter’s natural state trajectories. However, this method has two important drawbacks: First, the transient current peak of the time-optimal controller is far beyond the current limitations of related circuit elements in many practical cases. Second, switching based on the converter’s natural trajectories has high computational complexity and high dependence on circuit parameters. In this paper, based on the hybrid dynamical model of the converter and geometrical representation of its corresponding vector fields, a proximate constrained time-optimal sliding mode controller is proposed. The proposed method has a fast response that is near that of a time-optimal controller, with less computational complexity and sensitivity to parameter changes. The proposed method and its relevant theoretical framework are validated on an ex...
Time-optimal (TO) control of dc-dc converters, using switching surface controllers, has been inve... more Time-optimal (TO) control of dc-dc converters, using switching surface controllers, has been investigated extensively in the literature. Studies show that such controllers are of a minimum-switching and bang-bang nature and have the fastest possible response time. However, this method has three drawbacks: First, the inductors' maximum current goes beyond practical limits. Second, due to a marginal status in existence condition of the switching surface, stability of the controller is sensitive to parameter changes. Third, its nonlinear switching surface needs high computational power and is hard to implement. To overcome these problems, the switched affine model of boost converters is used in this paper to study the time response and equilibrium states. Then, the current-constrained TO state trajectory is studied, and its optimality is discussed. A constrained near-optimal (CNO) controller is proposed with a piecewise linear switching surface to guarantee the robustness of stability and the simplicity of implementation. A general condition for the existence of sliding mode and a novel method to check finite time reaching are proposed for arbitrary switching surfaces. The Lyapunov stability for the CNO controller is also discussed. The proposed method is validated on an experimental setup with a boost converter prototype and a TMS320F2812 processor board.
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Papers by Amir Ghasemian