Papers by Izwanizam Yahaya
This paper will discuss the virtual fabrication design process of a 22nm MOSFET bilayer graphene ... more This paper will discuss the virtual fabrication design process of a 22nm MOSFET bilayer graphene with high-ĸ metal gate (HKMG). Silvaco software's TCAD fabrication tools were utilized, with the Athena simulation module used to construct the device design and the Atlas module used to describe the device's electrical characteristics. To get the electrical characterization of a transistor specified by international standards, fixed field scaling methods were employed. Advanced and new methods were used to reduce the problems that occur during the manufacture of nano-sized transistors while increasing their performance. The material is Titanium dioxide (TiO2), while the metal gate is Tungsten Silicide (WSiX). The simulated devices conform to the International Technology Roadmap Semiconductor (ITRS) specifications. The results show that Vth is 0.206 ± 12.7% V for high performance (HP) logic technology requirements.
This paper describes the virtual design of 22nm gate length p-type metal oxide semiconductor, PMO... more This paper describes the virtual design of 22nm gate length p-type metal oxide semiconductor, PMOS. Silvaco, TCAD tools was used to fabricate the device design and to characterize the device's electrically properties. Fixed field scaling rules are applied to obtain transistor's electrical parameters set by ITRS 2013. In order to take the challenges that arise in the fabrication of nano-sized transistors and enhance their performance, advanced and novel technologies are applied. Using the statistical modelling of L9 Taguchi methodology, the development process is primarily focused on the tool's edge voltage. There are four parameters that have been divided into three distinct steps in order to conduct nine different experiments. The final confirmation result indicates that VTH is closer to the nominal value-0.206V following optimization techniques. This matches under the ITRS 2013 requirements for high performance. This paper examines the design of a p-MOS double gate containing a layer of graphene as it is known to have a high mobility value.
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Papers by Izwanizam Yahaya