Scaling down the integrated circuits has resulted in the arousal of number of problems like inter... more Scaling down the integrated circuits has resulted in the arousal of number of problems like interaction between interconnect, crosstalk, time delay etc. These problems can be overcome by new designs and by use of corresponding novel materials, which may be a solution to these problems. In the present paper we try to put forward very recent development in the use of novel materials as interlayer dielectrics (ILDs) having low dielectric constant (k) for CMOS interconnects. The materials presented here are porous and hybrid organo-inorganic new generation interlayer dielectric materials possessing low dielectric constant and better processing properties.
Scaling down the integrated circuits has resulted in the arousal of number of problems like inter... more Scaling down the integrated circuits has resulted in the arousal of number of problems like interaction between interconnect, crosstalk, time delay etc. These problems can be overcome by new designs and by use of corresponding novel materials, which may be a solution to these problems. In the present paper we try to put forward very recent development in the use of novel materials as interlayer dielectrics (ILDs) having low dielectric constant (k) for CMOS interconnects. The materials presented here are porous and hybrid organo-inorganic new generation interlayer dielectric materials possessing low dielectric constant and better processing properties.
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Papers by Veena Naik