Scientific and Clinical Applications of Magnetic Carriers, 1997
Cobalt and iron (II) dodecyl sulfate, Co(DS)2 and Fe(DS)2, are used to make CoFe2O4 and Fe,O4 nan... more Cobalt and iron (II) dodecyl sulfate, Co(DS)2 and Fe(DS)2, are used to make CoFe2O4 and Fe,O4 nanosized magnetic particles. The size of the particles is controlled by the surfactant concentration. It is possible to obtain the particles either suspended in the solvent forming a ferrofluid or as a dry powder. The average size of the particles varies from 2 to 5 nm for CoFe2O4 and from 3.7 to 11.6 nm for Fe3O4. The magnetic studies performed on particles of various size confirmed superparamagnetic behavior in each case. The saturation magnetization decreases with particle size and can be explained in terms of an increase in the noncollinear structure at the interface.
Functionalized reverse micelles are used to control the size and the polydispersity of the metall... more Functionalized reverse micelles are used to control the size and the polydispersity of the metallic and semiconductor particles. The size of the particles can be controlled, either by the amount of water solubilized in the droplets, or by the solvent used to form reverse micelles, or by adding macrocyle molecules.
The use of dispersed media to synthetize microparticles in “situ” has made considerable progress ... more The use of dispersed media to synthetize microparticles in “situ” has made considerable progress in the last few years: Reverse micelles[1], Langmuir-Blodgett films[2], zeolites[3], vesicles[4], glass matrices and sol-gel methods[5].Semiconductor nanocrystals present quantum confinement effects, called Q-dots[6]. To control the size and the shape of nanoparticles reverse and normal micelles, bicontinuous and lamellar solutions have been used.
The preparation of a fluid of cobalt ferrite particles having a size varying from 2 to 5nm is des... more The preparation of a fluid of cobalt ferrite particles having a size varying from 2 to 5nm is described. This bas been achieved by using functionalized surfactants. The size of cobalt femte particles decreases when the total reactant concentration decreases. The magnetic properties are described with magnetization curves and "Fe mossbauer spectroscopy. It is demonstrated that these particles are characterized by a superparamagnetic behavior.
The scaling of high-k gate stacks using an HF-last/NH 3 anneal bottom interface was evaluated for... more The scaling of high-k gate stacks using an HF-last/NH 3 anneal bottom interface was evaluated for EOT, N;,, and mobility effects on HfO 2 /polysilicon and HfO 2 /metal gate transistors. TEM analysis of HF-last/NH 3 bottom interface layers was also done, showing HF-last/NH 3 and O 3 bottom interface layer thickness to be identical within the resolution of the measurement. Electrical characterization showed that use of HF-last/NH 3 anneal bottom interface reduces the EOT of high-k/polysilicon gate devices by 0.3 nm and high-k/metal gate devices by about 0.15-0.2 nm with respect to the corresponding ozonated (O 3 ) interface sample. Charge pumping on the HF-last/NH 3 anneal bottom interface indicated N it density of ∼5x10 10 cm -2 , slightly greater than the O 3 interface control, with mobilities nearly equivalent to those in corresponding O 3 interface devices. These data show NH 3 bottom interface chemistry to be highly effective in scaling the EOT of HfO 2 /polysilicon and HfO 2 /me...
Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials, 2009
We demonstrate a novel simplified CMOS integration process utilizing a single metal gate electrod... more We demonstrate a novel simplified CMOS integration process utilizing a single metal gate electrode and a differential spacer scheme. Workfunction modulation by use of an oxide spacer contiguous to the pFET in combination with a capping layer was shown to achieve near band-edge Vth in a gate first scheme. Low temperature deposited oxide spacers have a high O-H content which when released into the gate stack, passivates the O vacancies in the HfO 2 thereby lowering pFET Vt. Circuit functionalities (SRAM) and Vth integrity up to five metal levels are demonstrated showing that near band-edge CMOS circuits can be obtained.
Take-down policy If you believe that this document breaches copyright please contact us providing... more Take-down policy If you believe that this document breaches copyright please contact us providing details, and we will remove access to the work immediately and investigate your claim.
Sophisticated microelectromechanical systems for device and sensor applications have flourished i... more Sophisticated microelectromechanical systems for device and sensor applications have flourished in the past decade. These devices exploit piezoelectric, capacitive, and piezoresistive effects, and coupling between them. However, high-performance piezoresistivity (as defined by on/off ratio) has primarily been observed in macroscopic single crystals. In this Letter, we show for the first time that rare-earth monochalcogenides in thin film form can modulate a current by more than 1000 times due to a pressure-induced insulator to metal transition. Furthermore, films as thin as 8 nm show a piezoresistive response. The combination of high performance and scalability make these promising candidates for nanoscale applications, such as the recently proposed piezoelectronic transistor (PET). The PET would mechanically couple a piezoelectric thin film with a piezoresistive switching layer, potentially scaling to higher speeds and lower powers than today's complementary metal-oxide-semiconductor technology.
Issues surrounding the integration of Hf-based high-k dielectrics with metal gates in a conventio... more Issues surrounding the integration of Hf-based high-k dielectrics with metal gates in a conventional CMOS flow are discussed. The careful choice of a gate stack process as well as optimization of other CMOS process steps enables robust CMOSFETs with a wide process latitude. HfO2 of a 2 nm physical thickness shows complete suppression of transient charge trapping resulting from a significant reduction in film volume as well as kinetically suppressed crystallization. Metal thickness is also critical when optimizing physical stress effects and minimizing dopant diffusion. A high temperature anneal after source and drain implantation in a conventional CMOSFET process reduces the interface state density and improves electron mobility.
We demonstrate, for the first time, a HfLaSiON/metal gate stack that concurrently achieves the fo... more We demonstrate, for the first time, a HfLaSiON/metal gate stack that concurrently achieves the following: low threshold voltage (VT=0.33V), low equivalent oxide thickness (EOT=0.91nm) (Tinv=1.3nm) and 83% SiO2 mobility. Key enablers of this result are 1) La doped HfSiON ...
Digest of Technical Papers - Symposium on VLSI Technology, 2007
Gate-first integration of band-edge (BE) high-!/metal gate nFET devices with dual stress liners a... more Gate-first integration of band-edge (BE) high-!/metal gate nFET devices with dual stress liners and silicon-on-insulator substrates for the 45nm node and beyond is presented. We show the first reported demonstration of improved short channel control with high-!/metal gates (HK/MG) enabled by the thinnest T inv (<12Å) for BE nFET devices to-date, consistent with simulations showing the need for <14Å T inv at Lgate<35nm. We report the highest BE HK/MG nFET Idsat values at 1.0V operation. We also show for the first time BE high-!/metal gate pFET's fabricated with gate-first high thermal budget processing with thin T inv (<13Å) and low Vts appropriate for pFET devices. The reliability in these devices was found to be consistent with technology requirements. Integration of high-!/metal gate nFET's into CMOS devices yielded large SRAM arrays.
It is universally recognized that the introduction of high-κ dielectrics into the manufacturing p... more It is universally recognized that the introduction of high-κ dielectrics into the manufacturing processes will eventually occur. Originally slated for introduction at the 65 nm node, high-κ dielectrics have been delayed, and their use for the 45 nm mode is in jeopardy [1]. Additionally, the gate electrode material to be used in conjunction with the high-κ dielectric has changed from poly-silicon to metal. These new gate stack materials (high-κ and metal gates) do not behave similarly to those that the industry has used for the past 30 years. Their subsequent integration into the process flow is very complex; especially the various wet clean steps associated with device fabrication. This paper will review the state of the art of three significant processes in the high-κ/metal gate stack fabrication process during which integration
The clean performed prior to gate dielectric formation has traditionally involved variations of S... more The clean performed prior to gate dielectric formation has traditionally involved variations of Standard Clean-1 (SC1) and Standard Clean-2 (SC2). These formulations mix hydrogen peroxide (H 2 O 2 ) with ammonium hydroxide (NH 4 OH) or hydrochloric acid (HCl) at various temperatures and concentrations. Since 1990, researchers have been investigating the use of ozonated water as an alternative to the SC1-SC2 chemical sequence. Ozonated water is of interest as a way to potentially reduce chemical usage, lower cost, and improve clean performance. This work compares a clean using ozonated water (O 3 ) to cleans utilizing SC 1 and SC2. Devices with 21 A gate dielectric oxides are used to identify the impact of the clean on transconductance, saturation current, and mobility. This paper also proposes explanations for observed performance differences.
Les emulsions offrent un milieu de synthese aux multiples qualites qui permettent un meilleur con... more Les emulsions offrent un milieu de synthese aux multiples qualites qui permettent un meilleur controle de la reaction chimique et un degre de liberte plus eleve pour intervenir sur les proprietes morphologiques telles que la taille et la forme. Grace a l'utilisation des micelles directes (gouttelettes d'huile dans l'eau), nous avons reussi a preparer une serie d'echantillons de particules magnetiques de ferrite de cobalt cofe#2o#4 de taille calibree allant de 2 a 5 nm avec une polydispersite de 30%. La taille des particules a ete determinee par microscopie electronique a transmission, diffusion des rayons x aux petits angles et enfin par diffraction des rayons x. Les mesures d'aimantation, et l'etude par spectroscopie mossbauer en fonction de la temperature, ont montre un comportement superparamagnetique de ces nanoparticules, la constante d'anisotropie mesure par ces deux techniques augmente quand la taille diminue
Scientific and Clinical Applications of Magnetic Carriers, 1997
Cobalt and iron (II) dodecyl sulfate, Co(DS)2 and Fe(DS)2, are used to make CoFe2O4 and Fe,O4 nan... more Cobalt and iron (II) dodecyl sulfate, Co(DS)2 and Fe(DS)2, are used to make CoFe2O4 and Fe,O4 nanosized magnetic particles. The size of the particles is controlled by the surfactant concentration. It is possible to obtain the particles either suspended in the solvent forming a ferrofluid or as a dry powder. The average size of the particles varies from 2 to 5 nm for CoFe2O4 and from 3.7 to 11.6 nm for Fe3O4. The magnetic studies performed on particles of various size confirmed superparamagnetic behavior in each case. The saturation magnetization decreases with particle size and can be explained in terms of an increase in the noncollinear structure at the interface.
Functionalized reverse micelles are used to control the size and the polydispersity of the metall... more Functionalized reverse micelles are used to control the size and the polydispersity of the metallic and semiconductor particles. The size of the particles can be controlled, either by the amount of water solubilized in the droplets, or by the solvent used to form reverse micelles, or by adding macrocyle molecules.
The use of dispersed media to synthetize microparticles in “situ” has made considerable progress ... more The use of dispersed media to synthetize microparticles in “situ” has made considerable progress in the last few years: Reverse micelles[1], Langmuir-Blodgett films[2], zeolites[3], vesicles[4], glass matrices and sol-gel methods[5].Semiconductor nanocrystals present quantum confinement effects, called Q-dots[6]. To control the size and the shape of nanoparticles reverse and normal micelles, bicontinuous and lamellar solutions have been used.
The preparation of a fluid of cobalt ferrite particles having a size varying from 2 to 5nm is des... more The preparation of a fluid of cobalt ferrite particles having a size varying from 2 to 5nm is described. This bas been achieved by using functionalized surfactants. The size of cobalt femte particles decreases when the total reactant concentration decreases. The magnetic properties are described with magnetization curves and "Fe mossbauer spectroscopy. It is demonstrated that these particles are characterized by a superparamagnetic behavior.
The scaling of high-k gate stacks using an HF-last/NH 3 anneal bottom interface was evaluated for... more The scaling of high-k gate stacks using an HF-last/NH 3 anneal bottom interface was evaluated for EOT, N;,, and mobility effects on HfO 2 /polysilicon and HfO 2 /metal gate transistors. TEM analysis of HF-last/NH 3 bottom interface layers was also done, showing HF-last/NH 3 and O 3 bottom interface layer thickness to be identical within the resolution of the measurement. Electrical characterization showed that use of HF-last/NH 3 anneal bottom interface reduces the EOT of high-k/polysilicon gate devices by 0.3 nm and high-k/metal gate devices by about 0.15-0.2 nm with respect to the corresponding ozonated (O 3 ) interface sample. Charge pumping on the HF-last/NH 3 anneal bottom interface indicated N it density of ∼5x10 10 cm -2 , slightly greater than the O 3 interface control, with mobilities nearly equivalent to those in corresponding O 3 interface devices. These data show NH 3 bottom interface chemistry to be highly effective in scaling the EOT of HfO 2 /polysilicon and HfO 2 /me...
Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials, 2009
We demonstrate a novel simplified CMOS integration process utilizing a single metal gate electrod... more We demonstrate a novel simplified CMOS integration process utilizing a single metal gate electrode and a differential spacer scheme. Workfunction modulation by use of an oxide spacer contiguous to the pFET in combination with a capping layer was shown to achieve near band-edge Vth in a gate first scheme. Low temperature deposited oxide spacers have a high O-H content which when released into the gate stack, passivates the O vacancies in the HfO 2 thereby lowering pFET Vt. Circuit functionalities (SRAM) and Vth integrity up to five metal levels are demonstrated showing that near band-edge CMOS circuits can be obtained.
Take-down policy If you believe that this document breaches copyright please contact us providing... more Take-down policy If you believe that this document breaches copyright please contact us providing details, and we will remove access to the work immediately and investigate your claim.
Sophisticated microelectromechanical systems for device and sensor applications have flourished i... more Sophisticated microelectromechanical systems for device and sensor applications have flourished in the past decade. These devices exploit piezoelectric, capacitive, and piezoresistive effects, and coupling between them. However, high-performance piezoresistivity (as defined by on/off ratio) has primarily been observed in macroscopic single crystals. In this Letter, we show for the first time that rare-earth monochalcogenides in thin film form can modulate a current by more than 1000 times due to a pressure-induced insulator to metal transition. Furthermore, films as thin as 8 nm show a piezoresistive response. The combination of high performance and scalability make these promising candidates for nanoscale applications, such as the recently proposed piezoelectronic transistor (PET). The PET would mechanically couple a piezoelectric thin film with a piezoresistive switching layer, potentially scaling to higher speeds and lower powers than today&amp;amp;amp;amp;#39;s complementary metal-oxide-semiconductor technology.
Issues surrounding the integration of Hf-based high-k dielectrics with metal gates in a conventio... more Issues surrounding the integration of Hf-based high-k dielectrics with metal gates in a conventional CMOS flow are discussed. The careful choice of a gate stack process as well as optimization of other CMOS process steps enables robust CMOSFETs with a wide process latitude. HfO2 of a 2 nm physical thickness shows complete suppression of transient charge trapping resulting from a significant reduction in film volume as well as kinetically suppressed crystallization. Metal thickness is also critical when optimizing physical stress effects and minimizing dopant diffusion. A high temperature anneal after source and drain implantation in a conventional CMOSFET process reduces the interface state density and improves electron mobility.
We demonstrate, for the first time, a HfLaSiON/metal gate stack that concurrently achieves the fo... more We demonstrate, for the first time, a HfLaSiON/metal gate stack that concurrently achieves the following: low threshold voltage (VT=0.33V), low equivalent oxide thickness (EOT=0.91nm) (Tinv=1.3nm) and 83% SiO2 mobility. Key enablers of this result are 1) La doped HfSiON ...
Digest of Technical Papers - Symposium on VLSI Technology, 2007
Gate-first integration of band-edge (BE) high-!/metal gate nFET devices with dual stress liners a... more Gate-first integration of band-edge (BE) high-!/metal gate nFET devices with dual stress liners and silicon-on-insulator substrates for the 45nm node and beyond is presented. We show the first reported demonstration of improved short channel control with high-!/metal gates (HK/MG) enabled by the thinnest T inv (<12Å) for BE nFET devices to-date, consistent with simulations showing the need for <14Å T inv at Lgate<35nm. We report the highest BE HK/MG nFET Idsat values at 1.0V operation. We also show for the first time BE high-!/metal gate pFET's fabricated with gate-first high thermal budget processing with thin T inv (<13Å) and low Vts appropriate for pFET devices. The reliability in these devices was found to be consistent with technology requirements. Integration of high-!/metal gate nFET's into CMOS devices yielded large SRAM arrays.
It is universally recognized that the introduction of high-κ dielectrics into the manufacturing p... more It is universally recognized that the introduction of high-κ dielectrics into the manufacturing processes will eventually occur. Originally slated for introduction at the 65 nm node, high-κ dielectrics have been delayed, and their use for the 45 nm mode is in jeopardy [1]. Additionally, the gate electrode material to be used in conjunction with the high-κ dielectric has changed from poly-silicon to metal. These new gate stack materials (high-κ and metal gates) do not behave similarly to those that the industry has used for the past 30 years. Their subsequent integration into the process flow is very complex; especially the various wet clean steps associated with device fabrication. This paper will review the state of the art of three significant processes in the high-κ/metal gate stack fabrication process during which integration
The clean performed prior to gate dielectric formation has traditionally involved variations of S... more The clean performed prior to gate dielectric formation has traditionally involved variations of Standard Clean-1 (SC1) and Standard Clean-2 (SC2). These formulations mix hydrogen peroxide (H 2 O 2 ) with ammonium hydroxide (NH 4 OH) or hydrochloric acid (HCl) at various temperatures and concentrations. Since 1990, researchers have been investigating the use of ozonated water as an alternative to the SC1-SC2 chemical sequence. Ozonated water is of interest as a way to potentially reduce chemical usage, lower cost, and improve clean performance. This work compares a clean using ozonated water (O 3 ) to cleans utilizing SC 1 and SC2. Devices with 21 A gate dielectric oxides are used to identify the impact of the clean on transconductance, saturation current, and mobility. This paper also proposes explanations for observed performance differences.
Les emulsions offrent un milieu de synthese aux multiples qualites qui permettent un meilleur con... more Les emulsions offrent un milieu de synthese aux multiples qualites qui permettent un meilleur controle de la reaction chimique et un degre de liberte plus eleve pour intervenir sur les proprietes morphologiques telles que la taille et la forme. Grace a l'utilisation des micelles directes (gouttelettes d'huile dans l'eau), nous avons reussi a preparer une serie d'echantillons de particules magnetiques de ferrite de cobalt cofe#2o#4 de taille calibree allant de 2 a 5 nm avec une polydispersite de 30%. La taille des particules a ete determinee par microscopie electronique a transmission, diffusion des rayons x aux petits angles et enfin par diffraction des rayons x. Les mesures d'aimantation, et l'etude par spectroscopie mossbauer en fonction de la temperature, ont montre un comportement superparamagnetique de ces nanoparticules, la constante d'anisotropie mesure par ces deux techniques augmente quand la taille diminue
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