Papers by Muhammad Arsalan
2010 IEEE Antennas and Propagation Society International Symposium, 2010
2017 IEEE SENSORS, 2017
Level sensors find numerous applications in many industries to automate the processes involving c... more Level sensors find numerous applications in many industries to automate the processes involving chemicals. Recently, some commercial ultrasound based level sensors are also being used to automate the drug delivery process [1]. Some of the most desirable features of level sensors to be used for medical use are their non-intrusiveness, low cost and consistent performance. In this demo, we will present a completely new method of sensing the liquid level using microwaves. It is a common stereotype to consider microwaves sensing mechanism as being expensive. Unlike usual expensive, intrusive and bulky microwave methods of level sensing using guided radars, we will present an extremely low cost printed, non-intrusive microwave sensor to reliably sense the liquid level.
IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2012
N. Garry Tarr (M'86) was born in Vancouver, BC, Canada, in 1956. He received the B.Sc. degree in ... more N. Garry Tarr (M'86) was born in Vancouver, BC, Canada, in 1956. He received the B.Sc. degree in physics and the Ph.D. degree in electrical engineering from the
IEEE Transactions on Circuits and Systems II: Express Briefs, 2014
In this brief, an energy-efficient capacitance-todigital converter (CDC) is presented. The propos... more In this brief, an energy-efficient capacitance-todigital converter (CDC) is presented. The proposed CDC uses digitally controlled coarse-fine multi-slope integration to digitize a wide range of capacitance in short conversion time. Both integration current and frequency are scaled, which leads to significant improvement in the energy efficiency of both analog and digital circuitry. Mathematical analysis for circuit nonidealities, noise, and improvement in energy efficiency is provided. A prototype fabricated in a 0.35-μm CMOS process occupies 0.09 mm 2 and consumes a total of 153 μA from 3.3 V supply while achieving 13-bit resolution. The operation of the prototype is experimentally verified using MEMS capacitive pressure sensor. Compared to recently published work, the prototype achieves an excellent energy efficiency of 7.9 pJ/Step.
Proceedings of the 12th annual conference companion on Genetic and evolutionary computation, 2010
... [email protected] Sana Ambreen Malik DCIS, Pakistan Institute of Engineering and Appli... more ... [email protected] Sana Ambreen Malik DCIS, Pakistan Institute of Engineering and Applied Sciences. Nilore-45650, Islamabad, Pakistan. [email protected] AsifullahKhan DCIS, Pakistan Institute of Engineering and Applied Sciences. ...
Microwave and Optical Technology Letters, 2015
ABSTRACT A 60-GHz fundamental frequency phase locked loop (PLL) as part of a highly integrated sy... more ABSTRACT A 60-GHz fundamental frequency phase locked loop (PLL) as part of a highly integrated system-on-chip transmitter with on-chip memory and antenna is presented. As a result of localized optimization approach for each component, the PLL core components only consume 30.2 mW from a 1.2 V supply. A systematic design procedure to achieve high phase margin and wide locking range is presented. The reduction of parasitic and fixed capacitance contributions in the voltage controlled oscillator enables the coverage of the complete 802.11 ad frequency band from 57.2 to 65.8 GHz. A new 4-stage distribution network supplying the local oscillator (LO) signal to the mixer, the feedback loop and the external equipment is introduced. The prescaler based on the static frequency division approach is enhanced using shunt-peaking and asymmetric capacitive loading. The current mode logic based divider chain is optimized for low power and minimum silicon foot-print. A dead-zone free phase frequency detector, low leakage charge pump, and an integrated second-order passive filter completes the feedback loop. The PLL implemented in 65 nm CMOS process occupies only 0.6 mm2 of chip space and has a measured locking range from 56.8 to 66.5 GHz. The reference spurs are lower than −40 dBc and the in-band and out-of-band phase noise is −88.12 dBc/Hz and −117 dBc/Hz, respectively. © 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:660–667, 2015
2012 10th International Conference on Frontiers of Information Technology, 2012
ABSTRACT On Nov. 2, 2007, NIST announced a public competition to develop a new cryptographic hash... more ABSTRACT On Nov. 2, 2007, NIST announced a public competition to develop a new cryptographic hash algorithm SHA-3. After long run selection process, five finalists were selected for Round 3. Winner of this competition will be announced later in 2012. Blake is one of the candidates of round three of this competition. Along with the strength of security, efficient hardware implementation is also major evaluation criteria for final selection. Blake algorithm compression function is based on G-Function which executes 8 times in one round. In this paper, different architecture schemes named as 8G, 4G and 1G has been implemented on FPGA, based on serialization of Round Function processes. Optimization is performed by selecting appropriate numbers of LUTs and Slice Registers according to the Virtex 5 Device Architecture Resources. Implementation results of each design are compared with each other and with other design contributions. Full autonomous design for each scheme is implemented on Virtex 5 xc5vlx50t-3 FPGA. Common I/O and control interface is provided to find out the fair comparison results. For tradeoff analysis three design optimization techniques based on 'area', 'speed' and 'balance' designs are used. We found 8G architecture provides the best through-put, 1G provides least area implementation and 4G provides the most efficient results in terms of throughput per area (TPA). 4G design gives Tpa of 2.1. Our design methodology and optimization strategy gives improved results from previous contributions.
2013 IEEE 9th International Conference on Emerging Technologies (ICET), 2013
NIST announced a public competition on Nov. 2, 2007 to develop a new cryptographic hash algorithm... more NIST announced a public competition on Nov. 2, 2007 to develop a new cryptographic hash algorithm. Blake is one of the candidate among five finalist selected in round three of this competition. One of the major evaluation criteria of the candidate algorithm is efficient hardware implementation. In this paper compact area-efficient design of Blake-256 algorithm is implemented on FPGA. Horizontal Folding and pipelining technique is used in which two Half-G functions are used to execute overall round function. Distributed Block Memory is used for storing permutation table values. Full autonomous design is implemented on Virtex 5 LX-50T FPGA. The Post Place and Route results shows area utilization of 415 Slices with the maximum achieved frequency of 196 MHz and throughput of the design is calculated as 717 Mbps. Throughput per Area of our design is 1.72 which shows the significant improvement in results from all previous reported work.
2012 International Conference on Open Source Systems and Technologies, 2012
ABSTRACT Product manufacturing industries growth and efficiency greatly depends upon the quality ... more ABSTRACT Product manufacturing industries growth and efficiency greatly depends upon the quality of end product. Hence, it is necessary to inspect each and every object for its quality during manufacturing process. Machine Vision system can be implies here for indispensable advantages. Commercial Vision systems available in market are very expensive. Industries especially in third world countries like Pakistan it is not easy for them to utilize Typical Machine Vision System in place of conventional measuring methods due to economic reasons. Keeping this scenario in mind, an attempt was made to develop a Low-Cost Machine Vision System. The paper presents a design of Machine Vision System capable of object monitoring with the resolution up to 0.3mm. Real time Image processing of moving conveyor objects has performed. Different measurement inspection procedures have been performed including length measurement, diameter measurement and object feature counting. Practical Project Testing gives out measurement results up to 99% accuracy.
Journal of Systems and Software, 2012
... Highlights Page 2 of 29 Ac ce pte d M an usc rip t 1 Intelligent Reversible Watermarking in I... more ... Highlights Page 2 of 29 Ac ce pte d M an usc rip t 1 Intelligent Reversible Watermarking in Integer Wavelet Domain for Medical Images Muhammad Arsalan, Sana ... It is thus a challenging task to achieve high degree of data security, reliability and authenticity of digital images. ...
IEEE Transactions on Microwave Theory and Techniques, 2013
A first fully integrated 5.2-GHz CMOS-based RF power harvester with an on-chip antenna is present... more A first fully integrated 5.2-GHz CMOS-based RF power harvester with an on-chip antenna is presented in this paper. The design is optimized for sensors implanted inside the eye to wirelessly monitor the intraocular pressure of glaucoma patients. It includes a five-stage RF rectifier with an on-chip antenna, a dc voltage limiter, two voltage sensors, a low dropout voltage regulator, and MOSCAP based on-chip storage. The chip has been designed and fabricated in a standard 0.18-m CMOS technology. To emulate the eye environment in measurements, a custom test setup is developed that comprises Plexiglass cavities filled with saline solution. Measurements in this setup show that the proposed chip can be charged to 1 V wirelessly from a 5-W transmitter 3 cm away from the harvester chip. The energy that is stored on the 5-nF on-chip MOSCAP when charged to 1 V is 2.5 nJ, which is sufficient to drive an arbitrary 100-W load for 9 s at regulated 0.8 V. Simulated efficiency of the rectifier is 42% at 7 dBm of input power.
IEEE Transactions on Circuits and Systems II: Express Briefs, 2008
A new floating-gate (FG) MOSFET based wireless dosimeter system-in-package (SiP) is presented. Th... more A new floating-gate (FG) MOSFET based wireless dosimeter system-in-package (SiP) is presented. This miniature and completely integrated wireless dosimeter SiP comprises a CMOS FG radiation sensor and transmitter (TX) in a low-temperature co-fired ceramic (LTCC) package. The design is very well suited to wireless transmission of radiation sensor data in radiotherapy and to Extra Vehicular Activity Radiation Monitoring (EVARM) in space. Two different solutions, namely system-on-chip (SoC) and SiP, are demonstrated. In the SoC, which is size and power efficient, the TX includes an on-chip loop antenna which also acts as the inductor for the VCO resonant tank circuit. The SiP solution has an LTCC antenna with optimized impedance to conjugate match the TX chip. The radiation sensor demonstrates a measured sensitivity of 5 mV/rad. The SoC module size is only 2 mm 2 , consumes 5.3 mW of power and delivers 0.9 dBm of radiated power, sufficient to communicate with a low noise receiver connected to an off-chip patch antenna placed 1.38 m away. The SiP design provides a larger communication range of 75 m at the cost of additional power consumption and size. Index Terms-Integrated transmitter, low-temperature co-fired ceramic (LTCC), on-chip antenna, system-in-package (SiP), system-on-chip (SoC), wireless dosimeter.
2013 IEEE MTT-S International Microwave Workshop Series on RF and Wireless Technologies for Biomedical and Healthcare Applications (IMWS-BIO), 2013
ABSTRACT Design considerations and limitations of implantable Intraocular Pressure Monitoring (IO... more ABSTRACT Design considerations and limitations of implantable Intraocular Pressure Monitoring (IOPM) systems are presented in this paper. Detailed comparison with the state of the art is performed to highlight the benefits and challenges of the proposed design. The system-on-chip, presented here, is battery free and harvests energy from incoming RF signals. This low-cost design, in standard CMOS process, does not require any external components or bond wires to function. This paper provides useful insights to the designers of implantable wireless sensors in terms of design choices and associated tradeoffs.
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Papers by Muhammad Arsalan