The increasing sub-threshold leakage current levels with newer technology nodes has been identifi... more The increasing sub-threshold leakage current levels with newer technology nodes has been identified by ITRS 1 as one of the major fundamental problems faced by the semiconductor industry. Concurrently, the expected performance improvement and functionality integration expectations drive the continued reduction in feature size. This results in ever-increasing power per unit area and the accompanying problem of heat removal and cooling. 2 Portable battery-powered applications, fuelled by pervasive and embedded computing, in the last few years have seen a tremendous growth and have reached a point where battery power can't be increased further. 3 This raises the computational throughput per watt target for the future technology nodes. SRAM arrays which are used widely as a system component, such as caches and register files, in both high-performance and portable systems, are getting to be dominant power consumers because of their large capacity and area. Hence any reduction in cache energy can result in considerable overall power reduction. In this paper, we propose a novel circuit technique using depletion mode devices, to reduce the static energy of SRAM array in an on-chip cache by 90% without any performance impact.
In today's dynamic marketplace, manufacturing companies are under strong pressure to introduce ne... more In today's dynamic marketplace, manufacturing companies are under strong pressure to introduce new products for long-term survival with their competitors. Nevertheless, every company cannot cope up progressively or immediately with the market requirements due to knowledge dynamics being experienced in the competitive milieu. Increased competition and reduced product life cycles put force upon companies to develop new products faster. In response to these pressing needs, there should be some new approach compatible in flexible circumstances. This paper presents a solution based on the popular Stage-Gate system, which is closely linked with virtual team approach. Virtual teams can provide a platform to advance the knowledge-base in a company and thus to reduce time-to-market. This article introduces conceptual product development architecture under a virtual team umbrella. The paper describes all the major aspects of new product development (NPD), NPD process and its relationship with virtual teams, Stage-Gate system finally presents a modified Stage-Gate system to cope up with the changing needs. It also provides the guidelines for the successful implementation of virtual teams in new product development.
ChemInform is a weekly Abstracting Service, delivering concise information at a glance that was e... more ChemInform is a weekly Abstracting Service, delivering concise information at a glance that was extracted from about 100 leading journals. To access a ChemInform Abstract of an article which was published elsewhere, please select a “Full Text” option. The original article is trackable via the “References” option.
The increasing sub-threshold leakage current levels with newer technology nodes has been identifi... more The increasing sub-threshold leakage current levels with newer technology nodes has been identified by ITRS 1 as one of the major fundamental problems faced by the semiconductor industry. Concurrently, the expected performance improvement and functionality integration expectations drive the continued reduction in feature size. This results in ever-increasing power per unit area and the accompanying problem of heat removal and cooling. 2 Portable battery-powered applications, fuelled by pervasive and embedded computing, in the last few years have seen a tremendous growth and have reached a point where battery power can't be increased further. 3 This raises the computational throughput per watt target for the future technology nodes. SRAM arrays which are used widely as a system component, such as caches and register files, in both high-performance and portable systems, are getting to be dominant power consumers because of their large capacity and area. Hence any reduction in cache energy can result in considerable overall power reduction. In this paper, we propose a novel circuit technique using depletion mode devices, to reduce the static energy of SRAM array in an on-chip cache by 90% without any performance impact.
In today's dynamic marketplace, manufacturing companies are under strong pressure to introduce ne... more In today's dynamic marketplace, manufacturing companies are under strong pressure to introduce new products for long-term survival with their competitors. Nevertheless, every company cannot cope up progressively or immediately with the market requirements due to knowledge dynamics being experienced in the competitive milieu. Increased competition and reduced product life cycles put force upon companies to develop new products faster. In response to these pressing needs, there should be some new approach compatible in flexible circumstances. This paper presents a solution based on the popular Stage-Gate system, which is closely linked with virtual team approach. Virtual teams can provide a platform to advance the knowledge-base in a company and thus to reduce time-to-market. This article introduces conceptual product development architecture under a virtual team umbrella. The paper describes all the major aspects of new product development (NPD), NPD process and its relationship with virtual teams, Stage-Gate system finally presents a modified Stage-Gate system to cope up with the changing needs. It also provides the guidelines for the successful implementation of virtual teams in new product development.
ChemInform is a weekly Abstracting Service, delivering concise information at a glance that was e... more ChemInform is a weekly Abstracting Service, delivering concise information at a glance that was extracted from about 100 leading journals. To access a ChemInform Abstract of an article which was published elsewhere, please select a “Full Text” option. The original article is trackable via the “References” option.
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Papers by Akhilesh Ajay