ABSTRACT Selectorless crossbar arrays of resistive random-access memory (RRAM), also known as mem... more ABSTRACT Selectorless crossbar arrays of resistive random-access memory (RRAM), also known as memristors, conduct large sneak currents during operation, which can significantly corrupt the accuracy of cross-point analog resistance ( ) measurements. In order to mitigate this issue, we have designed, built, and tested a memristor characterization and testing (mCAT) instrument that forces redistribution of sneak currents within the crossbar array, dramatically increasing measurement accuracy. We calibrated the mCAT using a custom-made discrete resistive crossbar array, and subsequently demonstrated its functionality on solid-state TiO2-x RRAM arrays, on wafer and packaged, of the same size. Our platform can measure standalone in the range of 1 to 1 with <1% error. For our custom resistive crossbar, 90% of devices of the same resistance range were measured with <10% error. The platform’s limitations have been quantified using large-scale nonideal crossbar simulations.
IEEE Transactions on Circuits and Systems II: Express Briefs, 2015
ABSTRACT Devices that exhibit resistive switching are promising components for future nanoelectro... more ABSTRACT Devices that exhibit resistive switching are promising components for future nanoelectronics with applications ranging from emerging memory to neuromorphic computing and biosensors. In this brief, we present an algorithm for identifying switchable devices, i.e., devices that can be programmed in distinct resistive states and that change their state predictably and repeatedly in response to input stimuli. The method is based on extrapolating the statistical significance of difference in between two distinct resistive states as measured from devices subjected to standardized bias protocols. The test routine is applied on distinct elements of 32 32 resistive-random-access-memory (RRAM) crossbar arrays and yields a measure of device switchability in the form of a statistical significance -value. Ranking devices by -value shows that switchable devices are typically found in the bottom 10% and are therefore easily distinguishable from nonfunctional devices. Implementation of this algorithm dramatically cuts RRAM testing time by granting fast access to the best devices in each array, as well as yield metrics.
2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Short-term synaptic plasticity (STP) is a mechanism identified in brain systems according to whic... more Short-term synaptic plasticity (STP) is a mechanism identified in brain systems according to which the effective connection strength (synaptic strength) between two neurons varies dynamically with recent communication history. As a consequence, the amplitude of the post-synaptic potential in response to a single pre-synaptic event, so-called "spike", may increase (short-term facilitation) or decrease (short-term depression) with consecutive presynaptic stimulation. However, in contrast to Long-term Synaptic plasticity, these changes are temporary and are typically restored in the absence of input. Interestingly, however, a single neuron which receives input via both facilitating and depressing synapses has improved discrimination capability, distinguishing, for instance, between a sequence of events and a sequence of the same events presented in the reversed order. We, therefore, studied the memory mechanisms in emerging non-CMOS devices with a view to application in temporal pattern recognition and detection, inspired by the STP mechanisms. In particular, we demonstrate that memristors can exhibit a resembling behavior to STP due to an inherent volatility and hysteresis. When stimulated by closely spaced pulse waves, the conductance of the device decreases similar to what a depressing synapse would do if presented with consecutive pre-synaptic spikes. This work paves the way for employing memristors in solving spatio-temporal sequence learning problems.
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014
ABSTRACT We demonstrate a practical application of memristors in a cross-bar memory array. The fu... more ABSTRACT We demonstrate a practical application of memristors in a cross-bar memory array. The full set-up consists of only a PC, an mBED microcontroller and a PCB hosting external components and the memristor cross-bar chip. The system can be used for general purpose memory storage, but in this case we use it as a binary image storage device. A MATLAB interface allows the user to load a binary image into the memory and observe the resulting internal memory states of each memristor in the array along with key performance metrics describing the speed and degree of success of the memory 'write' operation.
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014
ABSTRACT Accurate modeling of memristive devices is a critical condition that will allow the real... more ABSTRACT Accurate modeling of memristive devices is a critical condition that will allow the realization of large-scale memristor based circuits. The current methodology regarding modeling focuses on obtaining realistic pinched hysteresis curves, which are memristor signatures, but these do not hold useful information regarding device performance. We divert from this practice and propose a SPICE memristor model constructed based on qualitative verified assumptions of real memristive device operation. Our model introduces volatile effects that render a rate-dependent operation, and also accounts for both bipolar and unipolar switching. We demonstrate its plausibility via a wealth of simulation cases, which are qualitatively similar to several memristor dynamics reported in literature. Finally our model is benchmarked against measured results acquired by solid-state TiO2 memristors.
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014
ABSTRACT Event-based computation is a well-established way of reducing the complexity of neural m... more ABSTRACT Event-based computation is a well-established way of reducing the complexity of neural modelling, often used as an enabling step towards the simulation of large neuronal ensembles. Recently, the advent of the physical memristor has provided the scientific community with a stand-alone nanoelectronic device that exhibits strongly 'synapse-like' behaviour and can be used in general neural modelling. In this paper we review the suitability of the most common, basic memristor models for use in tandem with event-based techniques and conclude that neither of them can support spike timing-dependent plasticity (STDP); a staple of modern neuroscience.We then identify the necessary attributes of any model that can enmesh STDP into event-based computation and present measured results evidencing that solid-state TiO2-based memristors intrinsically support such feature.
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014
ABSTRACT In this paper we present a practical approach to employ solid-state TiO2 memristors as t... more ABSTRACT In this paper we present a practical approach to employ solid-state TiO2 memristors as tunable loads in filter configurations. First, memristive devices are employed in discrete realizations of tunable active filter topologies. Using an external programming circuit to set the devices to a desired memristive state enables control of the filter's characteristics, namely passband boundaries and quality factor. Utilization of a memristor as a tunable load in low-pass and band-pass filter topologies is then experimentally demonstrated. We further expand this concept by demonstrating an amplitude-controlled gain amplifier topology. In this topology, instead of using external control circuitry to set the memristive state, the state is set internally during operation, providing an automatic gain control.
This work exploits the switching dynamics of nanoscale resistive random access memory (ReRAM) cel... more This work exploits the switching dynamics of nanoscale resistive random access memory (ReRAM) cells with particular emphasis on the origin of the observed variability when cells are consecutively cycled/programmed at distinct memory states. It is demonstrated that this variance is a common feature of all ReRAM elements and is ascribed to the formation and rupture of conductive filaments that expand across the active core, independently of the material employed as the active switching core, the causal physical switching mechanism, the switching mode (bipolar/unipolar) or even the unit cells' dimensions. Our hypothesis is supported through both experimental and theoretical studies on TiO 2 and In 2 O 3 : SnO 2 (ITO) based ReRAM cells programmed at three distinct resistive states. Our prototypes employed TiO 2 or ITO active cores over 5 × 5 µm 2 and 100 × 100 µm 2 cell areas, with all tested devices demonstrating both unipolar and bipolar switching modalities. In the case of TiO 2 -based cells, the underlying switching mechanism is based on the non-uniform displacement of ionic species that foster the formation of conductive filaments. On the other hand, the resistive switching observed in the ITO-based devices is considered to be due to a phase change mechanism. The selected experimental parameters allowed us to demonstrate that the observed programming variance is a common feature of all ReRAM devices, proving that its origin is dependent upon randomly oriented local disorders within the active core that have a substantial impact on the overall state variance, particularly for high-resistive states.
ABSTRACT Realizing large-scale circuits utilizing emerging nanoionic devices known as memristors ... more ABSTRACT Realizing large-scale circuits utilizing emerging nanoionic devices known as memristors depends on the accurate modeling of their behavior under a wide range of biasing conditions. Currently, no available SPICE memristor model accounts for both nonvolatile and volatile resistive switching characteristics, the coexistence of which has been recently demonstrated to manifest on practical ReRAM. In this letter, we present a new memristor SPICE model that introduces volatile effects, which can render a rate-dependent bipolar nonvolatile switching operation. The model is demonstrated via a number of simulation cases and is benchmarked against measured results acquired by solid-state TiO2 ReRAM.
An insight into voltage-biased superconducting quantum interference devices Appl. Phys. Lett. 101... more An insight into voltage-biased superconducting quantum interference devices Appl. Phys. Lett. 101, 222602 (2012) The energy transfer between the ports of an implemented gyrator using LM13700 operational transconductance amplifier Rev. Sci. Instrum. 83, 114702 (2012) A low noise single-transistor transimpedance preamplifier for Fourier-transform mass spectrometry using a T feedback network Rev. Sci. Instrum. 83, 094102 (2012) Design and analysis of a radio frequency extractor in an S-band relativistic klystron amplifier Rev. Sci. Instrum. 83, 094703 (2012) Additional information on Appl. Phys. Lett.
ABSTRACT Selectorless crossbar arrays of resistive random-access memory (RRAM), also known as mem... more ABSTRACT Selectorless crossbar arrays of resistive random-access memory (RRAM), also known as memristors, conduct large sneak currents during operation, which can significantly corrupt the accuracy of cross-point analog resistance ( ) measurements. In order to mitigate this issue, we have designed, built, and tested a memristor characterization and testing (mCAT) instrument that forces redistribution of sneak currents within the crossbar array, dramatically increasing measurement accuracy. We calibrated the mCAT using a custom-made discrete resistive crossbar array, and subsequently demonstrated its functionality on solid-state TiO2-x RRAM arrays, on wafer and packaged, of the same size. Our platform can measure standalone in the range of 1 to 1 with <1% error. For our custom resistive crossbar, 90% of devices of the same resistance range were measured with <10% error. The platform’s limitations have been quantified using large-scale nonideal crossbar simulations.
IEEE Transactions on Circuits and Systems II: Express Briefs, 2015
ABSTRACT Devices that exhibit resistive switching are promising components for future nanoelectro... more ABSTRACT Devices that exhibit resistive switching are promising components for future nanoelectronics with applications ranging from emerging memory to neuromorphic computing and biosensors. In this brief, we present an algorithm for identifying switchable devices, i.e., devices that can be programmed in distinct resistive states and that change their state predictably and repeatedly in response to input stimuli. The method is based on extrapolating the statistical significance of difference in between two distinct resistive states as measured from devices subjected to standardized bias protocols. The test routine is applied on distinct elements of 32 32 resistive-random-access-memory (RRAM) crossbar arrays and yields a measure of device switchability in the form of a statistical significance -value. Ranking devices by -value shows that switchable devices are typically found in the bottom 10% and are therefore easily distinguishable from nonfunctional devices. Implementation of this algorithm dramatically cuts RRAM testing time by granting fast access to the best devices in each array, as well as yield metrics.
2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Short-term synaptic plasticity (STP) is a mechanism identified in brain systems according to whic... more Short-term synaptic plasticity (STP) is a mechanism identified in brain systems according to which the effective connection strength (synaptic strength) between two neurons varies dynamically with recent communication history. As a consequence, the amplitude of the post-synaptic potential in response to a single pre-synaptic event, so-called "spike", may increase (short-term facilitation) or decrease (short-term depression) with consecutive presynaptic stimulation. However, in contrast to Long-term Synaptic plasticity, these changes are temporary and are typically restored in the absence of input. Interestingly, however, a single neuron which receives input via both facilitating and depressing synapses has improved discrimination capability, distinguishing, for instance, between a sequence of events and a sequence of the same events presented in the reversed order. We, therefore, studied the memory mechanisms in emerging non-CMOS devices with a view to application in temporal pattern recognition and detection, inspired by the STP mechanisms. In particular, we demonstrate that memristors can exhibit a resembling behavior to STP due to an inherent volatility and hysteresis. When stimulated by closely spaced pulse waves, the conductance of the device decreases similar to what a depressing synapse would do if presented with consecutive pre-synaptic spikes. This work paves the way for employing memristors in solving spatio-temporal sequence learning problems.
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014
ABSTRACT We demonstrate a practical application of memristors in a cross-bar memory array. The fu... more ABSTRACT We demonstrate a practical application of memristors in a cross-bar memory array. The full set-up consists of only a PC, an mBED microcontroller and a PCB hosting external components and the memristor cross-bar chip. The system can be used for general purpose memory storage, but in this case we use it as a binary image storage device. A MATLAB interface allows the user to load a binary image into the memory and observe the resulting internal memory states of each memristor in the array along with key performance metrics describing the speed and degree of success of the memory 'write' operation.
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014
ABSTRACT Accurate modeling of memristive devices is a critical condition that will allow the real... more ABSTRACT Accurate modeling of memristive devices is a critical condition that will allow the realization of large-scale memristor based circuits. The current methodology regarding modeling focuses on obtaining realistic pinched hysteresis curves, which are memristor signatures, but these do not hold useful information regarding device performance. We divert from this practice and propose a SPICE memristor model constructed based on qualitative verified assumptions of real memristive device operation. Our model introduces volatile effects that render a rate-dependent operation, and also accounts for both bipolar and unipolar switching. We demonstrate its plausibility via a wealth of simulation cases, which are qualitatively similar to several memristor dynamics reported in literature. Finally our model is benchmarked against measured results acquired by solid-state TiO2 memristors.
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014
ABSTRACT Event-based computation is a well-established way of reducing the complexity of neural m... more ABSTRACT Event-based computation is a well-established way of reducing the complexity of neural modelling, often used as an enabling step towards the simulation of large neuronal ensembles. Recently, the advent of the physical memristor has provided the scientific community with a stand-alone nanoelectronic device that exhibits strongly 'synapse-like' behaviour and can be used in general neural modelling. In this paper we review the suitability of the most common, basic memristor models for use in tandem with event-based techniques and conclude that neither of them can support spike timing-dependent plasticity (STDP); a staple of modern neuroscience.We then identify the necessary attributes of any model that can enmesh STDP into event-based computation and present measured results evidencing that solid-state TiO2-based memristors intrinsically support such feature.
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014
ABSTRACT In this paper we present a practical approach to employ solid-state TiO2 memristors as t... more ABSTRACT In this paper we present a practical approach to employ solid-state TiO2 memristors as tunable loads in filter configurations. First, memristive devices are employed in discrete realizations of tunable active filter topologies. Using an external programming circuit to set the devices to a desired memristive state enables control of the filter's characteristics, namely passband boundaries and quality factor. Utilization of a memristor as a tunable load in low-pass and band-pass filter topologies is then experimentally demonstrated. We further expand this concept by demonstrating an amplitude-controlled gain amplifier topology. In this topology, instead of using external control circuitry to set the memristive state, the state is set internally during operation, providing an automatic gain control.
This work exploits the switching dynamics of nanoscale resistive random access memory (ReRAM) cel... more This work exploits the switching dynamics of nanoscale resistive random access memory (ReRAM) cells with particular emphasis on the origin of the observed variability when cells are consecutively cycled/programmed at distinct memory states. It is demonstrated that this variance is a common feature of all ReRAM elements and is ascribed to the formation and rupture of conductive filaments that expand across the active core, independently of the material employed as the active switching core, the causal physical switching mechanism, the switching mode (bipolar/unipolar) or even the unit cells' dimensions. Our hypothesis is supported through both experimental and theoretical studies on TiO 2 and In 2 O 3 : SnO 2 (ITO) based ReRAM cells programmed at three distinct resistive states. Our prototypes employed TiO 2 or ITO active cores over 5 × 5 µm 2 and 100 × 100 µm 2 cell areas, with all tested devices demonstrating both unipolar and bipolar switching modalities. In the case of TiO 2 -based cells, the underlying switching mechanism is based on the non-uniform displacement of ionic species that foster the formation of conductive filaments. On the other hand, the resistive switching observed in the ITO-based devices is considered to be due to a phase change mechanism. The selected experimental parameters allowed us to demonstrate that the observed programming variance is a common feature of all ReRAM devices, proving that its origin is dependent upon randomly oriented local disorders within the active core that have a substantial impact on the overall state variance, particularly for high-resistive states.
ABSTRACT Realizing large-scale circuits utilizing emerging nanoionic devices known as memristors ... more ABSTRACT Realizing large-scale circuits utilizing emerging nanoionic devices known as memristors depends on the accurate modeling of their behavior under a wide range of biasing conditions. Currently, no available SPICE memristor model accounts for both nonvolatile and volatile resistive switching characteristics, the coexistence of which has been recently demonstrated to manifest on practical ReRAM. In this letter, we present a new memristor SPICE model that introduces volatile effects, which can render a rate-dependent bipolar nonvolatile switching operation. The model is demonstrated via a number of simulation cases and is benchmarked against measured results acquired by solid-state TiO2 ReRAM.
An insight into voltage-biased superconducting quantum interference devices Appl. Phys. Lett. 101... more An insight into voltage-biased superconducting quantum interference devices Appl. Phys. Lett. 101, 222602 (2012) The energy transfer between the ports of an implemented gyrator using LM13700 operational transconductance amplifier Rev. Sci. Instrum. 83, 114702 (2012) A low noise single-transistor transimpedance preamplifier for Fourier-transform mass spectrometry using a T feedback network Rev. Sci. Instrum. 83, 094102 (2012) Design and analysis of a radio frequency extractor in an S-band relativistic klystron amplifier Rev. Sci. Instrum. 83, 094703 (2012) Additional information on Appl. Phys. Lett.
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Papers by Radu Berdan