Schematics Document LF14B: Wistron Corporation Wistron Corporation Wistron Corporation

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5 4 3 2 1

LF14B
Schematics Document
D D

C C

B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cover Page
Size Document Number Rev
A3
LF14B SA
Date: Thursday, February 13, 2014 Sheet 1 of 102
5 4 3 2 1
5 4 3 2 1

CHARGER
BQ24727 44
INPUTS OUTPUTS
DCBATOUT BT+

SYSTEM DC/DC

LF14B_BTM Board Block Diagram TPS51225


INPUTS OUTPUTS
5V_S5
45

Project code : 4PD00U010001 DCBATOUT


3D3V_S5
PCB P/N : 13307
D
Revision : SC CPU DC/DC D

DDR3L 1333 Channel A


DIMM ISL95833 46-47
VRAM eDP x2 Slot 1 12 INPUTS OUTPUTS
DDR3 1GB/2GB/4GB
78~81 Touch LCD FHD TOUCH Intel CPU DDR3L/ 1.35V DCBATOUT VCC_CORE
SENSOR 52 USB2.0 Port2
52
SYSTEM DC/DC
DDR3 Bay Trail M SY8208 50
X3001
900MHz BGA1170 25MHz INPUTS OUTPUTS
HDMI 1.4a54 DDI x4

GPU (Dual Rank) DCBATOUT 1D0V_S5

PEG x 4 SYSTEM DC/DC


N15V-GM(GT820M) PCIE Port4 LAN RTL8111GUS30 MDI RJ45 31 SY8208DQNC 49
N15S-GT(GT840M) INPUTS OUTPUTS
X7601
27MHz DCBATOUT 1D35V_S3
SATA Port0 HDD 56
73~77
SYSTEM LDO
USB3.0 USB Charger USB3.0 Port1,USB2.0 Port1 SATA Port1 TLV70218 51
34 34 ODD BD 56
SKT x1 INPUTS OUTPUTS
3D3V_S5 1D8V_S5
PCIE Port3
NGFF WLAN SYSTEM LDO
X1801
COMBO 25MHz
S-1339D15 51
USB2.0 Port5 INPUTS OUTPUTS
C
58 C
3D3V_S5 1D5V_S0

USB 3.0/2.0 ports (4) SYSTEM LDO


CARD SKT Card Reader ETHERNET (10/100/1000Mb) X1802 TLV70012 51
USB2.0 Port2,USB2.0 Port4 32.768KHz INPUTS OUTPUTS
SDR104 GL3213 USB HUB High Definition Audio
IO BD SATA ports (2) 3D3V_S5 1D2V_S5
USB2.0 SKT x2 PCIe ports (4)
63
LPC I/F Step Down Regulator
SYW232 51
USB2.0 Port3 HD Audio Codec 2CH SPEAKER INPUTS OUTPUTS
HDA
52 35 ALC233 29
Camera
1D0V_S0_PG 1D05V_S0
5,6,7,8,9,10,

SPI
17,18,19,20,21,22,23,24,25
GPU Core
SUB Woofer RT8812 82
Woofer AMP.
28 INPUTS OUTPUTS
U40/U50
DCBATOUT VGA_CORE
X3501 LPC debug port
12MHz LPC BUS
65
LOAD SWITCH
TPS22966 37
INPUTS OUTPUTS
Internal Array DMIC
KBC 1D35V_S3 1D35V_S0
SMBus
Thermal
SPI Flash SPI NUVOTON NCT7718W
26
8MB 25 NPCE985 24 LOAD SWITCH
B
TPS22965 37 B

INPUTS OUTPUTS
Charger
1D0V_S5 1D0V_S0
BQ24715
44
SYSTEM DC/DC
TouchPad Analog 67 SY8208 83
62 G-Sensor INPUTS OUTPUTS
DCBATOUT 1D5V_VGA_S0

LOAD SWITCH
TPS22966 83
INPUTS OUTPUTS
1D05V_S0 1D5V_VGA_S1
3D3V_S0 3D3V_VGA_S0

PCB LAYER
L1:Top L4:Signal
L2:VCC L5:GND
L3:Signal L6:Bottom

A A

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Block Diagram
Size Document Number Rev
Custom
LF14B SA
Date: Thursday, February 13, 2014 Sheet 2 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

<Core Design>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4
LF14B SA
Date: Wednesday, February 19, 2014 Sheet 3 of 102
5 4 3 2 1
SSID = CPU

D D

C
Blanking C

B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (Reserved)
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 4 of 102
5 4 3 2 1

SSID = CPU

CPU1B 2 OF 13

CPU1A 1 OF 13 AY45 BAY TRAIL-M/D SOC BG38


DRAM1_MA_0 DRAM1_DQ_0
BB47 BC40
M_A_A0 BAY TRAIL-M/D SOC M_A_DQ0 DRAM1_MA_1 DRAM1_DQ_1
K45 M36 M_A_DQ0 12 AW41 BA42
M_A_A1 DRAM0_MA_0 DRAM0_DQ_0 M_A_DQ1 DRAM1_MA_2 DRAM1_DQ_2
H47 J36 M_A_DQ1 12 BB44 BD42
M_A_A2 DRAM0_MA_1 DRAM0_DQ_1 M_A_DQ2 DRAM1_MA_3 DRAM1_DQ_3
L41 P40 M_A_DQ2 12 BB50 BC38
M_A_A3 DRAM0_MA_2 DRAM0_DQ_2 M_A_DQ3 DRAM1_MA_4 DRAM1_DQ_4
H44 M40 M_A_DQ3 12 BC53 BD36
M_A_A4 DRAM0_MA_3 DRAM0_DQ_3 M_A_DQ4 DRAM1_MA_5 DRAM1_DQ_5
H50 P36 M_A_DQ4 12 BB49 BF42
M_A_A5 DRAM0_MA_4 DRAM0_DQ_4 M_A_DQ5 DRAM1_MA_6 DRAM1_DQ_6
G53 N36 M_A_DQ5 12 BF50 BC44
M_A_A6 DRAM0_MA_5 DRAM0_DQ_5 M_A_DQ6 DRAM1_MA_7 DRAM1_DQ_7
12 M_A_A[15:0] H49 K40 M_A_DQ6 12 BC52 BH32
M_A_A7 DRAM0_MA_6 DRAM0_DQ_6 M_A_DQ7 DRAM1_MA_8 DRAM1_DQ_8
D50 K42 M_A_DQ7 12 BE52 BG32
M_A_A8 DRAM0_MA_7 DRAM0_DQ_7 M_A_DQ8 DRAM1_MA_9 DRAM1_DQ_9
D G52 B32 M_A_DQ8 12 AY48 BG36 D
M_A_A9 DRAM0_MA_8 DRAM0_DQ_8 M_A_DQ9 DRAM1_MA_10 DRAM1_DQ_10
E52 C32 M_A_DQ9 12 BE51 BJ37
M_A_A10 DRAM0_MA_9 DRAM0_DQ9_C32 M_A_DQ10 DRAM1_MA_11 DRAM1_DQ_11
K48 C36 M_A_DQ10 12 BD47 BG33
M_A_A11 DRAM0_MA_10 DRAM0_DQ_10 M_A_DQ11 DRAM1_MA_12 DRAM1_DQ_12
E51 A37 M_A_DQ11 12 BA51 BJ33
M_A_A12 DRAM0_MA_11 DRAM0_DQ_11 M_A_DQ12 DRAM1_MA_13 DRAM1_DQ_13
F47 C33 M_A_DQ12 12 BH49 BG37
M_A_A13 DRAM0_MA_12 DRAM0_DQ_12 M_A_DQ13 DRAM1_MA_14 DRAM1_DQ_14
J51 A33 M_A_DQ13 12 BH50 BH38
M_A_A14 DRAM0_MA_13 DRAM0_DQ_13 M_A_DQ14 DRAM1_MA_15 DRAM1_DQ_15
B49 C37 M_A_DQ14 12 AU36
M_A_A15 DRAM0_MA_14 DRAM0_DQ_14 M_A_DQ15 DRAM1_DQ_16
B50 B38 M_A_DQ15 12 BD38 AT36
DRAM0_MA_15 DRAM0_DQ_15 M_A_DQ16 DRAM1_DM_0 DRAM1_DQ_17
F36 M_A_DQ16 12 BH36 AV40
DRAMA_DM_0 DRAM0_DQ_16 M_A_DQ17 DRAM1_DM_1 DRAM1_DQ_18
12 DRAMA_DM_0 G36 G38 M_A_DQ17 12 BC36 AT40
DRAMA_DM_1 DRAM0_DM_0 DRAM0_DQ_17 M_A_DQ18 DRAM1_DM_2 DRAM1_DQ_19
12 DRAMA_DM_1 B36 F42 M_A_DQ18 12 BH42 BA36
DRAMA_DM_2 DRAM0_DM_1 DRAM0_DQ_18 M_A_DQ19 DRAM1_DM_3 DRAM1_DQ_20
12 DRAMA_DM_2 F38 J42 M_A_DQ19 12 AT51 AV36
DRAMA_DM_3 DRAM0_DM_2 DRAM0_DQ_19 M_A_DQ20 DRAM1_DM_4 DRAM1_DQ_21
12 DRAMA_DM_3 B42 G40 M_A_DQ20 12 AM42 AY42
DRAMA_DM_4 DRAM0_DM_3 DRAM0_DQ_20 M_A_DQ21 DRAM1_DM_5 DRAM1_DQ_22
12 DRAMA_DM_4 P51 C38 M_A_DQ21 12 AK50 AY40
DRAMA_DM_5 DRAM0_DM_4 DRAM0_DQ_21 M_A_DQ22 DRAM1_DM_6 DRAM1_DQ_23
12 DRAMA_DM_5 V42 G44 M_A_DQ22 12 AK52 BJ41
DRAMA_DM_6 DRAM0_DM_5 DRAM0_DQ_22 M_A_DQ23 DRAM1_DM_7 DRAM1_DQ_24
12 DRAMA_DM_6 Y50 D42 M_A_DQ23 12 BG41
DRAMA_DM_7 DRAM0_DM_6 DRAM0_DQ_23 M_A_DQ24 DRAM1_DQ_25
12 DRAMA_DM_7 Y52 A41 M_A_DQ24 12 AV45 BJ45
DRAM0_DM_7 DRAM0_DQ_24 M_A_DQ25 DRAM1_RAS DRAM1_DQ_26
C41 M_A_DQ25 12 AV44 BH46
DRAM0_DQ_25 M_A_DQ26 DRAM1_CAS DRAM1_DQ_27
12 M_A_RAS# M45 A45 M_A_DQ26 12 BB51 BG40
DRAM0_RAS DRAM0_DQ_26 M_A_DQ27 DRAM1_WE DRAM1_DQ_28
12 M_A_CAS# M44 B46 M_A_DQ27 12 BH40
DRAM0_CAS DRAM0_DQ_27 M_A_DQ28 DRAM1_DQ_29
12 M_A_WE# H51 C40 M_A_DQ28 12 AY47 BH48
DRAM0_WE DRAM0_DQ_28 M_A_DQ29 DRAM1_BS_0 DRAM1_DQ_30
B40 M_A_DQ29 12 AY44 BH47
DRAM0_DQ_29 M_A_DQ30 DRAM1_BS_1 DRAM1_DQ_31
K47 B48 M_A_DQ30 12 BF52 AY52
12 M_A_BS0 DRAM0_BS_0 DRAM0_DQ_30 M_A_DQ31 DRAM1_BS_2 DRAM1_DQ_32
K44 B47 M_A_DQ31 12 AY51
12 M_A_BS1 DRAM0_BS_1 DRAM0_DQ_31 M_A_DQ32 DRAM1_DQ_33
D52 K52 M_A_DQ32 12 AT44 AP52
12 M_A_BS2 DRAM0_BS_2 DRAM0_DQ_32 M_A_DQ33 DRAM1_CS_0 DRAM1_DQ_34
K51 M_A_DQ33 12 AP51
DRAM0_DQ_33 M_A_DQ34 DRAM1_DQ_35
12 M_A_DIM0_CS#0 P44 T52 M_A_DQ34 12 AT45 AW51
DRAM0_CS_0 DRAM0_DQ_34 M_A_DQ35 DRAM1_CS_2 DRAM1_DQ_36
T51 M_A_DQ35 12 AW53
DRAM0_DQ_35 M_A_DQ36 DRAM1_DQ_37
12 M_A_DIM0_CS#1 P45 L51 M_A_DQ36 12 AR51
DRAM0_CS_2 DRAM0_DQ_36 M_A_DQ37 DRAM1_DQ_38
L53 M_A_DQ37 12 BG47 AR53
DRAM0_DQ_37 M_A_DQ38 DRAM1_CKE_0 DRAM1_DQ_39
R51 M_A_DQ38 12 BE46 AP47
DRAM0_DQ_38 M_A_DQ39 RESERVED_BE46 DRAM1_DQ_40
12 M_A_DIM0_CKE0 C47 R53 M_A_DQ39 12 BD44 AP45
DRAM0_CKE_0 DRAM0_DQ_39 M_A_DQ40 DRAM1_CKE_2 DRAM1_DQ_41
D48 T47 M_A_DQ40 12 BF48 AK40
RESERVED_D48 DRAM0_DQ_40 M_A_DQ41 RESERVED_BF48 DRAM1_DQ_42
12 M_A_DIM0_CKE1 F44 T45 M_A_DQ41 12 AM41
DRAM0_CKE_2 DRAM0_DQ_41 M_A_DQ42 DRAM1_DQ_43
E46 Y40 M_A_DQ42 12 AP41 AP48
RESERVED_E46 DRAM0_DQ_42 M_A_DQ43 DRAM1_ODT_0 DRAM1_DQ_44
V41 M_A_DQ43 12 AP50
DRAM0_DQ_43 M_A_DQ44 DRAM1_DQ_45
12 M_A_DIM0_ODT0 T41 T48 M_A_DQ44 12 AT42 AK42
DRAM0_ODT_0 DRAM0_DQ_44 M_A_DQ45 DRAM1_ODT_2 DRAM1_DQ_46
T50 M_A_DQ45 12 AH40
DRAM0_DQ_45 M_A_DQ46 DRAM1_DQ_47
12 M_A_DIM0_ODT1 P42 Y42 M_A_DQ46 12 AM45
DRAM0_ODT_2 DRAM0_DQ_46 M_A_DQ47 DRAM1_DQ_48
AB40 M_A_DQ47 12 AV50 AM47
DRAM0_DQ_47 M_A_DQ48 DRAM1_CKP_0 DRAM1_DQ_49
V45 M_A_DQ48 12 AV48 AF48
DRAM0_DQ_48 M_A_DQ49 DRAM1_CKN_0 DRAM1_DQ_50
C
12 M_A_DIM0_CLK_DDR0 M50 V47 M_A_DQ49 12 AF50 C
DRAM0_CKP_0 DRAM0_DQ_49 M_A_DQ50 DRAM1_DQ_51
12 M_A_DIM0_CLK_DDR#0 M48 AD48 M_A_DQ50 12 AM48
DRAM0_CKN_0 DRAM0_DQ_50 M_A_DQ51 DRAM1_DQ_52
AD50 M_A_DQ51 12 AM50
DRAM0_DQ_51 M_A_DQ52 DRAM1_DQ_53
V48 M_A_DQ52 12 AT50 AH44
1D35V_S3 DRAM0_DQ_52 M_A_DQ53 DRAM1_CKP_2 DRAM1_DQ_54
12 M_A_DIM0_CLK_DDR1 P50 V50 M_A_DQ53 12 AT48 AK45
DRAM0_CKP_2 DRAM0_DQ_53 M_A_DQ54 DRAM1_CKN_2 DRAM1_DQ_55
12 M_A_DIM0_CLK_DDR#1 P48 AB44 M_A_DQ54 12 AM52
DRAM0_CKN_2 DRAM0_DQ_54 DRAM1_DQ_56
無1%排
排阻 Y45 M_A_DQ55
M_A_DQ55 12 AL51
1

DRAM0_DQ_55 M_A_DQ56 DRAM1_DQ_57


V52 M_A_DQ56 12 AG53
R501 DRAM0_DQ_56 M_A_DQ57 DRAM1_DQ_58
W51 M_A_DQ57 12 AT41 AG51
4K7R2F-GP DRAMA_DRAMRST DRAM0_DQ_57 M_A_DQ58 DRAM1_DRAMRST DRAM1_DQ_59
12 DRAMA_DRAMRST P41 AC53 M_A_DQ58 12 AL53
DRAM0_DRAMRST DRAM0_DQ_58 M_A_DQ59 DRAM1_DQ_60
AC51 M_A_DQ59 12 AK51
DRAM0_DQ_59 M_A_DQ60 DRAM1_DQ_61
W53 AF52
2

DRAM0_DQ_60 M_A_DQ60 12 DRAM1_DQ_62


Y51 M_A_DQ61 AF51
DRAM0_DQ_61 M_A_DQ61 12 DRAM1_DQ_63
DRAM_VREF DRAM_VREF AF44 AD52 M_A_DQ62
DRAM_VREF DRAM0_DQ_62 M_A_DQ62 12
AD51 M_A_DQ63 BF40
M_A_DQ63 12
1

DRAM0_DQ_63 DRAM1_DQSP_0
BD40
1

R502 M_A_DQS_DP0 DRAM1_DQSN_0


J38 M_A_DQS_DP0 12 BG35
4K7R2F-GP C501 ICLK_DRAM_TERMN DRAM0_DQSP_0 M_A_DQS_DN0 DRAM1_DQSP_1
AH42 K38 M_A_DQS_DN0 12 BH34
SCD1U16V2KX-L-GP ICLK_DRAM_TERMN_AF42 AF42 ICLK_DRAM_TERMN DRAM0_DQSN_0 M_A_DQS_DP1 DRAM1_DQSN_1
C35 M_A_DQS_DP1 12 BA38
2

ICLK_DRAM_TERMN_AF42 DRAM0_DQSP_1 M_A_DQS_DN1 DRAM1_DQSP_2


B34 AY38
2

DRAM0_DQSN_1 M_A_DQS_DN1 12 DRAM1_DQSN_2


D40 M_A_DQS_DP2 BH44
DRAM0_DQSP_2 M_A_DQS_DP2 12 DRAM1_DQSP_3
DDR3_DRAM_PWROK AD42 F40 M_A_DQS_DN2 BG43
36 DDR3_DRAM_PWROK DRAM_VDD_S4_PWROK DRAM0_DQSN_2 M_A_DQS_DN2 12 DRAM1_DQSN_3
DDR3_VCCA_PWRGD AB42 B44 M_A_DQS_DP3 AU53
36 DDR3_VCCA_PWRGD DRAM_CORE_PWROK DRAM0_DQSP_3 M_A_DQS_DP3 12 DRAM1_DQSP_4
C43 M_A_DQS_DN3 AV52
DRAM0_DQSN_3 M_A_DQS_DN3 12 DRAM1_DQSN_4
無1%排
排阻 DRAM_RCOMP_0 AD44
DRAM_RCOMP_0
DRAM0_DQSP_4
DRAM0_DQSN_4
N53
M52
M_A_DQS_DP4
M_A_DQS_DN4 M_A_DQS_DP4
M_A_DQS_DN4
12
12
DRAM1_DQSP_5
DRAM1_DQSN_5
AP42
AP44
DRAM_RCOMP_1 AF45 T42 M_A_DQS_DP5 AK47
DRAM_RCOMP_1 DRAM0_DQSP_5 M_A_DQS_DP5 12 DRAM1_DQSP_6
DRAM_RCOMP_2 AD45 T44 M_A_DQS_DN5 AK48
DRAM_RCOMP_2 DRAM0_DQSN_5 M_A_DQS_DN5 12 DRAM1_DQSN_6
1 R503 2 ICLK_DRAM_TERMN Y47 M_A_DQS_DP6
M_A_DQS_DP6 12 AH52
100KR2F-L3-GP DRAM0_DQSP_6 M_A_DQS_DN6 DRAM1_DQSP_7
Y48 M_A_DQS_DN6 12 AJ51
DRAM0_DQSN_6 M_A_DQS_DP7 DRAM1_DQSN_7
AF40 AB52 M_A_DQS_DP7 12
RESERVED_AF40 DRAM0_DQSP_7 M_A_DQS_DN7
AF41 AA51 M_A_DQS_DN7 12
RESERVED_AF41 DRAM0_DQSN_7
1 R504 2 ICLK_DRAM_TERMN_AF42 AD40
100KR2F-L3-GP RESERVED_AD40
AD41
RESERVED_AD41 BAY-TRAIL-GP

1 R505 2 DRAM_RCOMP_0 BAY-TRAIL-GP


23D2R2F-GP

1 R506 2 DRAM_RCOMP_1
B 29D4R2F-GP B
reserve the 0402 0.1u caps on reset for EMI.
1 R507 2162R2F-GP DRAM_RCOMP_2

DRAMA_DRAMRST 1 2 EC502
SCD1U25V2KX-GP

DDR3_DRAM_PWROK DY 1 2 EC503
SCD1U25V2KX-GP

DDR3_VCCA_PWRGD DY 1 2 EC504
SCD1U25V2KX-GP

A A

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DDR)
Size Document Number Rev
A2
LF14B SA
Date: Thursday, April 10, 2014 Sheet 5 of 102
5 4 3 2 1
5 4 3 2 1

SSID = CPU

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (CFG)
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 6 of 102
5 4 3 2 1
5 4 3 2 1

SSID = CPU

GFX_CORE
Vinafix.com

1
R703

100R2F-L3-GP
D D
VCC_CORE

2
2013/05/09
VCC_AXG_SENSE
48 VCC_AXG_SENSE
R705
R704 2013/08/19
VCC_SENSE 1 2
47 VCC_SENSE
VSS_SENSE 1 2 VSS_AXG_SENSE
46,47 VSS_SENSE 48 VSS_AXG_SENSE
100R2F-L3-GP

1
R706
1D35V_S3 VDDQ_CPU 100R2F-L3-GP
100R2F-L3-GP

PG701

2
1 2

GAP-CLOSE-PW R

PG702
1 2 VDDQ_CPU

GAP-CLOSE-PW R CPU1G 7 OF 13

PG703 VCC_SENSE P28 BAY TRAIL-M/D SOC BD49 VDDQ_CPU


VCC_AXG_SENSE BB8 CORE_VCC_SENSE_P28 DRAM_VDD_S4_BD49
1 2 UNCORE_VNN_SENSE DRAM_VDD_S4_BD52 BD52
VSS_SENSE N28 BD53
GAP-CLOSE-PW R VDDQ_CPU CORE_VSS_SENSE_N28 DRAM_VDD_S4_BD53
DRAM_VDD_S4_BF44 BF44
DRAM_VDD_S4_BG51 BG51
PG704 BJ48
C DRAM_VDD_S4_BJ48 C
1 2 AD38 DRAM_VDD_S4_AD38 DRAM_VDD_S4_C51 C51
AF38 DRAM_VDD_S4_AF38 DRAM_VDD_S4_D44 D44
GAP-CLOSE-PW R A48 F49
DRAM_VDD_S4 DRAM_VDD_S4_F49
AK38 DRAM_VDD_S4_AK38 DRAM_VDD_S4_F52 F52
PG705 AM38 F53
DRAM_VDD_S4_AM38 DRAM_VDD_S4_F53
1 2 AV41 DRAM_VDD_S4_AV41 DRAM_VDD_S4_H46 H46
VCC_CORE AV42 M41
GAP-CLOSE-PW R DRAM_VDD_S4_AV42 DRAM_VDD_S4_M41
BB46 DRAM_VDD_S4_BB46 DRAM_VDD_S4_M42 M42
VCC_CORE V38
PG706 DRAM_VDD_S4_V38
DRAM_VDD_S4_Y38 Y38
1 2
AA27 GFX_CORE
GAP-CLOSE-PW R CORE_VCC_S0IX_AA27
AA29 CORE_VCC_S0IX_AA29
1

PC701 AA30 CORE_VCC_S0IX_AA30


DY AC27 CORE_VCC_S0IX_AC27
SC10U6D3V2MX-GP-U

AC29 AA24
2

CORE_VCC_S0IX_AC29 UNCORE_VNN_S3_AA24
AC30 CORE_VCC_S0IX_AC30 UNCORE_VNN_S3_AC22 AC22
AD27 CORE_VCC_S0IX_AD27 UNCORE_VNN_S3_AC24 AC24
AD29 CORE_VCC_S0IX_AD29 UNCORE_VNN_S3_AD22 AD22
AD30 CORE_VCC_S0IX_AD30 UNCORE_VNN_S3_AD24 AD24
AF27 CORE_VCC_S0IX_AF27 UNCORE_VNN_S3_AF22 AF22
AF29 CORE_VCC_S0IX_AF29 UNCORE_VNN_S3_AF24 AF24
AG27 CORE_VCC_S0IX_AG27 UNCORE_VNN_S3_AG22 AG22
AG29 CORE_VCC_S0IX_AG29 UNCORE_VNN_S3_AG24 AG24
AG30 CORE_VCC_S0IX_AG30 UNCORE_VNN_S3_AJ22 AJ22
P26 CORE_VCC_S0IX_P26 UNCORE_VNN_S3_AJ24 AJ24
P27 CORE_VCC_S0IX_P27 UNCORE_VNN_S3_AK22 AK22
U27 CORE_VCC_S0IX_U27 UNCORE_VNN_S3_AK24 AK24
U29 CORE_VCC_S0IX_U29 UNCORE_VNN_S3_AK25 AK25
B B
V27 CORE_VCC_S0IX_V27 UNCORE_VNN_S3_AK27 AK27
V29 CORE_VCC_S0IX_V29 UNCORE_VNN_S3_AK29 AK29
V30 CORE_VCC_S0IX_V30 UNCORE_VNN_S3_AK30 AK30
Y27 CORE_VCC_S0IX_Y27 UNCORE_VNN_S3_AK32 AK32
Y29 CORE_VCC_S0IX_Y29 UNCORE_VNN_S3_AM22 AM22
Y30 CORE_VCC_S0IX_Y30

TP701 1TP_CORE_V1P05_S4 AF30 TP_CORE_V1P05_S4 TP2_CORE_VCC_S0IX AA22 TP2_CORE_VCC_S0IX 1 TP702

BAY-TRAIL-GP

VCC_SENSE DY 1 2 EC701
SCD1U25V2KX-GP
VSS_SENSE DY 1 2 EC702
SCD1U25V2KX-GP
VSS_AXG_SENSE DY 1 2 EC703
SCD1U25V2KX-GP
VCC_AXG_SENSE DY 1 2 EC704
SCD1U25V2KX-GP
Wistron Confidential document, Anyone can not
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A
reserve the 0402 0.1u caps on reset for EMI. <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_CORE)
Size Document Number Rev
A3
LF14B SA
Date: Thursday, April 10, 2014 Sheet 7 of 102
5 4 3 2 1
5 4 3 2 1

SSID = CPU

CPU1C 3 OF 13

D AV3 1.0V BAY TRAIL-M/D SOC 1.0V AG3 D


1D8V_S0 HDMI 54 DDBP_DATA2
AV2
DDI0_TXP_0 DDI1_TXP_0
AG1
eDP_TXP0_CPU 52
54
54
DDBP_DATA2#
DDBP_DATA1 AT2
DDI0_TXN_0
DDI0_TXP_1
DDI1_TXN_0
DDI1_TXP_1 AF3
eDP_TXN0_CPU
eDP_TXP1_CPU
52
52
PANEL
54 DDBP_DATA1# AT3 DDI0_TXN_1 DDI1_TXN_1 AF2 eDP_TXN1_CPU 52
54 DDBP_DATA0 AR3 DDI0_TXP_2 DDI1_TXP_2 AD3
54 DDBP_DATA0# AR1 DDI0_TXN_2 DDI1_TXN_2 AD2
54 DDBP_DATA3 AP3 DDI0_TXP_3 DDI1_TXP_3 AC3

3
4
54 DDBP_DATA3# AP2 DDI0_TXN_3 DDI1_TXN_3 AC1
RN801
SRN2K2J-5-GP AL3 DDI0_AUXP DDI1_AUXP AK3 eDP_AUXP_CPU 52
AL1 DDI0_AUXN DDI1_AUXN AK2 eDP_AUXN_CPU 52
D27 1.8V 1.8V K30 DP_HPD
54 HDMI_PCH_DET
2
1
DDI0_HPD DDI1_HPD
C26 P30 DDI1_GEN_R_DAT
15,54 PCH_HDMI_DATA DDI0_DDCDATA DDI1_DDCDATA DDI1_GEN_R_DAT 15
54 PCH_HDMI_CLK C28 DDI0_DDCCLK DDI1_DDCCLK G30

B28 DDI0_VDDEN DDI1_VDDEN N30 LVDS_VDD_EN_CPU 52


C27 DDI0_BKLTEN DDI1_BKLTEN J30 L_BKLT_EN_CPU 24
402R2F-GP B26 M30
DDI0_BKLTCTL DDI1_BKLTCTL L_BKLT_CTRL_CPU 52
R806
1 2 DDI0_RCOMP_N AK13 AH14
DDI0_RCOMP_P DDI0_RCOMP RESERVED_AH14
AK12 DDI0_RCOMP_P RESERVED_AH13 AH13
AM14 RESERVED_AM14 RESERVED_AF14 AF14
Close to CPU AM13 RESERVED_AM13 RESERVED_AF13 AF13
AM3 VSS_AM3 VSS_AH3 AH3
AM2 VSS_AM2 VSS_AH2 AH2
C BA3 C
VGA_RED
VGA_BLUE AY2 R812
3.3V VGA_GREEN BA1
AW1 VGA_IREF VGA_IREF 1 2
VGA_IREF
VGA_IRTN AY3
357R3F-GP
VGA_HSYNC BD2
VGA_VSYNC BF2
3.3V L_BKLT_EN_CPU 2 R813 1
VGA_DDCCLK BC1
VGA_DDCDATA BC2 10KR2J-L-GP
T2 RESERVED_T2 RESERVED_T7 T7
T3 RESERVED_T3 RESERVED_T9 T9
AB3 RESERVED_AB3 RESERVED_AB13 AB13
AB2 RESERVED_AB2 RESERVED_AB12 AB12
Y3 RESERVED_Y3 RESERVED_Y12 Y12
Y2 Y13 1D8V_S0
RESERVED_Y2 RESERVED_Y13
W3 RESERVED_W3 RESERVED_V10 V10
W1 RESERVED_W1 RESERVED_V9 V9

1
V2 RESERVED_V2 RESERVED_T12 T12
V3 T10 R808
RESERVED_V3 RESERVED_T10 Q802
R3 V14 10KR2J-L-GP
RESERVED_R3 RESERVED_V14 DP_HPD0_G
R1 RESERVED_R1 RESERVED_V13 V13 G
AD6 T14

2
RESERVED_AD6 RESERVED_T14 DP_HPD
AD4 RESERVED_AD4 RESERVED_T13 T13 D
AB9 RESERVED_AB9 RESERVED_T6 T6
AB7 RESERVED_AB7 RESERVED_T4 T4 S
Y4 RESERVED_Y4 RESERVED_P14 P14
B B
Y6 RESERVED_Y6 2N7002K-2-GP
V4 RESERVED_V4
V6 K34 84.2N702.J31
GPIO_S0_NC13 RESERVED_V6 RESERVED_K34
15 GPIO_S0_NC13 A29 GPIO_S0_NC13 GPIO_S0_NC26 D32 2ND = 84.2N702.031
TP801 1GPIO_S0_NC14_C29 C29 GPIO_S0_NC14_C29 GPIO_S0_NC25 N32
AB14 RESERVED_AB14 GPIO_S0_NC24 J34
TP802 1GPIO_S0_NC12 B30 GPIO_S0_NC12 GPIO_S0_NC23 K28
C30 RESERVED_C30 GPIO_S0_NC22 F28
F32 R809
GPIO_S0_NC21
GPIO_S0_NC20 D34 1 R817 2 DP_HPD0_R 1 2 EMB_HPD 52
J28 1KR2J-1-GP
GPIO_S0_NC18 0R0402-PAD
GPIO_S0_NC17 D28
GPIO_S0_NC16 M32
GPIO_S0_NC15 F34

1
BAY-TRAIL-GP
R811
100KR2F-L1-GP

2
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DDI/EDP/GPIO)
Size Document Number Rev
A3
LF14B SA
Date: Thursday, April 10, 2014 Sheet 8 of 102
5 4 3 2 1
5 4 3 2 1

SSID = CPU

D D

CPU1I 9 OF 13 CPU1M 13 OF 13
CPU1J 10 OF 13 CPU1K 11 OF 13
A11 BAY TRAIL-M/D SOC AC36 CPU1L 12 OF 13 K9 BAY TRAIL-M/D SOC U3
VSS1 VSS36 BAY TRAIL-M/D SOC BAY TRAIL-M/D SOC VSS281 VSS316
A15 VSS2 VSS37 AC38 AG38 VSS71 VSS106 AH47 AT24 VSS141 VSS176 AY36 L13 VSS282 VSS317 U30
A19 AD19 AH4 AH48 AT27 AY4 BF30 BAY TRAIL-M/D SOC E8 L19 U32
VSS3 VSS38 VSS72 VSS107 VSS142 VSS177 VSS211 VSS246 VSS283 VSS318
A23 VSS4 VSS39 AD21 AH41 VSS73 VSS108 AH50 AT30 VSS143 VSS178 AY50 BF36 VSS212 VSS247 F19 L27 VSS284 VSS319 U40
A27 VSS5 VSS40 AD25 AH45 VSS74 VSS109 AH51 AT35 VSS144 VSS179 AY9 BF4 VSS213 VSS248 F2 L35 VSS285 VSS320 U42
A31 VSS6 VSS41 AD32 AH7 VSS75 VSS110 AH6 AT38 VSS145 VSS180 BA14 BG31 VSS214 VSS249 F24 M19 VSS286 VSS321 U43
A35 VSS7 VSS42 AD33 AH9 VSS76 VSS111 AM44 AT4 VSS146 VSS181 BA19 BG34 VSS215 VSS250 F27 M26 VSS287 VSS322 U45
A39 VSS8 VSS43 AD47 AJ1 VSS77 VSS112 AM51 AT47 VSS147 VSS182 BA22 BG39 VSS216 VSS251 F30 M27 VSS288 VSS323 U46
A43 VSS9 VSS44 AD7 AJ16 VSS78 VSS113 AM7 AT52 VSS148 VSS183 BA27 BG42 VSS217 VSS252 F35 M34 VSS289 VSS324 U48
A47 VSS10 VSS45 AE1 AJ21 VSS79 VSS114 AN1 AU1 VSS149 VSS184 BA32 BG45 VSS218 VSS253 F5 M35 VSS290 VSS325 U49
AA1 VSS11 VSS46 AE11 AJ25 VSS80 VSS115 AN11 AU24 VSS150 VSS185 BA35 BG49 VSS219 VSS254 F7 M38 VSS291 VSS326 U5
AA16 VSS12 VSS47 AE12 AJ27 VSS81 VSS116 AN12 AU3 VSS151 VSS186 BA40 BJ11 VSS220 VSS255 G10 M47 VSS292 VSS327 U51
AA19 VSS13 VSS48 AE14 AJ29 VSS82 VSS117 AN14 AU30 VSS152 VSS187 BA53 BJ15 VSS221 VSS256 G20 M51 VSS293 VSS328 U53
AA21 VSS14 VSS49 AE3 AJ3 VSS83 VSS118 AN22 AU38 VSS153 VSS188 BB19 BJ19 VSS222 VSS257 G22 N1 VSS294 VSS329 U6
AA3 VSS15 VSS50 AE4 AJ30 VSS84 VSS119 AN3 AU51 VSS154 VSS189 BB27 BJ23 VSS223 VSS258 G26 N16 VSS295 VSS330 U8
AA32 VSS16 VSS51 AE40 AJ32 VSS85 VSS120 AN33 AV12 VSS155 VSS190 BB35 BJ27 VSS224 VSS259 G28 N38 VSS296 VSS331 U9
AA35 VSS17 VSS52 AE42 AJ33 VSS86 VSS121 AN35 AV13 VSS156 VSS191 BC20 BJ31 VSS225 VSS260 G32 N51 VSS297 VSS332 V12
AA38 VSS18 VSS53 AE43 AJ35 VSS87 VSS122 AN36 AV14 VSS157 VSS192 BC22 BJ35 VSS226 VSS261 G34 P13 VSS298 VSS333 V16
AA53 VSS19 VSS54 AE45 AJ38 VSS88 VSS123 AN38 AV18 VSS158 VSS193 BC26 BJ39 VSS227 VSS262 G42 P16 VSS299 VSS334 V19
AB10 VSS20 VSS55 AE46 AJ53 VSS89 VSS124 AN40 AV19 VSS159 VSS194 BC28 BJ43 VSS228 VSS263 H19 P19 VSS300 VSS335 V21
AB4 VSS21 VSS56 AE48 AK10 VSS90 VSS125 AN42 AV24 VSS160 VSS195 BC32 BJ47 VSS229 VSS264 H27 P20 VSS301 VSS336 V35
AB41 VSS22 VSS57 AE50 AK14 VSS91 VSS126 AN43 AV27 VSS161 VSS196 BC34 BJ7 VSS230 VSS265 H35 P24 VSS302 VSS337 V40
AB45 VSS23 VSS58 AE51 AK16 VSS92 VSS127 AN45 AV30 VSS162 VSS197 BC42 C14 VSS231 VSS266 J1 P32 VSS303 VSS338 V44
AB47 VSS24 VSS59 AE53 AK33 VSS93 VSS128 AN46 AV35 VSS163 VSS198 BD19 C31 VSS232 VSS267 J16 P35 VSS304 VSS339 V51
AB48 VSS25 VSS60 AE6 AK41 VSS94 VSS129 AN48 AV38 VSS164 VSS199 BD24 C34 VSS233 VSS268 J19 P38 VSS305 VSS340 V7
C AB50 AE8 AK44 AN49 AV47 BD27 C39 J22 P4 Y10 C
VSS26 VSS61 VSS95 VSS130 VSS165 VSS200 VSS234 VSS269 VSS306 VSS341
AB51 VSS27 VSS62 AE9 AM12 VSS96 VSS131 AN5 AV51 VSS166 VSS201 BD30 C42 VSS235 VSS270 J27 P47 VSS307 VSS342 Y14
AB6 VSS28 VSS63 AF10 AM19 VSS97 VSS132 AN51 AV7 VSS167 VSS202 BD35 C45 VSS236 VSS271 J32 P52 VSS308 VSS343 Y16
AC16 VSS29 VSS64 AF12 AM24 VSS98 VSS133 AN53 AW13 VSS168 VSS203 BE19 C49 VSS237 VSS272 J35 P9 VSS309 VSS344 Y21
AC18 VSS30 VSS65 AF25 AM25 VSS99 VSS134 AN6 AW19 VSS169 VSS204 BE2 D12 VSS238 VSS273 J40 T40 VSS310 VSS345 Y25
AC19 VSS31 VSS66 AF32 AM29 VSS100 VSS135 AN8 AW27 VSS170 VSS205 BE35 D16 VSS239 VSS274 J53 U1 VSS311 VSS346 Y33
AC21 VSS32 VSS67 AF47 AM33 VSS101 VSS136 AN9 AW3 VSS171 VSS206 BE8 D24 VSS240 VSS275 K14 U11 VSS312 VSS347 Y41
AC25 VSS33 VSS68 AG16 AM35 VSS102 VSS137 AP40 AW35 VSS172 VSS207 BF12 D30 VSS241 VSS276 K22 U12 VSS313 VSS348 Y44
AC33 VSS34 VSS69 AG25 AM36 VSS103 VSS138 AT12 AY10 VSS173 VSS208 BF16 D36 VSS242 VSS277 K32 U14 VSS314 VSS349 Y7
AC35 VSS35 VSS70 AG36 AM40 VSS104 VSS139 AT16 AY22 VSS174 VSS209 BF24 D38 VSS243 VSS278 K36 U21 VSS315 VSS350 Y9
M28 VSS105 VSS140 AT19 AY32 VSS175 VSS210 BF38 E19 VSS244 VSS279 K4
E35 VSS245 VSS280 K50
BAY-TRAIL-GP BAY-TRAIL-GP
BAY-TRAIL-GP BAY-TRAIL-GP
BAY-TRAIL-GP

B B

Vinafix.com

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VSS)
Size Document Number Rev
A3
LF14B SA
Date: Thursday, February 13, 2014 Sheet 9 of 102
5 4 3 2 1
5 4 3 2 1

reserve the 0402 0.1u caps on reset for EMI(5/9).


VCC_CORE
VCC_CORE VCC_CORE

2013/04/26
1

1
C1023 C1025

1
SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
DY C1022 C1024 C1026 C1027 C1028

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
D EC1026 EC1028 C1009 C1012 C1013 D
2

SC22U6D3V5MX-L3-GP

SC22U6D3V3MX-1-GP

SC22U6D3V5MX-L3-GP
2

2
SCD1U25V2KX-GP

SCD1U25V2KX-GP
DY DY

VDDQ_CPU
VDDQ_CPU

VDDQ_CPU

只1uF
CRB只
close to pin AD38 & AF38
1

1
C1006 C1007 C1008

1
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
C1001 C1002 C1003 C1004 C1005 C1014 C1015 EC1029 EC1030 EC1031
SC2D2U10V3KX-L-GP

SC2D2U10V3KX-L-GP

SC2D2U10V3KX-L-GP

SC2D2U10V3KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
SCD1U10V2KX-L1-GP
2

2
DY

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
DY DY DY
C C

GFX_CORE

GFX_CORE
1

C1016 C1017 C1018


reserve the 0402 0.1u caps on reset for EMI(5/9).
SC22U6D3V3MX-1-GP

SC10U6D3V2MX-GP-U

SC10U6D3V2MX-GP-U

GFX_CORE
2

Change part numebr(5/17)


1

C1019 C1020 C1021 C1029 C1030


VDDQ_CPU
SC22U6D3V5MX-L3-GP

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP
2

1
EC1032 EC1033 EC1034

1
EC1001 EC1002 EC1003 EC1005 EC1004 EC1006
2

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
DY DY DY

2
B B

reserve the 0402 0.1u caps on reset for EMI(5/9).

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (Power CAP1)


Size Document Number Rev
A3
LF14B SA
Date: Thursday, March 06, 2014 Sheet 10 of 102

5 4 3 2 1
5 4 3 2 1

3D3V_S5
3D3V_S0
close to pin AM27 & AN24
N18 & P18

1
N22
1

1
C1102 C1143

SC1U10V2KX-L1-GP
SCD1U16V2KX-L-GP
C1101

2
SC1U10V2KX-L1-GP
2

2
D D

1D8V_S0

1D8V_S5 1D8V_S5 close to pin CPU_AM32 21


AM30 & AN32 AM32

1
close to pin U24 & V25 & N20 & U25 close to pin

1
C1135 C1136 C1137 C1138 20130813
1

AA18 U38

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
C1134

SC1U10V2KX-L1-GP
C1139 C1140

2
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
2

1D35V_S0
1D35V_S0 1D35V_S0 close to pin
close to pin AD36 AF19
AA25 & AG32 close to pin V36 AJ19 & AG18
C C

1
1 close to pin

1
C1126 C1127 C1141 C1142
AG19

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
C1103 C1104 C1105 C1106 C1107 C1108
close to pin U36

2
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
2

2
USB_HSIC_V1P2_G3_V18 21

V18 1D05V_S0
AA33
1

只只只只0.47uF
CRB只
1

C1120
SC1U10V2KX-L1-GP

C1109 C1119
2

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
2

B B

close to pin
close to pin close to pin U18 & U19 close to pin AF36 close to pin AJ18
close to pin AF16 & AF18 AJ36 & AK35 & AK36
1D0V_S5 1D0V_S0 1D0V_S0 1D0V_S0 1D0V_S0 1D0V_S0 1D0V_S0
Y19 & C3
close to pin close to pin BJ6
1

1
C1123 AD35 & AF35 C1115

SCD1U16V2KX-L-GP
C1121 C1122 C1124 C1125 C1110 C1111 C1112 C1113 C1114 C1116 C1117 C1118
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
SCD01U50V2KX-L-GP

close to pin
2

2
AA36 & Y35 & Y36

close to pin
close to pin close to pin close to pin close to pin AK18 & AM18
C5 B6 V22 U22
close to pin close to pin 1D0V_S0
AN18 AN25 AN29 & AN30 & V24 & Y22 & Y24 Wistron Confidential document, Anyone can not
1D0V_S0 1D0V_S0 1D0V_S0 1D0V_S0 Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A close to pin <Core Design> A
close to pin
1

1
C1144 AF21 & AG21
AM16 C1130 C1131 C1132 C1128 C1129 C1146
Wistron Corporation
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
SCD01U50V2KX-L-GP
2

2
SC22U6D3V3MX-1-GP
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
close to pin
Y18 & G1 Title

Delete C1147
CPU (Power CAP2)
Size Document Number Rev
Delete C1133 Delete C1148 A3
LF14B SA
Date: Thursday, April 10, 2014 Sheet 11 of 102
5 4 3 2 1
5 4 3 2 1

SSID = MEMORY
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
DIMM1
SO-DIMMA SPD Address is 0xA0
M_A_A0 98
A0 NP1
NP1 SO-DIMMA TS Address is 0x30
M_A_A1 97 NP2
M_A_A2 A1 NP2
5 M_A_A[15:0] 96
A2
M_A_A3 95
A3 RAS#
110 M_A_RAS# 5 If SA0 DIM0 = 1, SA1_DIM0 = 0
M_A_A4 92 113
A4 WE# M_A_WE# 5 SO-DIMMA SPD Address is 0xA2
M_A_A5 91 115
A5 CAS# M_A_CAS# 5
M_A_A6 90 SO-DIMMA TS Address is 0x32
M_A_A7 A6
86 114 M_A_DIM0_CS#0 5
M_A_A8 A7 CS0#
89 121 M_A_DIM0_CS#1 5
M_A_A9 A8 CS1#
85
M_A_A10 A9
D 107 73 M_A_DIM0_CKE0 5 D
M_A_A11 A10/AP CKE0
84 74
M_A_A12 83
A11
A12
CKE1 M_A_DIM0_CKE1 5 0726_SA Thermal EVENT
M_A_A13 119 101
A13 CK0 M_A_DIM0_CLK_DDR0 5 3D3V_S0
M_A_A14 80 103 M_A_DIM0_CLK_DDR#0 5
M_A_A15 A14 CK0# R1201
78
A15 TS#_DIMM0_1
79 102 M_A_DIM0_CLK_DDR1 5 1 2
5 M_A_BS2 A16/BA2 CK1 10KR2J-L-GP
104 M_A_DIM0_CLK_DDR#1 5
CK1#
109
5 M_A_BS0 BA0 DRAMA_DM_0
108 11
5

5
M_A_BS1

M_A_DQ0 5
BA1

DQ0
DM0
DM1
DM2
28
46
DRAMA_DM_1
DRAMA_DM_2
DRAMA_DM_3
DRAMA_DM_0
DRAMA_DM_1
DRAMA_DM_2
5
5
5
LS41P沒沒 Level shift
7 63
5
5
M_A_DQ1
M_A_DQ2 15
DQ1
DQ2
DM3
DM4
136 DRAMA_DM_4
DRAMA_DM_3
DRAMA_DM_4
5
5
07/04
17 153 DRAMA_DM_5 3D3V_S0 1D8V_S0
5 M_A_DQ3 DQ3 DM5 DRAMA_DM_6 DRAMA_DM_5 5
5 M_A_DQ4 4 170 DRAMA_DM_6 5
DQ4 DM6 DRAMA_DM_7
5 M_A_DQ5 6
DQ5 DM7
187 DRAMA_DM_7 5 20130723
5 M_A_DQ6 16 Follow BM

1
DQ6
5 M_A_DQ7 18 200 DIMM_SMBDATA 07/08
DQ7 SDA R1216
5 M_A_DQ8 21 202 DIMM_SMBCLK
DQ8 SCL 2K2R2J-L1-GP
23

G
5 M_A_DQ9 DQ9 3D3V_S0
33 198 TS#_DIMM0_1
5 M_A_DQ10 DQ10 EVENT#
35

2
5 M_A_DQ11 DQ11
5 M_A_DQ12 22 199
DQ12 VDDSPD
5 M_A_DQ13 24 DIMM_SMBCLK D S SMB_CLK 16
DQ13
5 M_A_DQ14 34 197

1
DQ14 SA0 C1203
5 M_A_DQ15 36 201
DQ15 SA1

SCD1U16V2KX-L-GP
5 M_A_DQ16 39
DQ16 Q1201
41 77

2
5 M_A_DQ17 DQ17 NC#1 DMN5L06K-7-GP
5 M_A_DQ18 51 122
DQ18 NC#2 1D35V_S3
5 M_A_DQ19 53 125
DQ19 NC#/TEST
5 M_A_DQ20 40
DQ20 3D3V_S0 1D8V_S0
5 M_A_DQ21 42 75
DQ21 VDD1
5 M_A_DQ22 50 76
DQ22 VDD2
5 M_A_DQ23 52 81
DQ23 VDD3
5 M_A_DQ24 57 82

1
DQ24 VDD4
5 M_A_DQ25 59 87
DQ25 VDD5 R1215
5 M_A_DQ26 67 88
DQ26 VDD6 2K2R2J-L1-GP
69 93

G
5 M_A_DQ27 DQ27 VDD7
5 M_A_DQ28 56 94
DQ28 VDD8
58 99

2
5 M_A_DQ29 DQ29 VDD9
C
5 M_A_DQ30 68 100 C
DQ30 VDD10
5 M_A_DQ31 70 105 DIMM_SMBDATA D S SMB_DATA 16
DQ31 VDD11
5 M_A_DQ32 129 106
DQ32 VDD12
5 M_A_DQ33 131 111
DQ33 VDD13
5 M_A_DQ34 141 112
DQ34 VDD14 Q1202
5 M_A_DQ35 143 117
DQ35 VDD15 DMN5L06K-7-GP
5 M_A_DQ36 130 118
DQ36 VDD16
5 M_A_DQ37 132 123
DQ37 VDD17
5 M_A_DQ38 140 124
DQ38 VDD18
5 M_A_DQ39 142
DQ39
5 M_A_DQ40 147 2
DQ40 VSS
5 M_A_DQ41 149 3
DQ41 VSS
157 8
5
5
5
M_A_DQ42
M_A_DQ43
M_A_DQ44
159
146
DQ42
DQ43
DQ44
VSS
VSS
VSS
9
13
VGS(th) = 1V
5 M_A_DQ45 148 14
DQ45 VSS
5 M_A_DQ46 158 19
DQ46 VSS
5 M_A_DQ47 160 20
DQ47 VSS
5 M_A_DQ48 163 25
DQ48 VSS
5 M_A_DQ49 165 26
DQ49 VSS
5 M_A_DQ50 175 31
DQ50 VSS
5 M_A_DQ51 177 32
DQ51 VSS
5 M_A_DQ52 164 37
DQ52 VSS
5 M_A_DQ53 166 38 Layout Note:
DQ53 VSS
5 M_A_DQ54 174 43
DQ54 VSS
5 M_A_DQ55 176
DQ55 VSS
44 Place these Caps near
181 48 0D675V_S0
5 M_A_DQ56
183
DQ56 VSS
49 SO-DIMMA.
5 M_A_DQ57 DQ57 VSS 1D35V_S3
5 M_A_DQ58 191 54
DQ58 VSS
5 M_A_DQ59 193 55 SODIMM A DECOUPLING
DQ59 VSS
5 M_A_DQ60 180 60
DQ60 VSS
5 M_A_DQ61 182 61

1
DQ61 VSS C1213 C1214 C1215 C1216
5 M_A_DQ62 192 65
DQ62 VSS

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
5 M_A_DQ63 194 66 Place these caps
DQ63 VSS
71

2
1

1
VSS
5 M_A_DQS_DN0 10
DQS0# VSS
72 C1204 C1205 C1206 C1207 C1208 close to VTT1 and

SC4D7U6D3V2MX-GP-U

SC4D7U6D3V2MX-GP-U

SC4D7U6D3V2MX-GP-U

SC4D7U6D3V2MX-GP-U

SC4D7U6D3V2MX-GP-U
27 127
5 M_A_DQS_DN1
45
DQS1# VSS
128 VTT2.

2
5 M_A_DQS_DN2 DQS2# VSS
5 M_A_DQS_DN3 62 133
DQS3# VSS
5 M_A_DQS_DN4 135 134
DQS4# VSS
5 M_A_DQS_DN5 152 138
B DQS5# VSS B
5 M_A_DQS_DN6 169 139
DQS6# VSS
5 M_A_DQS_DN7 186 144
DQS7# VSS
145
VSS
5 M_A_DQS_DP0 12 150
DQS0 VSS
5 M_A_DQS_DP1 29 151
DQS1 VSS
5 M_A_DQS_DP2 47 155
DQS2 VSS
5 M_A_DQS_DP3 64 156

1
DQS3 VSS C1209 C1210 C1211 C1212
5 M_A_DQS_DP4 137 161
DQS4 VSS

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
5 M_A_DQS_DP5 154 162
DQS5 VSS
171 167

2
5 M_A_DQS_DP6 DQS6 VSS
5 M_A_DQS_DP7 188 168
DQS7 VSS
172
M_A_DIM0_ODT0 VSS
116 173
5 M_A_DIM0_ODT0 M_A_DIM0_ODT1 ODT0 VSS
120 178
5 M_A_DIM0_ODT1 ODT1 VSS
179
VREF_CA VSS
Follow BM 126
VREF_CA VSS
184
VREF_DQ 1 185
07/08 VREF_DQ VSS
189
VSS
30 190
5 DRAMA_DRAMRST RESET# VSS
改改改P.5同同 VSS
195
07/08 196
VSS 1D35V_S3
0D675V_S0 203 205
VTT1 VSS
204 206
VTT2 VSS
SKT_DDR 204P SMD
DDR3-204P-263-GP-U
H = 4mm

1
62.10024.S61 For Intel Recommend Close to DIMM(Bay Trail) For Intel Recommend Close to DIMM(Bay Trail) EC1225 EC1224
SCD1U25V2KX-L-GP SCD1U25V2KX-L-GP

2
DY DY
1D35V_S3
1D35V_S3
1

1
R1210
4K7R2F-GP R1207
4K7R2F-GP For EMI Request(13/7/3)
2

A R1211 A

2
VREF_CA VREF_DQ VREF_CA 1 2 VREF_CA_0 R1209
0R0402-PAD VREF_DQ 1 2 VREF_DQ_0
0R0402-PAD
1
1

1
C1201 R1212
1
SCD1U16V2KX-L-GP

C1202 4K7R2F-GP R1208 <Core Design>


SCD1U16V2KX-L-GP

4K7R2F-GP
2

Wistron Corporation
2

2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

20130709 DDR3-SODIMM1
Size Document Number Rev
Close RAM1 CA & DQ pin A2
SC
LF14B
Thursday, April 10, 2014
Date: Sheet 12 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM2
Size Document Number Rev
A2
LF14B SC
Date: Tuesday, October 22, 2013 Sheet 13 of 102

5 4 3 2 1
5 4 3 2 1

D D

C Blanking C

B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 14 of 102
5 4 3 2 1
5 4 3 2 1

STRAP RESISTORS SHOULD BE PLACED CLOSE TO SOC


SSID = STRAP SHOULD BE PLACED OUTSIDE KOZ AREA

Security Flash
Description BIOS Boot Selection DDI0 Detect DDI1 Detect DDI1 Detect Top swap
Descriptors
D D

GPIO GPIO_S0_SC[063] GPIO_S0_SC[065] DDI0_DDCDATA DDI1_DDCDATA MDSI_DDCDATA GPIO_S0_SC [56]


20131128
2013/04/11
1D8V_S0 1D8V_S5 1D8V_S0 1D8V_S0 1D8V_S0 1D8V_S0 1D8V_S0
1

1
R1509 R1511 R1513 R1506 R1501 R1505
R1502

10KR2F-L1-GP

10KR2F-L1-GP
10KR2F-L1-GP DY 10KR2F-L1-GP 2K2R2J-L1-GP DY 10KR2F-L1-GP DY 10KR2F-L1-GP
DY

Schematic
2

2
LPE_I2S2_FRM 19 LPE_I2S2_DATAOUT 19,24 PCH_HDMI_DATA 8,54 DDI1_GEN_R_DAT 8 GPIO_S0_NC13 8 GPIO_S0_SC_56 16
1

1
R1510 R1508 R1504 R1503 R1507
R1512
DY 10KR2F-L1-GP DY 4K7R2F-GP DY 10KR2F-L1-GP DY 10KR2F-L1-GP 10KR2F-L1-GP DY 10KR2F-L1-GP
2

2
C C

High SPI Normal Operation DDI0 detected DDI1 detected DDI1 detected

Override DDI0 not detected DDI1 not detected DDI1 not detected
Low LPC

B B

Wistron Confidential document, Anyone can not


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application without get Wistron permission
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU(STRAP)
Size Document Number Rev
A3
LF14B SA
Date: Thursday, April 10, 2014 Sheet 15 of 102
5 4 3 2 1
5 4 3 2 1

SSID = PCH 20131008 Level shifter


CPU1F 6 OF 13 3D3V_S0 1D8V_S0

G2 BAY TRAIL-M/D SOC M10


GPIO_S5_31 RESERVED_M10

1
M9 Make sure the signal routing is as short as possible
RESERVED_M9

1
and isolated from high speed data signal. R1621
M3 P7 Parasitic resistance for the overall routing should be less than 100 Ω. R1620 4K7R2J-L-GP
PCB_VER1 GPIO_S5_32 RESERVED_P7 2K2R2J-L1-GP
L1 P6
PCB_VER2 GPIO_S5_33 RESERVED_P6
K2
USB Table

2
PCB_VER3 GPIO_S5_34
K3

B 2
GPIO_S5_35 R1602
M2 M7 SATA_ODD_PWRGT_B
ThermalIC_DET GPIO_S5_36 RESERVED_M7 USB3_P1_REXT
Pair Device N3
GPIO_S5_37 USB3_REXT0
M12 1 2
P2
GPIO_S5_38 SATA_ODD_PWRGT
0 USB3.0 Port 0(USB2.0) L3 P10 56 SATA_ODD_PWRGT C ESATA_ODD_PWRGT_E 1 R1628 2 SATA_ODD_PWRGT_CPU
GPIO_S5_39 RESERVED_P10 1K24R2F-GP 0R0402-PAD
P12
RESERVED_P12 Q1605
1 USB 2.0 LMBT3904LT1G-GP
M4
RESERVED_M4
2 USB2.0 (IO Board) J3
GPIO_S5_40 RESERVED_M6
M6 84.T3904.H11
P3
GPIO_S5_41 2nd = 84.03904.E11
3 USB HUB H3
GPIO_S5_42 USB3_RXP0
D4 USB3_1_RX1_P 34
B12 E3 USB3_1_RX1_N 34
GPIO_S5_43 USB3_RXN0
K6
D USB3_TXP0 USB3_1_TX1_P 34 D
M16 K7
USB 3.0 34,39
34,39
USB_PP0
USB_PN0 K16
USB_DP0 USB3_TXN0 USB3_1_TX1_N 34
USB_DN0

USB 2.0 63 USB_PP1 J14


USB_DP1
20131021
63 USB_PN1 G14
USB_DN1
K12 3D3V_S0 3D3V_S0 1D8V_S0
USB2.0 (IO Board) 63 USB_HUB_PP3
63 USB_HUB_PN3 J12
USB_DP2
USB_DN2

1
0R0402-PAD 1 R1614 2 USB_PP3_CPU K10 H8
USB HUB 35 USB_PP3 USB_DP3 RESERVED_H8

1
0R0402-PAD 1 R1619 2 USB_PN3_CPU H10 H7 R1629
35 USB_PN3 USB_DN3 RESERVED_H7 1D8V_S0 R1640 R1632 4K7R2J-L-GP
10KR2J-L-GP 2K2R2J-L1-GP
ICLK_USB_TERMN_0 D10 H5 TOUCH_INT_CPU 1 4
Close to CPU1

2
ICLK_USB_TERMN_1 F10 ICLK_USB_TERMN_D10 RESERVED_H5 TOUCH_RST_CPU2
20130812 H4 3

B 2
ICLK_USB_TERMN RESERVED_H4 HDA_SPKR_B
R1611 RN1606
1D8V_S5 1 10KR2J-L-GP
2 USB_OC#0
34,39 USB_OC#0
USB_OC#0 C20 SRN2K2J-5-GP R1630
R1613 USB_OC#1 USB_OC_0 HDA_SPKR
63 USB_OC#1 B20 27 HDA_SPKR C EHDA_SPKR_E 1 2 HDA_SPKR_CPU
USB_OC_1
1D8V_S5 1 10KR2J-L-GP
2 USB_OC#1 0R0402-PAD
Q1606
LMBT3904LT1G-GP
USB_RCOMP D6 BD12 84.T3904.H11
USB_RCOMPO GPIO_S0_SC_55 TOUCH_INT_CPU 52
無1%排
排阻 2 R1601 1 ICLK_USB_TERMN_0
C7
USB_RCOMPI GPIO_S0_SC_56
GPIO_S0_SC_57
BC12
BD14
GPIO_S0_SC_56
GPIO_S0_SC_56 15
TOUCH_RST_CPU 52
2nd = 84.03904.E11
BC14 DGPU_HOLD_RST#_CPU
1KR2F-L-GP USB_PLL_MON GPIO_S0_SC_58
M13 BF14
USB_PLL_MON GPIO_S0_SC_59
2 R1603 1 ICLK_USB_TERMN_1 BD16
1KR2F-L-GP GPIO_S0_SC_60 SATA_ODD_PWRGT_CPU
BC16
GPIO_S0_SC_61
Avoid routing next to 1 R1604 2 USB_RCOMP 1USB_HSIC_0_DATA B4
TP1604 USB_HSIC0_DATA
clock/high speed signals. 45D3R2F-L-GP 1USB_HSIC_0_STROBE B5 1.8V BH12 HDA_SPKR_CPU
TP1605 USB_HSIC0_STROBE ILB_8254_SPKR
R1616
DY 1 R1605 2 USB_PLL_MON
0R2J-L-GP TP1606 1USB_HSIC_1_DATA E2 DGPU_PWR_EN# 1 2
USB_HSIC1_DATA
TP1607 1USB_HSIC_1_STROBE D2
Connected to package ground. USB_HSIC1_STROBE
1 R1606 2 USB_HSIC_RCOMP BH22 10KR2J-L-GP
45D3R2F-L-GP SIO_I2C0_DATA
BG23
USB_HSIC_RCOMP SIO_I2C0_CLK
A7
USB_HSIC_RCOMP
1 R1607 2 RCOMP_LPC_HVT R1615
49D9R2F-L1-GP BG24
SIO_I2C1_DATA DGPU_HOLD_RST#_CPU
BH24 2 1
RCOMP_LPC_HVT SIO_I2C1_CLK
BF18
LPC_RCOMP 3.3V/1.8V
24,65 LPC_AD0 BH16
22R2J-L1-GP ILB_LPC_AD_0 10KR2J-L-GP
24,65 LPC_AD1 BJ17 BG25
ILB_LPC_AD_1 SIO_I2C2_DATA
65 CLK_PCI_LPC 1 R1608 2 24,65 LPC_AD2 BJ13 BJ25
ILB_LPC_AD_2 SIO_I2C2_CLK
24,65 LPC_AD3 BG14
ILB_LPC_AD_3
24,65 LPC_FRAME# BG17
22R2J-L1-GP 1 R1609 CLK_PCI_LPC_R ILB_LPC_FRAME
24 CLK_PCI_KBC 2 BG15 BG26
ILB_LPC_CLK_0 SIO_I2C3_DATA
SC33P50V2JN-3GP

BH14 BH26
ILB_LPC_CLK_1 SIO_I2C3_CLK
24 PM_CLKRUN#_EC BG16
ILB_LPC_CLKRUN
1

C1602 BG13 1.8V


24 INT_SERIRQ_CPU ILB_LPC_SERIRQ
DY BF27
SIO_I2C4_DATA
BG27
2

SIO_I2C4_CLK

C
1D8V_S0 2
1
RN1601
3
4
SMB_DATA
SMB_CLK
12
12
SMB_DATA
SMB_CLK
SMB_DATA
SMB_CLK
TP1603 1
BG12
BH10
PCU_SMB_ALERT# BG11
PCU_SMB_DATA
PCU_SMB_CLK
PCU_SMB_ALERT
1.8V
SIO_I2C5_DATA
SIO_I2C5_CLK
BH28
BG28 Vinafix.com C
SC33P50V2JN-3GP

BJ29
SRN2K2J-5-GP SIO_I2C6_DATA
BG29
SIO_I2C6_CLK
1

C1604
1 2 PCU_SMB_ALERT#
1D8V_S0
R1612
DY BH30 PSW_CLR#
2

GPIO_S0_SC_92 eMMC_PRT DGPU_PWR_EN#


BG30 DY 1 2 EC1603
2K2R2J-L1-GP GPIO_S0_SC_93 SCD1U25V2KX-GP
DY
BAY-TRAIL-GP

1D8V_S0
1

1
R2003
10KR2J-L-GP R2005
eMMC 10KR2J-L-GP
1D8V_S5
2

1D8V_S5
PSW_CLR#
eMMC_PRT PCB_VER2H
1

1
R2009 R1638

1
100KR2F-L1-GP
10KR2J-L-GP
NCT7718
Non eMMC PCB_VER1H R1624 R1626 R1633
Model_ID_BOM Ctrl
2

100KR2F-L1-GP

100KR2F-L1-GP

100KR2F-L1-GP
PCB_VER3H
2

2
G1601
GAP-OPEN

2
PCB_VER1 PCB_VER2 PCB_VER3
ThermalIC_DET
1

SDV H H H
For PSW_CLR#(5/14) PCB_VER1
SIV H L H
PCB_VER2
SIT L H H
PCB_VER3

1
PCB_VER2L SIT2 L L H
R1637

1
100KR2F-L1-GP
TV SVT H H L
R1625 R1627 R1634
B

100KR2F-L1-GP

100KR2F-L1-GP

100KR2F-L1-GP
B
PCB_VER1L Reserve H L L

2
PCB_VER3L

2
A A

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (USB/LPC/GPIO)
Size Document Number Rev
A1
LF14B SA
Date: Thursday, April 10, 2014 Sheet 16 of 102
5 4 3 2 1
5 4 3 2 1

SSID = PCH

D D

Blanking C

B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DMI/FDI/PM)
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 17 of 102
5 4 3 2 1
5 4 3 2 1

C1801 3D3V_AUX_KBC Level shift


SSID = PCH 2 1 SC15P50V2JN-L-GP XTAL25_IN
R1822
XTAL-25MHZ-181-GP 100KR2J-4-GP
1 2 1D8V_S5 3D3V_S5
DY

1
3D3V_S5
4 1 R1821
Q1802

1
10KR2F-L1-GP
R1801 R1844 R1831

1
PM_RSMRST# 2 R1823 1 2K2R2J-L1-GP 2K2R2J-L1-GP
1MR2J-L3-GP 4 3 RSMRST#_KBC 24 DY

2
3 2 1KR2F-L-GP R1826
RSMRST#_KBC_G 5 2 1D0V_S5_PWRGD 50,51

2
4K7R2J-L-GP
C1802

2
X1801 6 1

2
1
2 1 SC15P50V2JN-L-GP XTAL25_OUT R1825 PMC_WAKE_PCIE_2#_B

B
100KR2J-4-GP C3713
SC22P50V2GN-GP R1845

2
DMN601DWK-7-1-GP PMC_WAKE_PCIE_2#
DY C EPMC_WAKE_PCIE_2#_C 1 DY 0R2J-2-GP
2

1
PCIE_WAKE# 24
82.30020.G71 Q1803
LMBT3904LT1G-GP
PMC_WAKE_PCIE_2#_C 58
84.T3904.H11
2nd = 84.03904.E11 20130814

D 1D8V_S5 D

1
R1839

CPU1E 5 OF 13 20KR2J-L3-GP

XTAL25_IN AH12 BAY TRAIL-M/D SOC AU34

2
XTAL25_OUT ICLK_OSCIN SIO_UART1_RXD PMC_BATLOW#
AH10 AV34
ICLK_OSCOUT SIO_UART1_TXD
BA34
SIO_UART1_RTS
AD9 AY34
RESERVED_AD9 SIO_UART1_CTS 5V_S5
ICLK_ICOMP AD14 BF34 1D8V_S5
ICLK_RCOMP AD13
ICLK_ICOMP
ICLK_RCOMP
SIO_UART2_RXD
SIO_UART2_TXD
BD34 1D8V_S5 13/7/5
BD32
SIO_UART2_RTS

2
AD10 BF32
RESERVED_AD10 SIO_UART2_CTS

2
AD12 R1849
RESERVED_AD12 R1850 10KR2J-L-GP

2
AF6 10KR2J-L-GP
PCIE_CLKN_0 SUS_PWR_ACK_CPU R1858
AF4 1.8V D26

1
PCIE_CLKP_0 PMC_SUSPWRDNACK
1 R1802 2 ICLK_ICOMP G24 PMC_SUSCLK0_G24 1 TP1801 10KR2J-L-GP SUS_PWR_ACK_B

1
4K02R2F-GP PMC_SUSCLK0_G24 SUS_PWR_ACK_CPU
AF9
PCIE_CLKN_1 PMC_SLP_S0IX
F18 20131011 DY
AF7 F22 PM_SLP_S4#_CPU

1
PCIE_CLKP_1 PMC_SLP_S4 1D8V_S5
1 R1803 2 ICLK_RCOMP 1.0V D22 PM_SLP_S3#_CPU
13/7/10

G
S
47D5R2F-1-GP PMC_SLP_S3 3D3V_S5
J20
GPIO_S514_J20 10KR2J-L-GP PM_SUS_STAT#_CPU Q1809
AK4 D20
WLAN 58 CLK_PCIE_WLAN#
58 CLK_PCIE_WLAN AK6
PCIE_CLKN_2 PMC_ACPRESENT
F26 SOC_F26
AC_PRESENT_CPU 24
SOC_F26 1 2 R1859 2N7002K-2-GP
PCIE_CLKP_2 PMC_WAKE_PCIE_0 PMC_BATLOW#
K26
PMC_BATLOW 84.2N702.J31

2
AM4 J26
RTC_AUX_S5 LAN 30 PCIE_CLK_LAN#
30 PCIE_CLK_LAN AM6
PCIE_CLKN_3 PMC_PWRBTN
BG9
PM_PWRBTN#_CPU 24
2ND = 84.2N702.031R1855
PCIE_CLKP_3 PMC_RSTBTN PLT_RST#_CPU 10KR2J-L-GP
PMC_PLTRST
F20 20131014 DY
AM10 J24 DY

D
RESERVED_AM10 GPIO_S517_J24
1 R1804 2 20KR2F-L3-GP AM9 G18 PM_SUS_STAT#_CPU

1
RESERVED_AM9 PMC_SUS_STAT 1D8V_S5
1 R1805 2 SUS_PWR_ACK 24
20KR2F-L3-GP 10KR2J-L-GP
1

C1803 AC_PRESENT_CPU 1 2 R1853


SC1U10V2KX-L1-GP

3.3V C11 SRTC_RST#


ILB_RTC_TEST 1D8V_S5
BH7
2

PMC_PLT_CLK_0 10KR2J-L-GP
BH5
PMC_PLT_CLK_1 PM_PWRBTN#_CPU 1 R1854 2
BH4
PMC_PLT_CLK_2 PM_RSMRST#
BH8 B10
BH6
PMC_PLT_CLK_3
PMC_PLT_CLK_4
PMC_RSMRST
PMC_CORE_PWROK
B7 COREPWROK COREPWROK 36 13/7/10 3D3V_S5 3D3V_S0

1
BJ9
PMC_PLT_CLK_5 3.3V
RTC_RST# C12 3.3V R1841
ILB_RTC_RST RTC_X1 RTC_X1
C9 10KR2F-L1-GP
ILB_RTC_X1

2
XDP_H_TCK D14 A9 RTC_X2 C1804
XDP_H_TRST_N TAP_TCK ILB_RTC_X2 BVCCRTC_EXTPAD 1 R1807 R1843
G12 1.8V B8 2

2
TAP_TRST ILB_RTC_EXTPAD

2
XDP_H_TMS F14 RTC_X2 2 1 10KR2J-L-GP
XDP_H_TDI TAP_TMS SCD1U16V2KX-L-GP 10MR2J-L-GP 1D8V_S5 R1857
F12
SRTC_RST# XDP_H_TDO TAP_TDI R1816 10KR2J-L-GP
G16

1
TAP_TDO 20R2F-GP
D18
RTC_RST# TAP_PRDY
F16 1.0V_S B24 SVID_ALERT# 1 2 VR_SVID_ALERT# X1802

1
TAP_PREQ SVID_ALERT VR_SVID_ALERT# 46

1
AT34 A25 SVID_DATA 1 R1817 2 16D9R2F-1-GP H_CPU_SVIDDAT 46
XTAL-32D768KHZ-6-GP PLT_RST#_D
PLT_RST# 24,30,35,58,65,76
22R2F-1-GP RESERVED SVID_DATA
C25 SVID_CLK 1 2 H_CPU_SVIDCLK 46
2nd = 82.30001.661 R1842
SVID_CLK
25 PCH_SPI_CS0#_FLASH 1 R1809 2 PCH_SPI_CS0# C23 DY R1818 0R0402-PAD 2K2R2J-L1-GP
PCU_SPI_CS_0
2

1
C21 4 1 DY

D
PCU_SPI_CS_1
1

C1805 G1801 B22 1.8V AU32 C1817 1D0V_S0


25 PCH_SPI_SO

2
PCU_SPI_MISO SIO_PWM_0
SC1U10V2KX-L1-GP

GAP-OPEN 25 PCH_SPI_SI_FLASH 22R2F-1-GP 1 R1810 2 PCH_SPI_SI A21 AT32 SC33P50V2JN-3GP 75R2J-1-GP Q1808

2
PCU_SPI_MOSI SIO_PWM_1

1
C PCH_SPI_CLK VR_SVID_ALERT# C
25 PCH_SPI_CLK_FLASH 1 2 C22 1 R1824 2 R1827 2N7002K-2-GP
2

R1811 PCU_SPI_CLK C1806 3 C1807 PLT_RST#_CPU1


2 2PLT_RST#_CPU_G G Q1812
84.2N702.J31
1

SC6D8P50V2DN-GP

SC6D8P50V2DN-GP
22R2F-1-GP 0R0402-PAD DMN5L06K-7-GP

2
C1816
24 SOC_WAKE_SCI#
SOC_WAKE_SCI# B18 2ND = 84.2N702.031
PMC_WAKE_PCIE_1# GPIO_S5_0
SC33P50V2JN-3GP B16 K24
2

S
PMC_WAKE_PCIE_2# GPIO_S5_1 GPIO_S5_22 DBG0
C18 N24 1
DY

S
GPIO_S5_2 GPIO_S5_23 TP1802
PMC_WAKE_PCIE_3# A17 M20 DBG1 1
RTC Reset C17
GPIO_S5_3 GPIO_S5_24
J18 DBG2 1
TP1803
TP1804
RTC_DET# GPIO_S5_4 GPIO_S5_25 DBG3
25 RTC_DET# C16 M18 1 TP1805
GPIO_S5_5 GPIO_S5_26
R1837 B14 K18
EC_SMI# GPIO_S5_6 GPIO_S5_27
24 EC_SMI# C15 K20
RTC_DET# GPIO_S5_7 GPIO_S5_28
1D8V_S5 2 1 M22
GPIO_S5_29
GPIO_S5_30
M24 20131021
10KR2J-L-GP
C13
GPIO_S5_8
A13
GPIO_S5_9
C19 AV32
GPIO_S5_10 SIO_SPI_CS
BA28
SIO_SPI_MISO
AY28
SIO_SPI_MOSI
1 R1806 2 XDP_H_TCK 1 R1812 2GPIO_RCOMP18 N26 AY30
51R2J-L1-GP 49D9R2F-L1-GP GPIO_RCOMP SIO_SPI_CLK 3D3V_S5
3D3V_S5

2
1 R1808 2 XDP_H_TRST_N BAY-TRAIL-GP
51R2J-L1-GP R1829
10KR2J-L-GP

2
1D8V_S5 1 R1813 2 XDP_H_TMS Q1810
51R2J-L1-GP R1828 2N7002KDW-GP
13/7/11

1
10KR2J-L-GP 84.2N702.A3F PM_SLP_S4#
1D8V_S5 PM_SLP_S4# 24,36,49
1D8V_S5 1 R1814 2 XDP_H_TDI 2nd = 84.DM601.03F AFTP1801 1 PM_SLP_S4#
51R2J-L1-GP 3rd = 84.2N702.F3F

1
1 6
3D3V_S5 AFTE14P-GP
1D8V_S5 1 R1815 2 XDP_H_TDO PLT_RST#_CPU DY 1 2 EC1808

1
51R2J-L1-GP SCD1U25V2KX-GP PM_SLP_S4#_CPU_D 2 5
R1840
2K2R2J-L1-GP 3 4

2
DY

D
VR_SVID_ALERT# DY 1 2 EC1809 R1851

2
SCD1U25V2KX-GP 10KR2J-L-GP
R1833 1D8V_S5
1D8V_S5 2 1 PMC_WAKE_PCIE_1# PM_SLP_S4#_CPU
1 R1832 2PM_SLP_S4#_CPU_G G Q1806

1
0R0402-PAD DMN5L06K-7-GP
COREPWROK DY 1 2 EC1810 PM_SLP_S3#_CPU_D

1
10KR2J-L-GP SCD1U25V2KX-GP

S
If no PCI Express ports is implemented on the platform, pull-up to V1P8 Via a 10-kΩ resistor. R1852
2K2R2J-L1-GP
3D3V_S5
DY

2
R1834 reserve the 0402 0.1u caps on reset for EMI(5/9). Q1815 G PM_SLP_S3#_CPU_G
1D8V_S5 2 1 SOC_WAKE_SCI# DMN5L06K-7-GP

2
10KR2J-L-GP
R1856

S
10KR2J-L-GP
PM_SLP_S3#_CPU
1 2 R1830
1D8V_S5 2 R1835 1 EC_SMI#

1
PM_SLP_S3# 0R0402-PAD
24,45,46,49 PM_SLP_S3#
B 10KR2J-L-GP B

R1836

1D8V_S5 2 1 PMC_WAKE_PCIE_2#

10KR2J-L-GP 24 KBC_RTCRST# G DY
D RTC_RST#

S
1

R1819 Q1801
R1838
2N7002K-2-GP
1D8V_S5 2 1 PMC_WAKE_PCIE_3# 100KR2F-L3-GP DY 84.2N702.J31
PMC_WAKE_PCIE_3# 30
2ND = 84.2N702.031
2

10KR2J-L-GP
20131017
20130730

A A

Wistron Confidential document, Anyone can not


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application without get Wistron permission
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (CLK/SPI/SIDEBAND/JTAG)
Size Document Number Rev
A1
LF14B SA
Date: Thursday, April 10, 2014 Sheet 18 of 102

5 4 3 2 1
5 4 3 2 1

SSID = PCH

CPU1D 4 OF 13

BF6 BAY TRAIL-M/D SOC AY7


56 SATA_TXP0 SATA_TXP_0 PCIE_TXP_0
56 SATA_TXN0 BG7
SATA_TXN_0
1.0V PCIE_TXN_0
AY6

HDD 56 SATA_RXP0 AU16


SATA_RXP_0 PCIE_RXP_0
AT14
AV16 AT13
D
56 SATA_RXN0 SATA_RXN_0 PCIE_RXN_0 GPU Level shift D
56 SATA_TXP1 BD10 AV6
SATA_TXP_1 PCIE_TXP_1
BF10 AV4
ODD 56 SATA_TXN1 SATA_TXN_1 PCIE_TXN_1

56 SATA_RXP1 AY16 AT10


SATA_RXP_1 PCIE_RXP_1 1D8V_S0
56 SATA_RXN1 BA16 AT9
SATA_RXN_1 PCIE_RXN_1
ICLK_SATA_TERMP BB10 AT7 PCIE_TXP2_C SCD1U16V2KX-L-GP 2 1 C1911
ICLK_SATA_TERMN ICLK_SATA_TERMP PCIE_TXP_2 PCIE_TXN2_C PCIE_TXP2 58
20131008 BC10 AT6 SCD1U16V2KX-L-GP 2 1 C1912
ICLK_SATA_TERMN PCIE_TXN_2 PCIE_TXN2 58
R1901
24 SOC_RUNTIME_SCI# BA12 AP12 PCIE_RXP2 58
WLAN
SATA_LED# SATA_ODD_PRSNT#_CPU AY14 SATA_GP0 PCIE_RXP_2
1D8V_S0 1 10KR2J-L-GP
2 AP10 PCIE_RXN2 58
SATA_GP1 PCIE_RXN_2
TP1902 1SATA_LED# AY12 1.8V

2
SATA_LED PCIE_TXP3_C SCD1U16V2KX-L-GP C1913
AP6 2 1 PCIE_TXP3 30
SATA_RCOMP_DP PCIE_TXP_3 PCIE_TXN3_C SCD1U16V2KX-L-GP C1914 R1945
AU18 AP4 2 1
2013/04/08 2 1 SATA_RCOMP_DN AT18
SATA_RCOMP_P_AU18 PCIE_TXN_3 PCIE_TXN3 30
10KR2J-L-GP
402R2F-GP R1909 SATA_RCOMP_N_AT18
AP9 PCIE_RXP3 30
LAN
PCIE_RXP_3
AP7

1
PCIE_RXN_3 PCIE_RXN3 30
EMMC_CLK AT22
66 EMMC_CLK MMC1_CLK R1946
BB7
EMMC_DATA_0 VSS_BB7 1D8V_S0 PCIE_CLK_LAN_REQ#_CPU
AV20 BB5 2 1 PCIE_CLK_LAN_REQ# 30
66 EMMC_DATA_0 EMMC_DATA_1 MMC1_D0 VSS_BB5
AU22
66 EMMC_DATA_1 EMMC_DATA_2 MMC1_D1
66 EMMC_DATA_2
AV22
MMC1_D2
1.8V PCIE_CLKREQ_0
BG3
0R0402-PAD
EMMC_DATA_3 AT20 BD7 PCIE_CLKREQ_3# 2 1 HDA_RST#
66 EMMC_DATA_3 EMMC_DATA_4 MMC1_D3 PCIE_CLKREQ_1 CLK_PCIE_WLAN_REQ#_CPU R1937 10KR2J-L-GP
AY24 BG5
66
66
EMMC_DATA_4
EMMC_DATA_5
EMMC_DATA_5 AU26
MMC1_D4
MMC1_D5
PCIE_CLKREQ_2
PCIE_CLKREQ_3
BE3 PCIE_CLK_LAN_REQ#_CPU Bay Trail
EMMC_DATA_6 AT26 BD5

1
66 EMMC_DATA_6 EMMC_DATA_7 MMC1_D6 SD3_WP_BD5
AU20
66 EMMC_DATA_7 MMC1_D7
AP14 PCIE_RCOMP_P_AP14_AP14 2 R1919 1 402R2F-GP C1910 DY
EMMC_CMD PCIE_RCOMP_P_AP14 SC22P50V2JN-L-GP
66 EMMC_CMD AV26 AP13 PCIE_RCOMP_N_AP13_AP13

2
EMMC_RESET BA24 MMC1_CMD PCIE_RCOMP_N_AP13
66 EMMC_RESET MMC1_RST
BB4
RESERVED_BB4
1 R1912 2 MMC1_RCOMP AY18 BB3
49D9R2F-L1-GP MMC1_RCOMP RESERVED_BB3
AV10
RESERVED_AV10 C1902
BA18
RESERVED_AV9
AV9
HDA_BITCLK 1 2
DY
SD2_CLK 49D9R2F-L1-GP
AY20
SD2_D0
BD20 1.5V BF20 HDA_LPE_RCOMP1 2 SC33P50V2JN-3GP

Vinafix.com
SD2_D1 HDA_LPE_RCOMP
BA20 BG22 HDA_RST# R1914
SD2_D2 HDA_RST
BD18 BH20 HDA_SYNC
SD2_D3_CD HDA_SYNC
BC18 BJ21 HDA_BITCLK
SD2_CMD HDA_CLK
C BG20 HDA_SDOUT 1 R1917 2 33R2J-L1-GP HDA_CODEC_SDOUT 27
C
HDA_SDO
BG19
HDA_SDI0
BG21 HDA_SDI1
CPU_SD3_CLK HDA_SDI1
TP1903 1 AY26 BH18 HDA_SDIN0 27
SD3_CLK HDA_DOCKRST 1D8V_S0
AT28 BG18 1 TP1901
SD3_D0 HDA_DOCKEN
BD26
SD3_D1 3D3V_S0
AU28 BF28
CPU_SD3_D3 SD3_D2 LPE_I2S2_CLK LPE_I2S2_FRM
TP1905 1 BA26 1.8V BA30 LPE_I2S2_FRM 15

1
SD3_D3 LPE_I2S2_FRM LPE_I2S2_DATAOUT 3D3V_S0
BC24 BC30 LPE_I2S2_DATAOUT 15,24

2
CPU_SD3_CMD SD3_CD# LPE_I2S2_DATAOUT R1942
TP1906 1 AV28 BD28
SD3_CMD LPE_I2S2_DATAIN Q1906 2K2R2J-L1-GP R1928
BF22
SD3_1P8EN 2N7002KDW-GP 10KR2J-L-GP
BD22 P34
SD3_PWREN RESERVED_P34
N34 84.2N702.A3F

2
2
SD3_RCOMP BF26 RESERVED_N34
1 R1922 2 33D2R2F-GP 2nd = 84.DM601.03F

1
49D9R2F-L1-GP SD3_RCOMP
AK9 1 R1931 2 1D0V_S0 R1943 3rd = 84.2N702.F3F
RESERVED_AK9 10KR2J-L-GP CLK_PCIE_WLAN_REQ#_CPU
AK7 1 6
RESERVED_AK7 R1923
1.0V C24 H_PROCHOT#_R 2 1 2 5

1
PROCHOT H_PROCHOT# 24,44,46 CLK_PCIE_WLAN_REQ# 58
0R0402-PAD
CLK_PCIE_WLAN_REQ#_CPU_D 3 4

1
BAY-TRAIL-GP C1901
SC47P50V2JN-3GP DY

2
2 R1924 1 ICLK_SATA_TERMP
0R2J-L-GP

2 R1925 1 ICLK_SATA_TERMN
0R2J-L-GP

RN1901
1 4 HDA_BITCLK
27 HDA_CODEC_BITCLK HDA_RST#
27,28 HDA_CODEC_RST# 2 3

SRN33J-5-GP-U

B B

5V_S0

G
R1926
HDA_SYNC 2 1 HDA_SYNC_R D
33R2J-L1-GP
S HDA_CODEC_SYNC 27
Q1902
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031

2 R1929 1
0R2J-L-GP
2013/04/08 DY

3D3V_S0 1D8V_S0
Level shifter
1

3D3V_S0 1D8V_S0
????? 阻阻阻阻阻阻
R1903 R1907
2K2R2J-L1-GP
DY 2K2R2J-L1-GP
1

R1902 R1905
2

A 4K7R2J-L-GP 4K7R2J-L-GP A
2

SATA_ODD_PRSNT#_B Wistron Confidential document, Anyone can not


B

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R1904 <Core Design> application without get Wistron permission
SATA_ODD_PRSNT# E CSATA_ODD_PRSNT#_E 1 2 SATA_ODD_PRSNT#_CPU
56 SATA_ODD_PRSNT#
0R0402-PAD
Q1903
LMBT3904LT1G-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
84.T3904.H11 Taipei Hsien 221, Taiwan, R.O.C.
2nd = 84.03904.E11 Title

CPU (SATA/PCIE/IHDA)
Size Document Number Rev
A2
LF14B SA
Date: Thursday, April 10, 2014 Sheet 19 of 102
5 4 3 2 1
5 4 3 2 1

SSID = PCH

D D

Blanking C

B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 20 of 102
5 4 3 2 1
5 4 3 2 1

1D8V_S0
CPU_AM32 11
1D0V_S0
CPU1H 8 OF 13 1D35V_S0 PR2106 1 DY 1D5V_S0
2
0R2J-2-GP
V32 BAY TRAIL-M/D SOC AD36 1D8V_S0
SVID_V1P0_S3_V32 DRAM_V1P35_S0IX_F1_AD36
BJ6 VGA_V1P0_S3_BJ6 HDA_LPE_V1P5V1P8_S3_AM32 AM32 CPU_AM32 1 PR2104
2
AD35 AM30 0R0402-PAD 3D3V_S0
DRAM_V1P0_S0IX_AD35 UNCORE_V1P8_S3_AM30 PR2105 1D8V_S5
AF35 DRAM_V1P0_S0IX_AF35 UNCORE_V1P8_S3_AN32 AN32
AF36 DRAM_V1P0_S0IX_AF36 LPC_V1P8V3P3_S3_AM27 AM27 CPU_AM27 1 2
AA36 U24 0R0402-PAD ?
DRAM_V1P0_S0IX_AA36 UNCORE_V1P8_G3_U24
AJ36 DRAM_V1P0_S0IX_AJ36 USB_V3P3_G3_N18 N18 3D3V_S5
D AK35 DRAM_V1P0_S0IX_AK35 USB_V3P3_G3_P18 P18 D
AK36 U38 1D8V_S5 R2102
DRAM_V1P0_S0IX_AK36 UNCORE_V1P8_S3_U38 1D8V_S0
Y35 AN24 3D3V_S0 SD3_V1P8V3P3_S3_AN271 2 3D3V_S0
DRAM_V1P0_S0IX_Y35 VGA_V3P3_S3_AN24 0R0402-PAD
Y36 DRAM_V1P0_S0IX_Y36 PCU_V1P8_G3_V25 V25
1D0V_S5
AK19 DDI_V1P0_S0IX_AK19 PCU_V3P3_G3_N22 N22 3D3V_S5 1 DY 2 1D8V_S0
AK21 DDI_V1P0_S0IX_AK21 SD3_V1P8V3P3_S3_AN27 AN27 SD3_V1P8V3P3_S3_AN27 R2103 0R2J-L-GP
AJ18 DDI_V1P0_S0IX_AJ18 VSS_AD16 AD16
AM16 DDI_V1P0_S0IX_AM16 VSS_AD18 AD18
U22 UNCORE_V1P0_G3_U22 USB_HSIC_V1P2_G3_V18 V18 USB_HSIC_V1P2_G3_V18
V22 AA18 1D8V_S5
UNCORE_V1P0_G3_V22 UNCORE_V1P8_G3_AA18
AN29 VIS_V1P0_S0IX_AN29 RTC_VCC_P22 P22 RTC_AUX_S5
AN30 N20
1D0V_S0 AF16
VIS_V1P0_S0IX_AN30
UNCORE_V1P0_S3_AF16
USB_V1P8_G3_N20
PMU_V1P8_G3_U25 U25 2013/04/18
AF18 UNCORE_V1P0_S3_AF18 CORE_V1P05_S3_AF33 AF33
Y18 AG33 R2104
UNCORE_V1P0_S3_Y18 CORE_V1P05_S3_AG33 1D05V_S0 USB_HSIC_V1P2_G3_V18
G1 UNCORE_V1P0_S3_G1 CORE_V1P05_S3_AG35 AG35 11 USB_HSIC_V1P2_G3_V18 1 2 1D0V_S5
AM21 U33 0R0402-PAD
PCIE_V1P0_S3_AM21 CORE_V1P05_S3_U33
AN21 PCIE_V1P0_S3_AN21 CORE_V1P05_S3_U35 U35
CORE_V1P05_S3_V33 V33
1D05V_S0 AN18 A3
PCIE_GBE_SATA_V1P0_S3_AN18 VSS_A3
AN19 SATA_V1P0_S3_AN19 VSS_A49 A49
AA33 CORE_V1P05_S3_AA33 VSS_A5 A5
AF21 UNCORE_V1P0_S0IX_AF21 VSS_A51 A51
AG21 UNCORE_V1P0_S0IX_AG21 VSS_A52 A52
1D0V_S0 V24 A6
VIS_V1P0_S0IX_V24 VSS_A6
Y22 VIS_V1P0_S0IX_Y22 VSS_B2 B2
Y24 VIS_V1P0_S0IX_Y24 VSS_B52 B52
M14 USB_V1P0_S3_M14 VSS_B53 B53
C 端1.05V
CRB端 1D0V_S5
U18
U19
USB_V1P0_S3_U18
USB_V1P0_S3_U19
VSS_BE1
VSS_BE53
BE1
BE53 C
AN25 GPIO_V1P0_S3_AN25 VSS_BG1 BG1
Y19 USB3_V1P0_G3_Y19 VSS_BG53 BG53
1D05V_S0 C3 BH1
USB3_V1P0_G3_C3 VSS_BH1
C5 UNCORE_V1P0_G3_C5 VSS_BH2 BH2
B6 UNCORE_V1P0_G3_B6 VSS_BH52 BH52
AC32 CORE_V1P0_S3_AC32 VSS_BH53 BH53
Y32 CORE_V1P0_S3_Y32 VSS_BJ2 BJ2
U36 UNCORE_V1P35_S0IX_F4_U36 VSS_BJ3 BJ3
1D35V_CRT_S0 1D35V_S0 AA25 BJ5
UNCORE_V1P35_S0IX_F5_AA25 VSS_BJ5
AG32 UNCORE_V1P35_S0IX_F2_AG32 VSS_BJ49 BJ49
V36 UNCORE_V1P35_S0IX_F3_V36 VSS_BJ51 BJ51
BD1 VGA_V1P35_S3_F1_BD1 VSS_BJ52 BJ52
AF19 UNCORE_V1P35_S0IX_F6 VSS_C1 C1
AG19 UNCORE_V1P35_S0IX_F1_AG19 VSS_C53 C53
AJ19 ICLK_V1P35_S3_F1_AJ19 VSS_E1 E1
E53 1D0V_S0
VSS_E53
RESERVED_F1 F1
AG18 ICLK_V1P35_S3_F2 PCIE_V1P0_S3_AK18 AK18
AN16 VSSA_AN16 PCIE_V1P0_S3_AM18 AM18
U16 USB_VSSA_U16
BAY-TRAIL-GP

2013/04/08 AME8818 for 1D35V_CRT


B

3D3V_S5
Enable=1.2V
1
PR2101
2
Disable=0.6V
37 1D35V_S0_EN Io=35mA
1

0R0402-PAD
PC2101
SC10U10V5KX-L1-GP
2

1D35V_CRT_S0
1

20130723 PC2106 DY Vo(cal.)=1.36V


SCD1U10V2KX-L1-GP PU2101
2

AME8818DEEVADJZ-GP
Hi

74.08818.A3F
L:o1

1
1 5 PC2104
:.

IN OUT
2
R1 PR2102 PC2103 DY PC2105
0.

GND
SC100P50V2JN-L-GP

SC10U10V5KX-L1-GP
PW R_1D35V_CRT_EN 3 4 7K68R2F-GP
2

2
EN ADJ
SC22U6D3V3MX-1-GP

Wistron Confidential document, Anyone can not


2

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PW R_1D35V_CRT_ADJ application without get Wistron permission
A <Core Design> A
1

PR2103
The PU2101 change solution to 74.08818.A3F .
R2 20K5R2F-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.

Title
Vout = 0.98 * ( 1 + R1/R2 )
CPU (POWER1) www.teknisi-indonesia.com
= 0.98 * ( 1 + 7.68K /
Size Document Number Rev
20K) A3
LF14B SA
= 1.356V Date: Thursday, April 10, 2014 Sheet 21 of 102
5 4 3 2 1
5 4 3 2 1

D D

Blanking C

B B

Wistron Confidential document, Anyone can not


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application without get Wistron permission
<Core Design>

A Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number


Reserved Rev
Custom
LF14B SA
Date: Thursday, February 13, 2014 Sheet 22 of 102
5 4 3 2 1
5 4 3 2 1

SSID = PCH

D D

Blanking C

B B

Wistron Confidential document, Anyone can not


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application without get Wistron permission

<Core Design>

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VSS)
Size Document Number Rev
Custom
LF14B SA
Date: Thursday, February 13, 2014 Sheet 23 of 102
5 4 3 2 1
SSID = KBC 5 1D8V_S0
4 3D3V_S0 1D8V_S0
3 2 1
MODEL ID
Model_ID_BOM Ctrl

1
R2439 3D3V_AUX_KBC
DY R2455

1
10KR2F-L1-GP DY 2K2R2J-L1-GP
R2440
1KR2J-1-GP L_BKLT_EN_B PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

B 2

1
84.T3904.H11 R2441
2nd = 84.03904.E11 R2443 LF14B UMA 100.0K 10.0K 64.10025.6DL 3.0V

2
DY 10KR2F-2-GP 10KR2F-2-GP
R2406
Panel_BLEN C E R2405 LF15B UMA 100.0K 20.0K 64.20025.L0L 2.75V
L_BKLT_EN_CPU 8
PM_PWRBTN# 1 2 AC_PRESENT 1 2
DY BOM Ctrl_Model

2
Q2410 PM_PWRBTN#_CPU 18 AC_PRESENT_CPU 18
LMBT3904LT1G-GP 0R0402-PAD LF14B DIS_Hynix 100.0K 33.0K 64.33025.L0L 2.48V
R2489 R2496 MODEL_ID
SOC_RUNTIME_SCI#_KBC 0R0402-PAD
2 1 SOC_RUNTIME_SCI# 19 2 1 LF14B DIS_Micron 100.0K 47.0K 64.47025.6DL 2.24V

1
0R0402-PAD 0R0402-PAD

SCD1U10V2KX-5GP
C2406 R2442 LF15B DIS_Hynix 100.0K 64.9K 64.64925.6DL 2.0V
100KR2F-L1-GP

2
DY LF15B DIS_Micron 100.0K 76.8K 64.76825.6DL 1.87V

2
added
2013/7/8
Prevent BIOS data loss solution
D ECRST#
3D3V_AUX_KBC D

1
3D3V_AUX_KBC
R2471
4K7R2F-GP 3D3V_AUX_KBC 45W_65W#
DY

1
C2424 U2402 High: 45W / Low 65W

1
R2495 SC1U6D3V2KX-GP

2
1 2 PURE_HW_SHUTDOWN#_B B Q2401
DY 1 R2407 DISCRETE#

2
26,36,76 PURE_HW_SHUTDOWN# GND
10KR2J-3-GP MMBT3906-4-GP 3 750R2F-L-GP
VDD
PURE_HW_SHUTDOWN# 2 High: UMA / Low: Discrete

C
RESET#

2
TPS3809K33-2-GP ADT_TYPE

1
R2408 R2499
100KR2F-L1-GP 1 2 AD_ID 42
0R0402-PAD
DIS_65W_DY

2
Vinafix.com
3D3V_AUX_KBC 3D3V_AUX_S5

1D8V_S5
R2479
0R5J-5-GP
1 DY 2

Feature Reserve

1
R2493 1 2 VBAT R2425
0R0603-PAD 985PB1 0R3J-L1-GP 3D3V_AUX_KBC
1

C2426 C2420

2
SC2D2U10V3KX-L-GP

SCD1U16V2KX-L-GP

R2469

1
2D2R3-1-U-GP
2

1
C2425
C2425 R2467

SCD1U16V2KX-L-GP
985PB1 10KR2F-2-GP
2

DY

2
3D3V_S0 1D8V_S0

2
EC_AGND
3D3V_AUX_KBC_VCC 5V_CHARGER_EN

1
1

U2403 R2468
R2423 R2421
KROW[0..7] 62
Level shift 100KR2F-L1-GP
1

985PA0 985PB1 C2401 C2404 C2405


C2405 C2430 C2429 C2421 19 54 KROW0
0R3J-L1-GP 0R3J-L1-GP VCC KBSIN0/GPIOA0/N2TCK DY
SC2D2U10V3KX-L-GP

SCD1U16V2KX-L-GP

SCD1U10V2KX-5GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

46 55 KROW1
DY

2
VCC KBSIN1/GPIOA1/N2TMS KROW2
76 56
2

VCC KBSIN2/GPIOA2 KROW3


R2424 57
KBSIN3/GPIOA3 KROW4
115 58
VCC KBSIN4/GPIOA4
1 2KBC_COLAY_VCC 88 59 KROW5
VCC1D8 KBSIN5/GPIOA5 KROW6
985PA0 102
AVCC KBSIN6/GPIOA6
60
KROW7
61
EC_VDD 0R3J-L1-GP KBSIN7/GPIOA7

C C
4

1 2 EC_VTT 12
VDD1D8

VTT KBSOUT0/GPOB0/SOUT_CR/JENK#
53 KCOL0
KCOL[0..17] 62
Nuvoton KBC PSL Power Logic 3D3V_AUX_S5 3D3V_AUX_KBC

R2481 0R0402-PAD 52 KCOL1 3D3V_S5 3D3V_S5 1D8V_S5


KBSOUT1/GPIOB1/TCK
1

C2402 C2428 C2427


C2427 1 2 SCD1U10V2KX-5GP 51 KCOL2
EC_AGND DY KBSOUT2/GPIOB2/TMS
SCD1U16V2KX-L-GP

SC2D2U10V3KX-L-GP

MLVS0402M04-GP-U

97 50 KCOL3 3D3V_AUX_S5
44 AD_IA GPIO90/AD0 KBSOUT3/GPIOB3/TDI

1
ED2401 MODEL_ID 98 49 KCOL4 C2407
2

GPIO91/AD1 KBSOUT4/GPOB4/JEN0#

1
ADT_TYPE 99 48 KCOL5 R2444 R2447 1 2
GSENSE_X GPIO92/AD2 KBSOUT5/GPIOB5/TDO KCOL6 4K7R2J-L-GP R2438 2K2R2J-L1-GP SCD1U16V2KX-L-GP
DY 67 GSENSE_X 100 20131008
GPIO93/AD3 KBSOUT6/GPIOB6/RDY#
47

1
GSENSE_Y KCOL7 2K2R2J-L1-GP
108 43 DY
1

67 GSENSE_Y GPIO5/AD4 KBSOUT7/GPIOB7


R2481 and C2425 96 42 KCOL8 LPC_AD0_C1 33R2J-2-GP 1 2 R2523 LPC_AD0 R2411

2
26 VD_IN1 GPIO4/AD5 KBSOUT8/GPIOC0 LPC_AD0 16,65 330KR2J-L-GP
GSENSE_Z 95 41 KCOL9 LPC_AD1_C1 33R2J-2-GP 1 2 R2525 LPC_AD1
Need very close to EC

B 2
67 GSENSE_Z GPIO3/EXT_PURST#/AD6 KBSOUT9/GPOC1/SDP_VIS# LPC_AD1 16,65
94 40 KCOL10 LPC_AD2_C1 33R2J-2-GP 1 2 R2526 LPC_AD2 EC_SCI#_B
26 VD_IN2 GPIO7/AD7/VD_IN2 KBSOUT10/P80_CLK/GPIOC2 LPC_AD2 16,65
39 KCOL11 LPC_AD3_C1 33R2J-2-GP 1 2 R2527 LPC_AD3

S
KBSOUT11/P80_DAT/GPIOC3 LPC_AD3 16,65 R2410 R2412
38 KCOL12 R2403
R2461 1 KBC_GPIO94 KBSOUT12/GPO64/TEST# KCOL13 LPC_FRAME#_C1 33R2J-2-GP R2531 ECSCI#_KBC
18 PCIE_WAKE# DY 0R2J-2-GP
2 101 37 1 2 E CEC_SCI#_C 1 2 SOC_WAKE_SCI# 18
PSL_OUT# 1 2 EC_ENABLE#_G_1 1 2 EC_ENABLE#_G G
GPIO94/DA0 KBSOUT13/GPIO63/TRIST# KCOL14 LPC_FRAME# 16,65 0R2J-2-GP G Q2402
58 BT_DISABLE# 105 36
GPIO95/DA1 KBSOUT14/GPIO62/XORTR# KCOL15 Q2407 DMP2130L-7-GP
20131017 52 CAMERA_EN 106
GPIO96/DA2 KBSOUT15/GPIO61/XOR_OUT
35
1KR2F-L-GP 20KR2J-L3-GP
107 34 KCOL16 LMBT3904LT1G-GP D
36 ALL_SYS_PWRGD GPIO97/DA3 GPIO60/KBSOUT16
33 KCOL17 84.T3904.H11

D
GPIO57/KBSOUT17 R2404
R2404
NOTE: 84.02130.031
BATTERY / CHARGER ----> 43,44,67 BAT_SCL 70
GPIO17/SCL1/N2TCK Please be aware that the SPI interface trace length between 2nd = 84.03904.E11
1 DY 2 EC_SMI# 18
69 126 LPC_AD0_C1 0R2J-2-GP
43,44,67 BAT_SDA GPIO22/SDA1/N2TMS LAD0/GPIOF1 LPC_AD1_C1 PCH and EC should not exceed 6500mils,. The mismatch
PCH / GPU N14M / eDP to LVDS ----> 26,35,52,62,76 SML1_CLK 67
68
GPIO73/SCL2/N2TCK LAD1/GPIOF2
127
128 LPC_AD2_C1 C2431
C2431 of SPI interface signals between EC and SPI flash should
26,35,52,62,76 SML1_DATA GPIO74/SDA2/N2TMS LAD2/GPIOF3
56 SATA_ODD_DA#
SATA_ODD_DA# 119
GPIO23/SCL3/N2TCK LAD3/GPIOF4
1 LPC_AD3_C1 1
DY 2 not exceed 500mils.
Panel_BLEN 120 2 SC220P50V2KX-3GP
GPIO31/SDA3/N2TMS LCLK/GPIOF5 CLK_PCI_KBC 16
R2463 PROCHOT_EC 24 3 LPC_FRAME#_C1 R2473 Q2403
KBC_GPIO53 GPIO47/SCL4/N2TCK LFRAME#/GPIOF6 PLT_RST#_EC
35 EC_HUB_RESET# 1 2 28 7 1 2 PLT_RST# 18,30,35,58,65,76 G
3D3V_AUX_KBC 0R0402-PAD GPIO53/SDA4/N2TMS LRESET#/GPIOF7 0R0402-PAD
26
ECSCI#_KBC GPIO51/TA3/N2TCK S5_ENABLE
123 D
GPIO67/N2TMS EC_SPI_CS#_C R2485
90 2 1 33R2J-2-GP EC_SPI_CS0#_FLASH 25
F_CS0# EC_SPI_CLK_C R2497
92 2 1 33R2J-2-GP EC_SPI_CLK_FLASH 25 NOTE: S
SRN10KJ-L-GP F_SCK KBC_RTCRST#
62 TPCLK 72 109 KBC_RTCRST# 18 Locate resistors R2491 and R2497 close
E51_TxD GPIO37/PSCLK1 GPIO30/F_WP# 2N7002K-2-GP
1
2
4
3 E51_RxD
TP----> 62 TPDATA 71
10
GPIO35/PSDAT1 GPIO41/F_WP#
80
87 EC_SPI_DO_C R2491 2 1 33R2J-2-GP
BAT_IN# 43 to the U2401.
E51_RxD 58 63 KBC_NOVO_BTN# GPIO26/PSCLK2 F_SDO EC_SPI_SI_FLASH 25
11 86 EC_SPI_DI_C R2482 2 1 0R0402-PAD
RN2401 25 RTC_DET GPIO27/PSDAT2 F_SDI EC_SPI_SI 25 3D3V_AUX_KBC
25 91 PCH_SPI_WP#_R 0R2J-2-GP 2 DY 1 R2428 84.2N702.J31
GPIO50/PSCLK3/TDO GPIO81/F_WP# PCH_SPI_WP# 25
27 77 GSENSE_TST
52 BLON_OUT GPIO52/PSDAT3/RDY# GPIO0/EXTCLK GSENSE_TST 67
3D3V_S5 3D3V_S0 R2470
R2416 1 DY 2 100KR2J-1-GP 3D3V_AUX_S5
PSL_IN1_KBC# R2433 2 0R2J-2-GP LID_CLOSE#
Vinafix.com
26 FAN_TACH1 31 73 1 AC_IN# 44 1 2
PM_PWRBTN# GPIO56/TA1 PSL_IN1#/GPI70 PSL_IN2_EC# R2486
R2413 R2420 1 2 CAP_LED_R
117
63
GPIO20/TA2/IOX_DIN_DIOPSL_IN2#/GPI6/EXT_PURST#
93
74 PSL_OUT# H_RCIN# 1 2
ASM for
62 CAP_LED GPIO14/TB1 PSL_OUT#/GPIO71 47KR2J-2-GP 3D3V_S5
1 2 USB_PWR_EN
100KR2J-1-GP
18,45,46,49 PM_SLP_S3#
0R0402-PAD 64
GPIO1/TB2
R2445 1 DY 20R2J-L-GP AD_JK_F_R 42
10KR2J-3-GP ISSC function
29 SOC_RUNTIME_SCI#_KBC ECR105692
63 DC_BATFULL
27 KBC_BEEP
32
118
GPIO15/A_PWM
GPIO21/B_PWM
ECSCI#/GPIO54
EXT_RST#
KBRST#/GPIO86
85
122
ECRST#
H_RCIN# LID_CLOSE# 1
R2476
DY 2
EC RESET IC
3D3V_S0 AC_PRESENT 62 10KR2J-3-GP
R2466 GPIO13/C_PWM KBC_VSBY R2494 1 3D3V_S0
20131017 65 75 2 0R0402-PAD 3D3V_AUX_S5 20131021
63 CHARGE_LED GPIO32/D_PWM VSBY
1 DY 2 BT_DISABLE# 63 VOL_UP_BTN# VOL_UP_BTN# 22 114 KBC_VBKUP R2488 1 2 0R0402-PAD RTC_AUX_S5
10KR2J-3-GP GPIO45/E_PWM VBKUP KBC_VCORF R2535
63 PWRLED 16 44
GPIO40/F_PWM/1_WIRE VCORF INT_SERIRQ RSMRST#_KBC 1 3D3V_AUX_S5
20131017 26 FAN1_PWM 81
GPIO66/G_PWM PECI
13 2
KB_BKLT_PWM 66 125 INT_SERIRQ DY 10KR2J-3-GP
62 KB_BKLT_PWM GPO33/H_PWM/VD1_EN# SERIRQ/GPIOF0 AD_OFF U2405
6
GPIO24

2
AFTP2401 E51_TxD VD_IN1 AD_OFF 42
1 2R2427 1 VD_IN1_R 104 15 USB_PWR_EN R2475
GPIO80/VD_IN1 GPIO36/TB3 USB_PWR_EN 34,63

MLVS0402M04-GP-U
0R0402-PAD 1 2 6 1 U2405_MRDLY
VD_OUT1# 1KR2J-1-GP ED2402 R2483 R2487 ECRST# VCC MRDLY
110 21 5 2

B B
AFTE14P-GP 26 VD_OUT1# GPIO82/IOX_LDSH/VD_OUT1 GPIO44/TDI PM_SLP_S4# 18,36,49 RESET# GND
VD_OUT2# 112 20 RSMRST#_KBC PM_SLP_S3# 1 2 EC_PM_SLP_S3# 36 KBC_PWRBTN# 1 2 RESET _MR# 4 3
26 VD_OUT2# GPIO84/IOX_SCLK/VD_OUT2 GPIO43/TMS RSMRST#_KBC 18 MR# CD
17 0R0402-PAD 0R2J-2-GP
AFTP2402 1 E51_RxD GPIO42/TCK
23 TXE_UNLOCK#
LID_CLOSE# 52 DY KBC_VCORF U2405_CD

1
GPIO46/CIRRXM/TRST# G677L263A31U-GP
20131017 84
GPIO77/SPI_MISO

1
3D3V_S0 36 SYS_PWROK I2C_GSENSE_INT GSENSE_ON# C2422
83
GPIO76/SPI_MOSI GPIO87/CIRRXM/SIN_CR
113 074.00677.0073

1
AFTE14P-GP 52,67 I2C_GSENSE_INT GSENSE_ON# 67

SC1U10V2KX-L1-GP
58 WIRELESS_EN 82 14 C2409
GPIO75/SPI_SCK GPIO34/CIRRXL S5_ENABLE 36 C2403 C2408
79 1 DY

2
R2417 18 SUS_PWR_ACK GPIO2/SPI_CS# AFTP2403 AFTE14P-GP SCD22U10V2KX-L1-GP SCD1U25V2KX-GP

2
1 2 I2C_GSENSE_INT 5

SC1U10V2KX-L1-GP
100KR2J-1-GP GND
124 18
30 LAN_PWR_ON GPIO10/LPCPD# GND
62 NUM_LED 121 45
E51_TxD GPIO85/GA20 GND
58 E51_TxD 111 78
ECSMI#_KBC GPIO83/SOUT_CR GND
9
GPIO65/SMI# GND
89 NOTE:
R2419 116 C2412 must place close to VCORF pin.
PM_CLKRUN#_EC_R GND R2472
16 PM_CLKRUN#_EC 1 2 8
0R0402-PAD GPIO11/CLKRUN#
30 103 1 2
27,28 AMP_MUTE# GPIO55/CLKOUT/IOX_DIN_DIO AGND 0R0402-PAD
NON AOAC
NPCE985GB1A0DX-GP NOTE:
R2418
AOAC PWM Signal :
1 2 0R2J-2-GP EC_AGND
58 WLAN_PWRON
071.00985.0A0G 1. If unused, select altrnative GPIO function
and enable internal pull-down.
EC GPIO standard PH/PL
Reserved for AOAC 2. Please measure and make sure that the
R2450
NOTE: rise time of VCC_POR is less than 10us. 3D3V_AUX_KBC AMP_MUTE# 1 2
Pleae place R2410 close to AGND pin. DY 10KR2J-3-GP
RN2403
R2490
BAT_SCL 3 2 E51_RxD 1 2
NOTE: BAT_SDA 4 1
DY 10KR2J-3-GP
Connect GND and AGND planes via either
0R resistor or one point layout connection. SRN4K7J-8-GP
R2401
EC_GPIO47 High Active BAT_IN# 1 2
100KR2J-1-GP
Q2405
PROCHOT_EC G R2435
S5_ENABLE 1 2
D H_PROCHOT#_EC R2478 1 2 0R0402-PAD 10KR2J-3-GP
H_PROCHOT# 19,44,46
1

S R2434
R2480 ECRST# 1 2
100KR2J-1-GP 2N7002K-2-GP 3D3V_AUX_S5 3D3V_AUX_S5 3D3V_AUX_S5 10KR2J-3-GP
84.2N702.J31
2

2nd = 84.2N702.031 R2436


1

VOL_UP_BTN# 1 2
1

R2415
DY100KR2J-1-GP
1

R2477 100KR2J-1-GP
10KR2J-3-GP R2414 BAS16PT-GP
100KR2J-1-GP 2
2
2

R2484 3 KBC_NOVO_BTN# KBC_NOVO_BTN# 63


2

1 2 KBC_PWRBTN#_R
63 KBC_PWRBTN#
470R2J-2-GP PSL_IN2_EC# 1
1

R2402 D2402
1

A 2 TXE_UNLOCK#
A
1 R2492 C2423
15,19 LPE_I2S2_DATAOUT BAS16PT-GP
0R0402-PAD G2401 100KR2J-1-GP SC220P50V2KX-3GP
GAP-OPEN 2
DY
2

3D3V_S0 1D8V_S0
2

3 KBC_PWRBTN#_R
1D8V_S0
PSL_IN2_EC# 1 SCD1U10V2KX-L1-GP

1
3D3V_S0 C2435 C2434

1
D2401 20131011 985PA0 SCD1U10V2KX-L1-GP
R2409 R2537 985PA0

2
AFTP2404 1SYS_PWROK 1 2 10KR2J-L-GP 985PA0 U
U2404
2404 985PA0
DY 0R2J-2-GP
6 1

2
AFTE14P-GP INT_SERIRQ_OE 5 VCCB VCCA
2
INT_SERIRQ OE GND
4 3 INT_SERIRQ_CPU 16 <Core Design>
B A

1
G2129TL1U-GP
R2538 VCCA should not exceed VCCB Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1D8V_S5
1KR2J-L2-GP DY Taipei Hsien 221, Taiwan, R.O.C.
0R2J-2-GP
985PB1 R2426
2 1

2
Title
R2446
1 2 ECSMI#_KBC KBC_NPCE985P
Size Document Number Rev
A1
10KR2F-L1-GP LF14B SC
Date: Thursday, April 10, 2014 Sheet 24 of 102
5 4 3 2 1

SSID = Flash.ROM
SPI FLASH ROM (8M byte) for PCH

1D8V_SPI
RN2501
4 5
SPI_HOLD_0# 3 6

1
PCH_SPI_WP# 2 7
PCH_SPI_SO_FLASH 1 8 1D8V_SPI DY C2506 C2507
SC10U6D3V5KX-L-1-GP SCD1U16V2KX-L-GP

2
SRN4K7J-10-GP
D D

1D8V_SPI 1D8V_S5
985PB1 U2502

33R2J-L1-GP
1 2R2511 PCH_SPI_SI_FLASH 5 4 985PB1
24 EC_SPI_SI_FLASH PCH_SPI_CLK_FLASH SI VSS PCH_SPI_WP#
1 2 6 3 R2510 33R2J-L1-GP R2507
24 EC_SPI_CLK_FLASH SCLK WP# PCH_SPI_WP# 24
33R2J-L1-GP R2513 SPI_HOLD_0# 7 2 PCH_SPI_SO_FLASH 2 1 33R2J-L1-GP PCH_SPI_WP# 2 1
EC_SPI_SI 24

1
HOLD# SO PCH_SPI_CS0#_FLASH
985PB1 1D8V_SPI 8 1 2 R2512 1 EC_SPI_CS0#_FLASH 24
0R0402-PAD
VCC CS# R2514
985PB1
GD25LQ64CSIGR-GP
DY 1KR2J-1-GP

2
072.25L64.0001

18 PCH_SPI_CLK_FLASH PCH_SPI_CS0#_FLASH 18
PCH_SPI_SO_FLASH 2 1
18 PCH_SPI_SI_FLASH R2506 PCH_SPI_SO 18
22R2F-1-GP

1
DY DY

1
EC2502 EC2503 DY
EC2501

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP
2

2
SC4D7P50V2CN-1GP

2
72.25Q64.S01

C
SSID = RBAT C
R2505
+RTC_VCC
RTC1
1 DY 2
100R2J-2-GP
RTC_AUX_S5 Q2501 Q2503
1 RTC_PWR 1 R2517
2 1 DMN5L06K-7-GP
1KR2J-1-GP PWR
2
GND RTC_PWR RTC_DET Q2502
3 Width=20mils NP1
NP1
D S RTC_DET 24 RTC_PWR
NP2
NP2
G DY
2 84.05067.031
2

1
D RTC_DET# 18

1
C2505 CH715FPT-GP BAT-AAA-BAT-054-P06-GP-U R2509 DY

1
83.R0304.B81 5V_S0 R2508 10MR2J-L-GP
62.70001.061 S
SC1U6D3V3KX-2GP

2nd = 83.00040.E81 6D2MR2J-GP C2503


DY SCD01U50V2KX-L-GP 2N7002K-2-GP

2
3D3V_AUX_S5 84.2N702.J31

2
2nd = 84.2N702.W31
Copy from Lily LS41P 2013/7/8
1 +RTC_VCC Need to Check if needed !!
AFTE14P-GP AFTP2501
1 If needed, need to find a GPIO
AFTE14P-GP AFTP2502
Pin on CPU side and connect it.

SPI FLASH ROM (128k byte) for EC


3D3V_AUX_KBC

2013/04/17 follow CRB


SPI ROM Equal length need to less than 500mil
1

1
B B
985PA0R2502 R2503 R2504
3K3R2F-2-GP 10KR2J-L-GP 985PA0 3K3R2F-2-GP
985PA0
2

2013/04/09 3D3V_AUX_KBC
985PA0 U2501 985PA0 2013/04/25
1KR2J-1-GP
24 EC_SPI_CS0#_FLASH
R2536 1 2 EC_SPI_CS0#_R 1 8
EC_SPI_SO_FLASH CE# VCC EC_SPI0_HOLD_0
24 EC_SPI_SI 1 R2501 2 2 7
33R2J-L1-GP EC_SPI0_WP_0 SO HOLD#
3 6 EC_SPI_CLK_FLASH 24
WP# SCK
4 5
985PA0 GND SIO EC_SPI_SI_FLASH 24

3D3V_AUX_S5 PM25LD010C-SCE-GP
2013/04/25
72.25010.N01
1

C2502 C2501
SC10U6D3V3MX-L-GP

SCD1U10V2KX-L1-GP
2

DY 985PA0

A A

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Flash(KBC+PCH)/RTC
Size Document Number Rev
A2
LF14B SA
Date: Tuesday, April 15, 2014 Sheet 25 of 102
5 4 3 2 1
5 4 3 2 1

SSID = Thermal 3D3V_S0

Thermal sensor NCT 7718W *Layout* 15 mil

2
1
5V_FAN_S0
RN2601
NCT7718
SRN2K2J-5-GP

K
Q2602 C2604

3
4

1
SC4D7U10V3KX-GP
2N7002KDW-GP D2601
NCT_CLK 1 6 RB551V30-GP C2605
SML1_CLK 24,35,52,62,76 SCD1U16V2KX-L-GP
NCT7718 83.R5003.H8H

2
2 5

A
3D3V_S0 2nd = 83.5R003.08F
D 3 4 D

NCT_DATA
84.2N702.A3F
2nd = 84.DM601.03F

1
NCT7718 R2601
SML1_DATA 24,35,52,62,76
10R2F-L-GP

R2603 FANCN1

2
Layout notice :
1 DY 2
0R2J-L-GP
6

Both DXN and DXP routing 10 mil R2604 5V_FAN_S0 4


trace width and 10 mil spacing. 1 DY 2 3

1
0R2J-L-GP FAN_TACH1_C 2
C2601 1 FAN1_PWM 5V_S0 5V_FAN_S0
SCD1U16V2KX-L-GP 1 AFTE14P-GP AFTP2601 1 FAN_TACH1_C
24 FAN1_PWM

2
NCT7718 AFTE14P-GP AFTP2602 1 5V_FAN_S0
Q2601 NCT7718 5 AFTE14P-GP AFTP2603 1
3D3V_S0 R2630
LMBT3904LT1G-GP AFTE14P-GP AFTP2604
P2800_DXP ACES-CON4-17-GP-U1 1 2
NCT7718 U2601 20.F1621.004
1

NCT7718 NCT7718
C

1
R2602 C2603 THERM_VDD NCT_CLK 0R0603-PAD
1 8
VDD SCL
SC470P50V2KX-3GP

SC2K2P50V2KX-L-GP

NTC-100K-8-GP B C2602 2 7 NCT_DATA R2605


D+ SDA ALERT# R5 18K7R2F-GP
DY 3 6
2

THERM_SYS_SHDN# D- ALERT#
4 5
2

P2800_DXN T_CRIT# GND 3D3V_S0 5V_FAN_S0

2
84.T3904.H11 NCT7718W-GP ALERT#
2nd = 84.03904.E11

1
2.System Sensor, Put on palm rest NTC7718 R2614 R2613
10KR2J-L-GP DY 10KR2J-L-GP
74.07718.0B9

2
D2602
A K FAN_TACH1_C
24 FAN_TACH1
RB551V30-GP
3D3V_AUX_S5 3D3V_AUX_KBC

C 83.R5003.H8H C
3D3V_S0 3D3V_S0
2nd = 83.5R003.08F
1

R2611 R2622

1
16KR2F-GP 16KR2F-GP
R2624 R2625
3D3V_S0
TV TV
10KR2J-L-GP 10KR2J-L-GP
2

VD_IN1 24

2
DY TV
1

1
R2610 TV R2607
R7
1

NTC-100K-11-GP-U C2616 2KR2F-3-GP D2603


C2615 SC100P50V2JN-3GP BAW56-5-GP
69.60013.201 SCD1U16V2KX-L-GP
TV
NCT7718 DY 2
2

2
VD_OUT1# 24
TV Q2603 R2626 83.00056.Q11
R2612 THERM_SYS_SHDN# THERM_SYS_SHDN#_R
S 1 2 3 TV 2nd = 83.00056.G11
2

VD_IN1_C 1 2 0R2J-L-GP
0R0402-PAD D 1
24,36,76 PURE_HW_SHUTDOWN# VD_OUT2# 24
TV R2609
G IMVP_PWRGD_G 1 2 IMVP_PWRGD 37,46
1

0R2J-L-GP

1
3D3V_AUX_S5 3D3V_AUX_KBC R2606 C2607 C2608 2N7002K-2-GP

SC4D7U6D3V3KX-GP

SC1U10V2KX-L1-GP
10KR2J-L-GP 84.2N702.J31 3D3V_S0
DY 2ND = 84.2N702.031

2
3rd = 84.2N702.W31
2

R2628
1

R2621 R2623 1 2
16KR2F-GP 16KR2F-GP
10KR2J-L-GP
2

DY
VD_IN2 24
DY TV
1

R2619
TV
TV
1

NTC-100K-11-GP-U C2618
C2617 SC100P50V2JN-3GP
69.60013.201 SCD1U16V2KX-L-GP
2

TV R2620
2

B VD_IN2_C 1 2 B
0R2J-L-GP

TV

T8=85 degree

PTC Function M40/M50 (All Series Reserved) PTC Placement List


PTC Position
RT2606 5V_PWR_DC/DC_High_side_FET (PU4507)
5V *100K/(100K+40K) = 3.57V
RT2605 3V_PWR_DC/DC_High_side_FET (PU4504)
3D3V_AUX_KBC RT2609 BT+ High side FET (PU4403)
5V_S5
5V_S5 3D3V_S5
PTC RT2607 1D05V_PWR_DC/DC_High_side_FET (PU4802)
1

PTC PTC RT2603 1D35V_S3_DC/DC_High_side_FET (PU4902)


1
SCD1U10V2KX-4GP

5V_S5 R2627
1 2 C2610 10KR2J-3-GP Q2606 RT2610 1D5V_PWR_VGA_DC/DC_High_side_FET(PU5110)
PTC R2616 40K2R2F-GP G
2

2
1

U2603 RT2602 VCC_CORE_Driver-1 (PU4702)


5

D PURE_HW_SHUTDOWN#
1

RT2607 RT2605 RT2603 RT2601 1 2 RT_COMP+ 1 PTC RT2601 VCC_CORE_Driver-2 (PU4701)


+
PTC-470-GP PTC-470-GP PTC-470-GP PTC-470-GP R2617 R2618 100KR2F-L1-GP 4 RT_COMP_OUT 1 2 RT_COMP_OUT_R S
6K81R2F-1-GP RT2608 VGA_CORE_DC/DC_MOSFET (PU8202)
PTC PTC PTC PTC PTC 3
SCD1U10V2KX-4GP

-
2

RT_3 2

PTC PTC R2615 2N7002K-2-GP


1

0R2J-2-GP 84.2N702.J31
2

2
RT_4

RT_2

RT_1

RT_0

C2611

LMV331IDCKRG4-GP
PTC
2

A A
74.00331.A2F
1

RT_COMP-
RT2606 RT2602
PTC-470-GP PTC-470-GP
PTC PTC
2

<Core Design>
Sys. Temp < Ref. Temp Sys. Temp > Ref. Temp

RT_COMP_OUT
Wistron Corporation
High Low 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
PURE_HW_SHUTDOWN# High Low Title

Thermal 7718/Fan Controllor P2793


Size Document Number Rev
A2
LF14B SC
Date: Thursday, April 10, 2014 Sheet 26 of 102
5 4 3 2 1
5 4 3 2 1

R2703
R2716
1 2 R2712 1 2 75R2J-1-GP HP_OUT_L_AUD MIC2V R2715 1 2 MIC2_VREFO 1 2 SLEEVE
3D3V_S0 AUD_3VD 29 HP_OUT_L
0R0603-PAD 0R0402-PAD 2K2R2F-GP
R2713 1 2 75R2J-1-GP HP_OUT_R_AUD
29 HP_OUT_R
G2701 C2712 R2717
R2702 RING2
1 2 1 2 ALC_AGND 1 2
1 2 SC1U10V2KX-L1-GP 2K2R2F-GP
0R0603-PAD GAP-CLOSE C2709 C2713
1 2 CPVEE 1 2 ALC_AGND

1
SC1U10V2KX-1GP SC2D2U10V3KX-L-GP
C2702
SC10U6D3V3MX-L-GP

2
AUD_5VA
C2710
ALC_AGND AUD_CBP 1 2 AUD_CBN
SC1U10V2KX-1GP

1
C2714 C2715

SCD1U16V2KX-L-GP

SC1U10V2KX-1GP
Close to Pin1 DY
AUD_3VD

LDO1_CAP
D D

2
VREF
5V_S0 AUD_5VA
5V_S0 AUD_5VD
R2704

1
C2711
R2701
SCD1U16V2KX-L-GP ALC_AGND

36

35

34

33

32

31

30

29

28

27

26

25
1 2
0R0603-PAD 1 2 U2701 Close to Pin26

2
0R0603-PAD

CPVEE

HPOUT_L/PORT_I_L

LINE1_VREFO_L

MIC2_VREFO

LDO1_CAP

AVDD1

AVSS1
CPVDD

CBN

HPOUT_R/PORT_I_R

LINE1_VREFO_R

VREF
1

C2704
SC10U6D3V3MX-L-GP

1
C2701
2

SC1U10V2KX-1GP
2 37 24
CBP LINE2_L/PORT_E_L

ALC_AGND 38 23
C2716 AVSS2 LINE2_R/PORT_E_R
1 2 LDO2_CAP 39 22
ALC_AGND LDO2_CAP LINE1_L/PORT_C_L
ALC_AGND Close to Pin46
Close to Pin26 SC4D7U6D3V3KX-L-GP AVDD2 40 21
AVDD2 LINE1_R/PORT_C_R
AUD_5VD 41 20
PVDD1 CPVREF
R2705 AUD_5VD 42 19 MIC_CAP_C C2719 1 2
29 AUD_SPK_L+ SPK_OUT_L+ MIC_CAP ALC_AGND
SC4D7U6D3V3KX-L-GP
AUD_3VD 1 DY 2
0R2J-2-GP AUD_5VD 43 18
29 AUD_SPK_L- SPK_OUT_L- MIC2_R/PORT_F_R/SLEEVE SLEEVE 29
R2706
1 2 AVDD2 44 17
1D5V_S0 1 29 AUD_SPK_R- RING2 29

1
0R0402-PAD C2706 C2707 C2708 SPK_OUT_R- MIC2_L/PORT_F_L/RING2
SC4D7U6D3V3KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
45 16 SUB_WOOFER_OUT
29 AUD_SPK_R+ SPK_OUT_R+ MONO_OUT SUB_WOOFER_OUT 28
R2720
2

2
1

AUD_5VD 46 15 IDREF 1 2
PVDD2 JDREF ALC_AGND

GPIO0/DMIC_DATA
C2705 20KR2F-L-GP

GPIO1/DMIC_CLK
SCD1U16V2KX-L-GP AUD_SD# 47 14
2

PD# SENSE_B R2721

SDATA_OUT
TPAD14-OP-GP TP2701 1 SPDIFO 48 13 ALC233_SENSE_A 1 2

LDO3_CAP
SPDIF_OUT/GPIO2 SENSE_A HP_DET# 29

SDATA_IN
39K2R2F-L-GP

DVDD_IO

PCBEEP
RESET#
ALC_AGND AUD_3VD 49
GND

DVDD

SYNC
DVSS

BCLK
Close to Pin40
C ALC233-CG-GP C

10

11

12
1

1
C2720 C2721 71.00233.003

SCD1U16V2KX-L-GP

SC1U10V2KX-L1-GP
C2725 R2719

U2701_DVSS
2

2
AUDIO_PC_BEEP 1 2 AUDIO_BEEP 1 10KR2J-L-GP
2 KBC_BEEP 24

LDO3_CAP

DVDD_IO
SCD1U16V2KX-L-GP R2727

1
52 DMIC_DATA 1 10KR2J-L-GP
2 HDA_SPKR 16
R2722
R2726 1 2 DMIC_CLK_C 4K7R2J-2-GP
52 DMIC_CLK
0R0402-PAD

2
R2723
HDA_CODEC_RST# 19,28

1
C2703 C2726 0R2J-2-GP

SC33P50V2JN-3GP

SC22P50V2JN-4GP
DY DY HDA_CODEC_SYNC 19
DY

2
R2707 AUD_3VD
0R3J-L1-GP
1 DY 2
1D5V_S0
1R2714 2 0R0603-PAD
R2708
1 2 19 HDA_CODEC_SDOUT
22R2J-2-GP 1D8V_S0
19 HDA_CODEC_BITCLK
R2724 1 2 HDA_CODEC_BITCLK_C 1 R2718 DY
2
3D3V_S5 0R0402-PAD
0R3J-L1-GP

1
AUD_3VD C2723 C2724S

SC4D7U6D3V3KX-L-GP
C2722
G

CD1U16V2KX-L-GP
Q2701 SC22P50V2JN-4GP

2
2N7002A-7-GP
DY

2
1

S D R2711
1KR2J-1-GP

D2701
DY
2

R2709 BAW56-5-GP
AUD_PD#_2 2 R2725
24,28 AMP_MUTE# 1 DY 2
0R2J-2-GP 1 2 AC97_DATIN
19 HDA_SDIN0
B AUD_SD# 33R2J-2-GP B
R2710
DY 3 AUD_SD# 28
AUD_PD#_1 1
19,28 HDA_CODEC_RST# 1 DY 2
0R2J-2-GP
83.00056.Q11
2nd = 83.00056.G11

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio Codec_ALC233
Size Document Number Rev
A2
LF14B SC
Date: Thursday, April 10, 2014 Sheet 27 of 102
5 4 3 2 1
5 4 3 2 1

WOOFER AMP. U40/U50


5V_S0
DY
1 R2802 2
3D3V_S0
0R3J-L-GP U2804

1 R2801 2 AMP_PW R B1 VDD VO+ C3 AMP_OUT_+


AMP_OUT_+ 29
D B2 A3 AMP_OUT_- D
PVDD VO- AMP_OUT_- 29
0R3J-L-GP C2803 DY R2811
150KR2F-L-GP
DY 1 2 AUD_AMP_IN+_R 1 2 AUD_AMP_IN+ A1
SUB_W OOFER_OUT IN+
27 SUB_W OOFER_OUT 1 2 AUD_AMP_IN-_R 1 2 AUD_AMP_IN- C1 IN- GND A2
W OOFAMP_EN C2 B3
SC1U6D3V2KX-L-1-GP R2812 150KR2F-L-GP EN PGND
SC1U6D3V2KX-L-1-GP DY
C2804 TPA2011D1YFFR-GP-U

1
C2801 C2802
DY
SC22U6D3V5MX-L3-GP
2
SCD1U10V2KX-5GP 74.20111.01Z

2
DY
DY

DY DY

27 AUD_SD# 1 2 W OOFAMP_EN Vinafix.com


R2822
0R2J-2-GP
C C
DY

Reference LZ57 AMP Design (Reserved)


Also Reserved Direct control from AMP_MUTE# SB 0923'10
in CODEC page 5V_S0 5V_S5

DY DY DY
1

R2817 R2819 R2820


1 2 10KR2J-3-GP
10KR2J-3-GP
24,27 AMP_MUTE# Q2801
B 0R2J-2-GP AUD_AMP_SD#G B
2

19,27 HDA_CODEC_RST# 1 2
R2818 DY D W OOFAMP_EN
0R2J-2-GP
1

S DY R2821
2N7002K-2-GP DY 10KR2J-3-GP
84.2N702.J31
2

2ND = 84.2N702.031

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio AMP
Size Document Number Rev
A3
LF14B SA
Date: Thursday, April 10, 2014 Sheet 28 of 102
5 4 3 2 1
5 4 3 2 1

HP_DET

Wait to update P/N Q2901

G
3D3V_S0
2N7002BK-GP

2
HP_DET# D S
COMBO JACK 2013/9/22 Add HP_DET# RC R2941
10KR2F-2-GP
27 HP_DET#

84.07002.I31

1
CMBJK1 2nd = 84.2N702.A31 ALC_AGND
D SLEEVE 3 D
27 SLEEVE HP_OUT_L
27 HP_OUT_L 1
1
HP_DET_REF 5 AFTE14P-GP AFTP2907
HP_DET 6 1 ALC_AGND
HP_OUT_R 2 AFTE14P-GP AFTP2918
27 HP_OUT_R RING2
27 RING2 4
MS
Audio(IP/NK comb) EU2901
AUDIO-JK450-GP-U AFTE14P-GP AFTP2915 AFTP2917 AFTE14P-GP
1 SLEEVE 1 I/O1 I/O4 6 HP_DET 1
1

1 5V_S0

R2931
DY
022.10002.0281
R2930

2 GND VDD 5

1
1K8R2D-GP

1K8R2D-GP

1
C2940 C2941 C2942 C2943 C2945 R2940 1 RING2 3 4 HP_DET_REF
1
I/O2 I/O3
100KR2J-1-GP
2

SC1U10V2KX-1GP
SC100P50V2JN-L-GP

SC100P50V2JN-L-GP

SC100P50V2JN-L-GP

SC100P50V2JN-L-GP
AFTE14P-GP AFTP2916 AFTP2920 AFTE14P-GP

2
DY DY AZC099-04S-1-GP

2
AFTE14P-GP AFTP2913 EU2902

1 HP_OUT_R 1 6 5V_S0
ALC_AGND I/O1 I/O4 R2907
DY 1 2 0R0402-PAD
2 GND VDD 5

1 HP_OUT_L 3 4 R2908 1 2 0R0402-PAD

C
RIGHT SPEAKER AFTE14P-GP AFTP2914
I/O2 I/O3

AZC099-04S-1-GP R2909 2 0R2J-2-GP C


SPKCN1
1 DY
RIGHT SIDE 5
EU2903 R2910 2 0R2J-2-GP
R2903 1 2 AUD_SPK_R+_C 1 AFTE14P-GP AFTP2905
1 DY
27 AUD_SPK_R+ 5V_S0
MPZ1608S331A-GP 1 AUD_SPK_L+_C 1 6
R2904 1 AUD_SPK_R-_C I/O1 I/O4
27 AUD_SPK_R-
R2905 1
2
MPZ1608S331A-GP AUD_SPK_L+_C
2 DY
27 AUD_SPK_L+ 2 3 2 GND VDD 5
R2906 1 2 MPZ1608S331A-GP AUD_SPK_L-_C 4
27 AUD_SPK_L-
MPZ1608S331A-GP 1 AUD_SPK_L-_C 3 4
I/O2 I/O3
LEFT SIDE 6
AFTE14P-GP AFTP2906 ALC_AGND
AZC099-04S-1-GP
ACES-CON4-17-GP-U1

LEFT SPEAKER
1

C2904 C2905 C2902 C2903


SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

20.F1621.004 Only needed if speaker


2

connector is physically far from


Place these EMI components audio codec. When in doubt, it's
close to speaker connector. always a good idea to have
population option.

1
AFTE14P-GP AFTP2919

B EU2904 B
AFTE14P-GP AFTP2903
1 AUD_SPK_R+_C 1 6 5V_S0
I/O1 I/O4
DY
2 GND VDD 5

1 AUD_SPK_R-_C 3 4
I/O2 I/O3
AFTE14P-GP AFTP2904
AZC099-04S-1-GP

SUB WOOFER (U40/U50) 1


AFTE14P-GP AFTP2912
DY R2911
SUBW 1
3
AMP_OUT_+ 1 2 AMP_OUT_+_C 1 EU2905
28 AMP_OUT_+ R2912 MPZ1608S331A-GP AFTE14P-GP AFTP2910
AMP_OUT_-
DY AMP_OUT_-_C 5V_S0
28 AMP_OUT_- 1 2 2 1 AMP_OUT_-_C 1 I/O1 I/O4 6
MPZ1608S331A-GP 4
2 GND DYVDD 5
ACES-CON2-17-GP
1 AMP_OUT_+_C 3 4
I/O2 I/O3
1

A C2906 C2907 <Core Design> A


SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

DY DY AFTE14P-GP AFTP2911
20.F1621.002 AZC099-04S-1-GP
2

DY Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MIC/SPEAKER/AUDIO JACK
Size Document Number Rev
Custom
LF14B SC
Date: Thursday, April 10, 2014 Sheet 29 of 102
5 4 3 2 1
5 4 3 2 1

3D3V_LAN_S5
R3001
1 2
DY0R3J-0-U-GP
3D3V_S5 Q3001
AO3419L-GP L3004
S D REGOUT 1 2 VDD10
1 84.03419.031 IND-4D7UH-192-GP

1
C3004 C3003 2nd = 84.03334.031

1
SCD1U16V2KX-L-GP

SCD1U16V2ZY-2GP
R3009 C3019
DY

G
68.4R750.20C

1
SC1U10V2KX-L1-GP
100KR2J-1-GP C3012 C3037 C3038 C3039 C3040 C3041 C3036 C3042
2

SC4D7U6D3V3KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SC1U10V2KX-L1-GP

SCD1U16V2KX-L-GP
C3001

SC1U10V2KX-L1-GP
2
R3003

2
LAN_PWR_ON_T
1 2LAN_PWR_ON_T2

2
1KR2J-1-GP

D D

1
C3002

SC1U6D3V2KX-L-1-GP
Q3002 DY
2N7002K-1-GP

2
24 LAN_PWR_ON G For RTL8111G(S)/ RTL8111GUS/ RTL8106EUS
84.2N702.031 *Place C3038 to C3041 close to each VDD10 pin-- 3, 8, 22, 30
S

2nd = 84.2N702.W31
For RTL8111G(S)/ RTL8111GUS/ RTL8106EUS
*Place C20 and C21 close to each VDD10 pin-- 22 (Reserved)

U3001

VDD10 3 12 PCIE_CLK_LAN_REQ#_4
AVDD10 CLKREQ# PCIE_LAN_WAKE#_R 1 R3030 2 PMC_WAKE_PCIE_3#_LAN
8 21
AVDD10 LANWAKE#
30 20 ISOLATE# 0R0402-PAD 1 R3008 2 3D3V_S0
AVDD10 ISOLATE# PLT_RST# 1KR2J-1-GP
19 PLT_RST# 18,24,35,58,65,76
PERST# R3011
3D3V_LAN_S5 32 1 2
AVDD33 LAN_XTAL1
11 28 15KR2J-1-GP
AVDD33 CKXTAL1 LAN_XTAL2
29
CKXTAL2
1

C3043 C3044 C3045 C3046 3D3V_LAN_S5 23


VDDREG
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP

16 PCIE_CLK_LAN# 18
REFCLK_N
22 15 PCIE_CLK_LAN 18
2

DVDD10 REFCLK_P
1

C3047 C3048
R3013
SC4D7U6D3V3KX-L-GP

SCD1U16V2KX-L-GP

31 RSET 1 2
RSET 2K49R2F-GP
31 MDI0+ 1
2

MDIP0 REGOUT
DY DY 31 MDI0- 2
MDIN0 REGOUT
24
31 MDI1+ 4
MDIP1
31 MDI1- 5
MDIN1
31 MDI2+ 6 14 PCIE_TXN3 19
MDIP2 HSIN
31 MDI2- 7 13
MDIN2 HSIP PCIE_TXP3 19
31 MDI3+ 9
MDIP3 PCIE_RXN4_L C3017 1
C 31 MDI3- 10 18 2 SCD1U16V2KX-L-GP PCIE_RXN3 19 C
MDIN3 HSON PCIE_RXP4_L C3016 1
17 2 SCD1U16V2KX-L-GP PCIE_RXP3 19
LED0 HSOP
TPAD14-OP-GP TP3001 1 27
LED0
1 LED1 26
TPAD14-OP-GP TP3002 LED1/GPO
1 LED2 25 33
TPAD14-OP-GP TP3003 LED2 GND

RTL8111GUS-CG-GP-U1

71.08111.W03

10/100 = 71.08106.003
GIGA = 71.08111.W03
Level shifter
3D3V_LAN_S5 3D3V_LAN_S5

1
R3014 DY

1
10KR2J-3-GP DY R3015
2K2R2J-L1-GP

2
25MHz XTAL

B 2
PCIE_CLK_LAN_REQ#_B

DY R3016
PCIE_CLK_LAN_REQ#_4 E CPCIE_CLK_LAN_REQ#_C1 2 0R0402-PAD PCIE_CLK_LAN_REQ# 19
LAN_XTAL1 Q3004
LMBT3904LT1G-GP
84.T3904.H11
1

2nd = 84.03904.E11
B R3017 B

DY R3018 1 2 0R0402-PAD
1MR2J-L3-GP
2

X3001
2 1 LAN_XTAL2

XTAL-25MHZ-102-GP
82.30020.851
2ND = 82.30020.791
1

C3009 C3008 3D3V_LAN_S5 3D3V_LAN_S5


SC12P50V2JN-3GP SC12P50V2JN-3GP
2

1
R3002
DY
10KR2J-3-GP DY R3010
2K2R2J-L1-GP
2

B 2 PMC_WAKE_PCIE_3#_B
DY R3012
PMC_WAKE_PCIE_3#_LAN E CPMC_WAKE_PCIE_3#_C 1 2 0R0402-PAD PMC_WAKE_PCIE_3# 18
Q3003
LMBT3904LT1G-GP
84.T3904.H11
2nd = 84.03904.E11
R3019
1 2 0R0402-PAD

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN(QCA8172)
Size Document Number Rev
Custom
LF14B SC
Date: Thursday, April 10, 2014 Sheet 30 of 102
5 4 3 2 1
5 4 3 2 1

10/100M/1000M Lan Transformer


1 RJ45_1 10/100/1000 LAN surge circuit
XF3103 AFTE14P-GP AFTP3102 1 RJ45_2
AFTE14P-GP AFTP3103 1 RJ45_3
2 23 RJ45_1 AFTE14P-GP AFTP3104 1 RJ45_4
30 MDI0+
AFTE14P-GP AFTP3105 1 RJ45_5
XRF_TDC_1 1 24 MCT1 AFTE14P-GP AFTP3106 1 RJ45_6
AFTE14P-GP AFTP3107 1 RJ45_7
1

C3104 3 22 RJ45_2 AFTE14P-GP AFTP3108 1 RJ45_8


30 MDI0-
LAN Connector
SCD1U16V2KX-L-GP

1CT:1CT AFTE14P-GP AFTP3109


5 20 RJ45_3 1 LAN_AGND
2

30 MDI1+
AFTE14P-GP AFTP3110
4 21 MCT2

D 6 19 RJ45_6 RJ45 D
30 MDI1-
1CT:1CT 9
8 17 RJ45_4 RJ45_1 1
30 MDI2+
R3103 1 2 0R0402-PAD LAN_SURGE
7 18 MCT3 RJ45_2 2
RJ45_3 3
9 16 RJ45_5 RJ45_4 4 EC3102 SC470P50V2KX-3GP
30 MDI2- RJ45_5
1CT:1CT 5 1 2
1

C3102 11 14 RJ45_7 RJ45_6 6


30 MDI3+ RJ45_7
SCD1U10V2KX-4GP 7
MCT4 RJ45_8 R3108 2 0R0402-PAD
DY 10 15 8 1 LAN_SURGE
2

10
12 13 RJ45_8 EC3104 SCD1U16V2KX-3GP
30 MDI3-
1CT:1CT RJ45-8P-118-GP-U 1 2

XFORM-24P-101-GP LAN_AGND
22.10019.141 EC3105 SC10U25V5KX-GP
1 2 For test stuff
068.IH219.3001 EC3106 SC10U25V5KX-GP
1 2
2nd = 68.89246.301
R3101
1 2 MCT2 MCT1
MCT1
GAP-OPEN-PWR

1
R3111 R3112
0R0603-PAD 0R0603-PAD R3119
0R0603-PAD

2
MCT3 MCT4
MCT2

ED3105 ED3110

C
30 MDI0+ 6 1 MDI1+ 303D3V_S0 30 MDI2+ 6 1 MDI3+ 30
C
3D3V_S0
R3120
R3117 1 2 3D3V_MDI1 5 2 R3118 1 2 3D3V_MDI2 5 2
200R3-GP 200R3-GP 1 2
DY
0R3J-0-U-GP
30 MDI0- 4 3 MDI1- 30 30 MDI2- 4 3 MDI3- 30
LAN_AGND
SRV05-4ATCT-GP SRV05-4ATCT-GP
69.A0020.011
ED3101 DY
MCT1 R3105 MCT_R
3 1 2
ED3106 ED3107 2 75R5F-1-GP
RJ45_6 RJ45_2 RJ45_4 RJ45_7 MCT2 R3106
4 3 4 3 1 1 2
DY DY 75R5F-1-GP
3D3V_S0 3D3V_S0 BS4202N-C-GP

R3115 1 2 3D3V_RJ1 5 2 R3116 1 2 3D3V_RJ2 5 2


200R3-GP 200R3-GP DY
MCT3 R3113
1 2
RJ45_3 6 1 RJ45_1 RJ45_5 6 1 RJ45_8 75R5F-1-GP
MCT4 R3114
1 2
75R5F-1-GP
SRV05-4ATCT-GP SRV05-4ATCT-GP
DY DY

1
R3121
0R0603-PAD
ED3108 ED3109

2
RJ45_6 6 1 RJ45_2 RJ45_4 6 1 RJ45_7

3D3V_RJ1 5 2 3D3V_RJ2 5 2

2
069.A0002.0001 ED3102 C3103
THW4006KV-SMB-GP SC100P3KV8JN-2-GP

1
RJ45_3 RJ45_1 RJ45_5 RJ45_8
4 3 4 3 2nd = 069.A0005.0001

2
B SRV05-4ATCT-GP SRV05-4ATCT-GP B

DY DY

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(LAN+VGA) CONNECTOR
Size Document Number Rev
A2
LF14B SC
Date: Thursday, April 10, 2014 Sheet 31 of 102
5 4 3 2 1
5 4 3 2 1

D D

Blanking C

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GL834L(CARD READER)
Size Document Number Rev
Custom
LF14B SC
Date: Tuesday, October 22, 2013 Sheet 32 of 102
5 4 3 2 1
5 4 3 2 1

D D

Blanking C

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CARD Reader
Size Document Number Rev
A4
LF14B SC
Date: Tuesday, October 22, 2013 Sheet 33 of 102
5 4 3 2 1
5 4 3 2 1

2013/8/30 update
Non USB Charger (U40/U50) Reserved for option 5V_USB1_S3

USB3.0 Port1
Support 2A

1
SC10U10V5KX-2GP
C3402 C3403

SC1U10V2KX-L1-GP
C3453
SC22U6D3V5MX-L3-GP

2
5V_S5 NUC
U3401 NUC
at least 80 mil 1
GND OUT#8
8
2 7
D
DY 3
IN#2 OUT#7
6 D
1

IN#3 OUT#6
C 3401
C3401 R3401 1 2 USB_PWR_EN_D1 4 5
24,63 USB_PWR_EN EN/EN# FLT#
SCD1U16V2KX-L-GP

C3452 NUC 0R0402-PAD


SC47U6D3V5MX-1-GP

at least 80 mil
2

TPS2001CDGKR-GP
74.02001.A79 USB30_OC#0_D 1 R3402 2 USB_OC#0 16,39
0R0402-PAD
NUC

16,39 USB_PN0 USB_PN0 2 R3403 1 USB_PN0_CHG_R 2 R3409 1 USB_PN0_CHG


0R0402-PAD 0R0402-PAD

USB_PP0 2 R3404 1 USB_PP0_CHG_R 2 R3407 1 USB_PP0_CHG


16,39 USB_PP0
0R0402-PAD 0R0402-PAD

Vinafix.com
AFTP3405 MB USB3.0 SKT AFTP3406 1 5V_USB1_S3
AFTE14P-GP
5V_USB1_S3
USB1 AFTP3408 1
1

1 5 USB3_1_RX1_N_R
VBUS STDA_SSRX- USB3_1_RX1_P_R
6
STDA_SSRX+ R3420
1

C3404 USB_PN0_R 2 1 2
D-
SCD1U16V2KX-L-GP

SE220U6D3VM-30-GP TC3401 USB_PP0_R 3 8 USB3_1_TX1_N_R 0R0603-PAD


D+ STDA_SSTX- USB3_1_TX1_P_R
9
2

STDA_SSTX+ R3421
10 1 2
CHASSIS#10 0R0603-PAD
C 11 4 C
CHASSIS#11 GND
12
CHASSIS#12
13 7
CHASSIS#13 GND_DRAIN

1 SKT-USB13-149-GP
TC3401 place near AFTE14P-GP
AFTE14P-GP
AFTP3401
AFTP3402
1 22.10341.P81 USB3_AGND
the USB1 connector USB3_AGND
2nd = 22.10341.P71

ESD circuit
C3408
16 USB3_1_TX1_N 1 2USB3_1_TX1_N_1 R3405 1 2 USB3_1_TX1_N_R
0R0402-PAD
SCD1U16V2KX-L-GP ED3401
USB3_1_TX1_P_R 1 8 USB3_1_TX1_P_R
USB3_1_TX1_N_R L1#1L1#8
2 7 USB3_1_TX1_N_R
L2#2L2#7
G1 G2
USB3_1_RX1_P_R GNDGND
3 6 USB3_1_RX1_P_R
USB3_1_RX1_N_R L3#3L3#6
DY 4 5 USB3_1_RX1_N_R
TR3401 L4#4L4#5
2 1
RCLAMP0524PATCT-1-GP
3 4
75.00524.073
FILTER-4P-61-GP
69.10171.001

C3407
1 2 USB3_1_TX1_P_1 R3406 1 2 USB3_1_TX1_P_R
16 USB3_1_TX1_P
0R0402-PAD EU3401
B B
SCD1U16V2KX-L-GP USB_PP0_R USB_PN0_R 5V_USB1_S3
1 6
I/O1 I/O4
2 5
GND VDD
R3408 1 2 USB3_1_RX1_N_R 3 4
16 USB3_1_RX1_N I/O2 I/O3
0R0402-PAD

AZC099-04S-1-GP

TR3402
DY
2 1

3 4

FILTER-4P-61-GP
69.10171.001

R3410 1 2 USB3_1_RX1_P_R
16 USB3_1_RX1_P
0R0402-PAD

USB_PN0_CHG R3411 1 2 USB_PN0_R


39 USB_PN0_CHG
0R0402-PAD
2

TR3403
A A
FILTER-4P-156-GP

DY
<Core Design>
1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
USB_PP0_CHG R3412 1 2 USB_PP0_R
39 USB_PP0_CHG
0R0402-PAD Title

USB 2.0 / 3.0 Port


Size Document Number Rev
A2
LF14B SC
Date: Monday, April 14, 2014 Sheet 34 of 102
5 4 3 2 1
5 4 3 2 1

USB Table
R3518 Pair Device
13/07/14 3D3V_S5 1 2 HUB_PSELF 1 CCD
Del R3507 10KR2J-L-GP 2 WLAN(Bluetooth)
3 USB 2.0
R3522
1 R3515 2 4
EC_HUB_RESET# 24 3D3V_HUB
Cardreader
DY

23D3V_HUB
1 2
D 0R2J-L-GP D
5V_S5
10KR2J-L-GP

1 R3510 2 DY
R3523 PLT_RST# 18,24,30,58,65,76
1
R3503 10KR2J-L-GP 0R2J-L-GP
U3501
10KR2F-L1-GP DY
1
3D3V_HUB 5 2 USB_PP3_R 1 R3513 2 0R0402-PAD
AVDD DP0 USB_PP3 16
HUB_RESET# 9 1 USB_PN3_R 1 R3514 2 0R0402-PAD
USB_PN3 16
2

AVDD DM0 USB_HUB_PP2


14 AVDD DP1 4 USB_HUB_PP2 52 Camera
DVDD1_HUB 21 3 USB_HUB_PN2
DVDD DM1 USB_HUB_PN2 52
1

C3512 1 DP2 7 USB_HUB_PP1


USB_HUB_PP1 58

1
SC1U10V2KX-L1-GP

R8803 C3501 AVDD5V 27 6 USB_HUB_PN1


47KR2J-2-GP SCD1U16V2KX-L-GP V5 DM2 USB_PP2
USB_HUB_PN1 58 WLAN(Bluetooth)
13 USB_PP2 52
2

3D3V_HUB DP3 USB_PN2


28 12 USB_PN2 52 Touch Panel

2
V33 DM3 USB_HUB_PP4
16 USB_HUB_PP4 63
2

DP4 USB_HUB_PN4
DM4 15 USB_HUB_PN4 63 Card Reader GL384L
HUB_XSCI 10 DY
HUB_XSCO X1 OVCUR1# R3511 2 0R2J-L-GP
11 X2 OVCUR1#/SMC 25 1 SML1_CLK 24,26,52,62,76
24 OVCUR2# DY1 R3512 2 0R2J-L-GP
OVCUR2#/SMD SML1_DATA 24,26,52,62,76
R3501 1 2 RREF 8 20 OVCUR3#
620R2F-GP HUB_RESET# RREF OVCUR3# OVCUR4# OVCUR3# 63
17 RESET# OVCUR4# 19
HUB_PSELF 22
HUB_PGANG PSELF
23 PGANG

TP3501 1HUB_TEST/SCL 18 TEST/SCL


TP3502 1HUB_SDA 26 SDA GND 29
C C

GL850G-OHY31-GP

POLY-FUSE CIRCUIT

3D3V_S5 3D3V_S5 3D3V_S5 3D3V_S5

1
3D3V_HUB 3D3V_HUB
R3521 R3524 R3525 R3526
30KR2F-GP 30KR2F-GP 30KR2F-GP 30KR2F-GP

1 R3508 2 DVDD1_HUB

2
0R0402-PAD
1

1
C3502 OVCUR1#

1
C3503 C3504 C3505 C3506 C3509

SC10U10V5KX-L1-GP
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

C3514 OVCUR2#
2

SCD1U16V2KX-L-GP
2
B
OVCUR3# B

OVCUR4#

3D3V_S0
As close to GL850G-32

EC1 close to
DY 1 R3516 2
0R2J-L-GP PIN28 OVCUR1#~4# Floating : Non-Removable
(Compound device)
R3509 3D3V_S5
3D3V_HUB 1 2
0R2J-L-GP
R3520 Individual Mode higher cost, change to 78.12034.1F1N5(5/9)
AVDD5V 1 2 5V_S5
DY 1R2J-GP HUB_PGANG

C3510
2

HUB_XSCO Wistron Confidential document, Anyone can not


DY 1 2
SC4D7P50V2BN-GP

C3518 C3519 R3519 SC33P50V2JN-3GP Duplicate, Modify, Forward or any other purpose
SC2D2U6D3V2MX-GP

100KR2J-4-GP application without get Wistron permission


1

A <Core Design> A
1

X3501
1

XTAL-12MHZ-21GP
Wistron Corporation
2

C3511 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


1 2 HUB_XSCI Taipei Hsien 221, Taiwan, R.O.C.
SC33P50V2JN-3GP
Title

USB HUB
Size Document Number Rev
Custom
LF14B SA
Date: Thursday, April 10, 2014 Sheet 35 of 102
5 4 3 2 1
5 4 3 2 1

Power Sequence
DDR3_VCCA_PWRGD DDR3_DRAM_PWROK
1D35V_S3

1D35V_S3

1
R3621

1
10KR2F-L1-GP
R3623 1 R3614 2 1D35V_VTT_PWRGD 49
10KR2F-L1-GP 0R0402-PAD

2
D D

2
DDR3_VCCA_PWRGD 5

Q3612 DDR3_DRAM_PWROK 5

From EC 3 4
3D3V_S5

1
1 R3627 2 DDR3_VCCA_PWRGD_3P3 2 5 3D3V_S5
24 SYS_PWROK

1
0R0402-PAD R3619
Delay 104ms with ALL_SYS_PWRGO 1 6 R3620 0R0402-PAD
10KR2F-L1-GP
Q3613

1
2
R3624

2
DMN601DWK-7-1-GP DDR3_DRAM_PWROK_D 10KR2F-L1-GP
3 4

2 5

2
18,24,49 PM_SLP_S4#
DDR3_VCCA_PWRGD_G

ALL_SYS_PWRGD 1 R3626 2 0R0402-PAD


COREPWROK 18
1 6 PM_SLP_S4#_D

DMN601DWK-7-1-GP

COREPWROK
To EC
37,51 1D05V_S0_PG 1 R3628 2 0R0402-PAD
ALL_SYS_PWRGD 24

C
ANNIE Run Power 1D8V_S0
R3632
3V_SYS_OUT 3D3V_S0 5V_SYS_OUT_2 5V_S0
C

10KR2J-L-GP
1 2 VTT_PWR
PG3605 PG3601
1 2 1 2

GAP-CLOSE-PWR GAP-CLOSE-PWR

PG3606 PG3602
5V_S5 3D3V_S5 1 2 1 2
U3601
3V_SYS_OUT GAP-CLOSE-PWR GAP-CLOSE-PWR
15
GND PG3607 PG3603
1 14
VIN1#1 VOUT1#14
2 13 1 2 1 2
VIN1#2 VOUT1#13 VTT_CT_3D3VC
3 12
ON1 CT1 5V_SYS_OUT_2 GAP-CLOSE-PWR GAP-CLOSE-PWR
4 11
VTT_PWR VBIAS GND VTT_CT_5VC
5 10
ON2 CT2 PG3608 PG3604
6 9
VIN2#6 VOUT2#9
7 8 1 2 1 2
VIN2#7 VOUT2#8
1

1
C3603 C3605 C3608 GAP-CLOSE-PWR GAP-CLOSE-PWR

1
TPS22966DPUR-GP DY
2nd = 74.03523.A73 C3612 PG3609
2

2
SC330P50V2KX-3GP

SCD1U16V2KX-L-GP
1 2

2
SC330P50V2KX-3GP

SC22U6D3V3MX-1-GP
1

C3633 C3606 C3632 C3607 GAP-CLOSE-PWR

1
SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

DY DY C3609
DY
2

1
DY DY
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

2
C3610

SC22U6D3V3MX-1-GP

SCD1U16V2KX-L-GP
2
B B

Discharge circuit
1D5V_S0
Q3610 5V_S0
3D3V_S5
DY
220R3F-1-GP 1 R3605 2 1D5V_DIS_Q 3 4 R3625 Q3605 5V_S5
1 2 5V_DIS_Q 3 4
2 5 220R3F-1-GP
24 EC_PM_SLP_S3# R3616 2 5
1D5V_DIS 24 EC_PM_SLP_S3# R3622
1 6 1 2
10KR2F-L1-GP 1 6 5V_DIS 1 2
100KR2J-4-GP
2N7002KDW-GP
DMN601DWK-7-1-GP DY
84.2N702.A3F
2nd = 75.00601.07C
DY
1D05V_S0
Q3611
3D3V_S5
220R3F-1-GP 1 R3606 2 1D05V_DIS_Q 3 4
BAS16PT-GP
2 2 5
24 EC_PM_SLP_S3# R3617
3 1 6 1D05V_DIS 1 2
PURE_HW_SHUTDOWN# 24,26,76
10KR2F-L1-GP
45 3V_5V_EN 1

D3602 DMN601DWK-7-1-GP
2

R3611
A 200KR2J-L1-GP A

DY R3612
2 1 3D3V_S0
1

S5_ENABLE 24 Q3614 Wistron Confidential document, Anyone can not


2KR2F-L1-GP
3D3V_S5 Duplicate, Modify, Forward or any other purpose
220R3F-1-GP 1 R3607 2 3D3V_DIS_Q 3 4 application without get Wistron permission
<Core Design>
2 5
24 EC_PM_SLP_S3# R3618
1 6 3D3V_DIS 1 2
10KR2F-L1-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
DMN601DWK-7-1-GP
Title

Power Plane Enable & SEQUENCE


Size Document Number Rev
A2
LF14B SA
Date: Thursday, April 10, 2014 Sheet 36 of 102
5 4 3 2 1
5 4 3 2 1

1D35V_S0
1D8V_S0
1D35V_S3

36,51 1D05V_S0_PG 1D05V_S0_PG 1 R3703 2 1D35V_S0_EN


1D35V_S0_EN 21
D D
0R0402-PAD
1D35V_S0
1

1
C3701 C3702 EC3702
SC22U6D3V5MX-L3-GP

SC10U6D3V3MX-L-GP
2

2
SC1U10V2KX-L1-GP

U3701
1D0V_S5

GND 15
1D5V_S0 5V_S5 1 14
VIN1#1 VOUT1#14
2 13

Hi
1D35V_S0_EN VIN1#2 VOUT1#13 VTT_CT_1D35VC 1D0V_S0
3 ON1 CT1 12

L:
4 VBIAS GND 11

1
11D8V_S0_EN VTT_CT_1D8VC C3704

o1
2 5 ON2 CT2 10

SC330P50V2KX-3GP
R3701 6 9 DY
VIN2#6 :. VOUT2#9

1
10KR2J-L-GP 7 00 8 C3703

2
VIN2#7 VOUT2#8
DY
.5

1
6V

1D8V_S5

SC330P50V2KX-3GP
TPS22966DPUR-GP C3707 C3708

SC22U6D3V3MX-1-GP
V

DY
74.22966.093

2
SC1U10V2KX-L1-GP
C 2nd = 74.03523.A73
5V_S5 1D0V_S0 C
1

C3705 C3706
SC22U6D3V3MX-1-GP

DY
U3702
2

2
SC1U10V2KX-L1-GP

GND 9
1 VIN#1 VOUT#8 8
1D8V_S0 2 7
IMVP_PW RGD VIN#2 VOUT#7 VTT_CT_1D0VC
26,46 IMVP_PW RGD 3 ON CT 6
4 5

Hi
VBIAS GND

1
L:
C3710
TPS22965DSGR-GP

o1
DY

:.

2
00
74.22965.093

SC330P50V2KX-3GP
.5
AFTP3701 1 IMVP_PW RGD

6V
V
AFTE14P-GP

3D3V_S5
3D3V_S5

B B

1
R3704

1
47KR2J-L2-GP
R3705
1D0V_S0 Q3701 1KR2F-L-GP

2
2N7002K-2-GP
1D0V_PW ORK# G

2
C
R3706
D 1D0V_S0_PG
1D0V_PW ORK 84.02222.V11 1D0V_S0_PG 51
2 1 B
1D35V_S3 1D35V_PW R MMBT2222A-3-GP S
Q3702

E
1KR2F-L-GP
84.2N702.J31

1
2ND = 84.2N702.031
C3712
SC22P50V2GN-GP
PC4929

PC4930

2
DY
1

EC4901 EC4902 EC4903 EC4904 EC4906 EC4905


SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
2

2
SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ADAPTER OCP / S3 reduction


Size Document Number Rev
A3
LF14B SA
Date: Thursday, April 10, 2014 Sheet 37 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4
LF14B SC
Date: Tuesday, October 22, 2013 Sheet 38 of 102
5 4 3 2 1
5 4 3 2 1

2013/9/10 Change Power Source to 5V_S5


2013/9/18 Change Charger IC to STCC5021
USB Charger (M40/M50) Should use discharge part.
3D3V_AUX_S5
# ST:074.05021.0073
TI:74.02546.073(Reserved) UC_ST

1
TP3901
R3907
0R2J-2-GP AOU_IFLG# 1
D D

2
TPAD14-OP-GP

C3905 R3910

2
SCD1U10V2KX-4GP
ILIM Charge Current limit: 2M7R2J-GP

2
Imax(mA) = 48000/ Rilim (k ohm) UC_TI
UC_ST

1
UC_ST:64.22025.6DL_TI:64.22125.6DL

1
Rilim 22KR2F-GP
R3902
5V_S5 1 2 USB_OC#0 16,34

UC_AUX_PWR
DY DY 5V_USB1_S3
1

ILIM_HI
C3904 C3902
SC4D7U10V5KX-1GP

SCD1U10V2KX-4GP

C3903
DY
SC47U6D3V5MX-1-GP

UC
2

1
C3901 20131009

17
16
15
14
13
U3901 SC47U6D3V5MX-1-GP
?????

2
FAULT#
ILIM
GND

VDD
GND
1 IN OUT 12
C 2 11 C
16,34 USB_PN0 DM_OUT DM_IN USB_PN0_CHG 34
16,34 USB_PP0 3 DP_OUT DP_IN 10 USB_PP0_CHG 34
UC_ATTACH_EN 4 9 UC
ATTACH_EN CHARGING#/ATTACH# USB_PW R_EN1_R 2 1 USB_PW R_EN1
0R2J-2-GP R3911
3D3V_AUX_S5 3D3V_AUX_S5
CTL1
CTL2
CTL3
100KR2J-1-GP EN USB_AO_SEL1_R
UC
2 1 USB_AO_SEL1
R3908 0R2J-2-GP R3912
1 2 STCC5021IQTR-GP UC
5
6
7
8

1
UC_ST UC_ST:074.05021.0073 USB_AO_SEL2_R 2 1 USB_AO_SEL2
5V_S5 R3909 0R2J-2-GP R3913
100KR2J-1-GP UC
UC_CTL2
UC_CTL3

2 1 USB_PW R_EN1_R AOU_IFLG#_R 2 1 AOU_IFLG#


0R2J-2-GP R3906 UC 0R2J-2-GP R3914

2
UC_TI

UC_ST 5V_S5
AOU_IFLG#_R
USB_AO_SEL1_R 100KR2J-1-GP
R3904
1 2
#Need check KBC GPIO Port is PSL_IN
UC_TI
2 1
0R2J-2-GP R3903
B B
UC_ST USB_AO_SEL2_R
2 1
0R2J-2-GP R3905

2 1 5V_S5
0R2J-2-GP R3901
UC_TI
STCC5021 Truth Table

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number


USB Charger Rev
A3
LF14B SA
Date: W ednesday, April 16, 2014 Sheet 39 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 40 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 41 of 102
5 4 3 2 1
5 4 3 2 1

DC Jack Adaptor in to generate DCBATOUT


AFTP4205
AFTE14P-GP
AD+ 1
1 TP4205 TPAD14-OP-GP
1 TP4206 TPAD14-OP-GP

1
PW RCN1 TP4204 TP4203 TP4207 TPAD14-OP-GP
D
7 TPAD14-OP-GP TPAD14-OP-GP 20130913 D

NP2
5
4 AD_JK AD_JK_F AD+

1
3 AD_ID 24 F4201 PU4203
2 1 2 1 S D 8
2 S D 7
1 FUSE-10A24V-GP 3 S D 6

1
NP1 PC4205 4 G D 5

K
1

SCD1U50V3KX-L-GP
6
EC4207 PR4203 PD4201 SI7121DN-T1-GE3-GP

1
SCD1U50V3KX-L-GP
HR-CON5-3-GP-U 200KR2F-L-GP DY P6SBMJ27APT-GP

2
20.F2198.005 83.P6SBM.DAG EC4206
84.07121.037 SCD1U50V3KX-L-GP
2nd = 83.P6SMB.JAG

2
A
3rd = 83.P6SMB.CAG AD+2 2nd = 84.07403.037

2
PC4202

1
AD_JK_F_R
PR4201

SCD1U50V3KX-L-GP
1MR2F-L-GP

2
1
24 AD_JK_F_R
20131017

1
1
PC4203 DY DY
SCD1U16V2KX-L-GP PR4204
C 34K8R2F-1-GP C

2
PQ4202
R2
PQ4201 2
PR4206 C PW R_ADJK_EN 1
R1 R1
1 2 AD_OFF_R B 3
24 AD_OFF
1KR2J-1-GP E
R2
PDTC124EU-1-GP LTA024EUB-FS8-GP

1
1 AD_JK 84.00124.H1K 84.00024.01K
AFTE14P-GP AFTP4201 1 2ND = 84.00124.X1K PR4202
AFTE14P-GP AFTP4202 1 100KR2J-1-GP
AFTE14P-GP AFTP4203

2
1
AFTE14P-GP AFTP4204
B B

AD_ID
K

DY PD4202
ESD5Z3-3T1G-GP
A

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DCIN JACK
Size Document Number Rev
A3
LF14B SC
Date: Thursday, April 10, 2014 Sheet 42 of 102
5 4 3 2 1
5 4 3 2 1

BATTERY CONNECTOR
D D

F4301
BT+ 1 2 BT+_IN

FUSE-20A24V-1-GP

1
PC4301 PC4302 EC4301
SCD1U50V3KX-L-GP SC2K2P50V2KX-L-GP SCD1U50V3KX-L-GP

2
2013/10/4
20131016
Pin Define
BATT1
9
BT+_IN 7
6 Pin# Comments Color
R4301 1 2 BATA_SCL_1 5
C
24,44,67 BAT_SCL
24,44,67 BAT_SDA
R4302 1 2 33R2J-2-GP BATA_SDA_1 4 1 GND- BLACK C

24 BAT_IN# R4303 1 2 33R2J-2-GP BAT_IN#_1 3


33R2J-2-GP 2
2 GND- BLACK
PC4303 PL4301 PL4302 PL4303 1
PC4304 PC4305 8
3 ID WHITE
K

1
SC1KP50V2KX-1GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
PD4301 SYN-CON7-55-GP

MLVS0402M04-GP-U

MLVS0402M04-GP-U

MLVS0402M04-GP-U
MMSZ5232BS-7-F-GP
020.F0049.0007 4 SMD GREEN

2
DY
A

DY DY DY 5 SMC BLUE

1
6 BATT+ RED
7 BATT+ RED

B BAT_IN#_1 B
1
AFTE14P-GP AFTP4301 1 BATA_SDA_1
AFTE14P-GP AFTP4302 1 BATA_SCL_1
AFTE14P-GP AFTP4303
1 BT+_IN
AFTE30-GP AFTP4305 1
AFTE14P-GP AFTP4306 1
AFTE14P-GP AFTP4309
1
AFTE14P-GP AFTP4307 1
AFTE14P-GP AFTP4308 1
AFTE14P-GP AFTP4310

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

BATT CONN
Size Document Number Rev
A3
LF14B SC
Date: Thursday, April 10, 2014 Sheet 43 of 102
5 4 3 2 1
5 4 3 2 1

AD+ +SDC_IN CHARGER_SRC

PU4405
PR4426 SSID =CHARGER
8 D S 1 1 2
7 D S 2
6 D S 3 D01R3721F-GP-U

1
5 D G 4 AD+

1
PR4435
PG4406 PG4402

100KR2J-1-GP
SI7121DN-T1-GE3-GP GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
1

84.07121.037
PR4418

2
3KR5J-GP AD+_G_2
2nd = 84.07403.037
D D
2

2
DC_IN_D

10KR2F-2-GP
PR4423
PC4428
PQ4407
3 4 1 2

1 AD+_G_1
ACAV_IN 2 5 SCD1U25V2KX-GP

1 6
PC4418

1
2N7002KDW-GP

SCD1U25V2KX-GP
PC4416
84.2N702.A3F SC1U25V3KX-1-GP
10R5J-GP CHARGER_SRC DCBATOUT

2
PR4403

2
BQ24715_AGND

1
SIR172ADP-T1-GE3-GP

PC4403
SC10U25V5KX-GP

PC4430
SC10U25V5KX-GP

PC4431
SC10U25V5KX-GP

PC4432
SC10U25V5KX-GP
BQ24715_AGND

1
PC4411
SC10U25V5KX-GP

PC4427
SC10U25V5KX-GP

PC4407
SC10U25V5KX-GP

PC4413
SCD1U25V2KX-GP
5
6
7
8
PC4414 DY

2
1

D
D
D
D
PC4410 PU4406

2
1
SCD1U25V2KX-GP
SC1U25V3KX-1-GP

2
AD+

2
BATDRV

G
4

S
S
S
1 BQ24715_AGND BQ24715_AGND BT+

3
2
1
+VCHGR

PWR_CHG_ACP

PWR_CHG_ACN
PR4444 PWR_CHG_REGN 84.00172.A37
309KR2F-GP 2nd = 84.06552.037

1
VacDET=2.4V

0R0402-PAD
PL4402
PR4409 PC4422 1 2 PU4403
Setting=18.178v
2

+SDC_IN 1 2 1 2 1 S D 8
PU4404 SC1U10V2KX-L1-GP IND-3D3UH-135-GP PR4443 2 S D 7

PR4427

2D2R5F-2-GP
PWR_CHG_REGN 68.3R31B.10H D01R2512F-3-GP 3 S D 6
SCD01U50V2KX-1GP

2
1

1
PWR_CHG_VCC G D

PC4420

EC4401
1 20 RB751V-40H-GP PU4411

SC1KP50V2KX-1GP
4 5

SC1U25V3KX-1-GP
1

5
6
7
8

1
ACN VCC

PC4415
SC10U25V5KX-GP
3D3V_AUX_KBC SIRA12DP-T1-GE3-GP 2nd = 68.3R310.20C
PC4402

DY PR4411 PR4439 PD4401

D
D
D
D
100KR2J-1-GP

GAP-CLOSE-PWR-3-GP
PG4407

GAP-CLOSE-PWR-3-GP
PG4403
47KR2F-GP 4K02R2F-GP 11 PWR_CHG_BATDRV DY DY SI7121DN-T1-GE3-GP

1
BATDRV#
PR4449

2
DY
2

2
1

ACP PWR_CHG_REGN PC4424


16
2
84.07121.037

2
PWR_CHG_CMSRC REGN PR4425
PC4421
C
DY 3 C
2

2
1

CMSRC

SCD01U25V2KX-3GP
PWR_CHG_BTST 1 2PWR_CHG_BTST1 1 DCBATOUT_SNUB

G
17 2 4

1
BTST

S
S
S
PR4432 PR4414 4 0R0603-PAD 2nd = 84.07403.037

SC330P50V3KX-GP
3K3R2J-3-GP 3K3R2J-3-GP ACDRV PWR_CHG_HIDRV SCD047U25V3KX-3-GP
18 84.SRA12.037
2

3
2
1

1
PWR_CHG_ACDET HIDRV
BQ24715_AGND

PC4406
6
ACDET
2nd = 84.06508.037 DY
2

CHARGER_CELL_PIN 10 PC4429

2
CELL PWR_CHG_PHASE
19 1 2
PHASE
1

PG4401 GAP-CLOSE-PWR-3-GP 15 PWR_CHG_LODRV SCD1U25V2KX-GP

1
LODRV
PR4415
33KR2F-GP

1 2 PWR_SDA 8 PC4401 PC4412


24,43,67 BAT_SDA SDA
PG4408 GAP-CLOSE-PWR-3-GP SCD1U25V2KX-GP SCD1U25V2KX-GP
DY 1 2 PWR_SCL 9
GND
14

2
24,43,67 BAT_SCL SCL
13 PWR_CHG_SRP PR4438 1 2 0R0402-PAD PWR_CHG_SRP_R
2

ACAV_IN PR4430 1 PWR_CHG_ACOK SRP


2 0R0402-PAD 5
ACOK PWR_CHG_SRN PWR_CHG_SRN_R BATDRV
ACAV_IN SRN
12 PR4417 1 2 0R0402-PAD BQ24715_AGND BQ24715_AGND
PR4413 1 2BQ24715_IOUT_1 7

GND
H=ACIN 24 AD_IA 0R0402-PAD IOUT
L=UNAC
BQ24715RGRR-1-GP 21
1 PR4406 2 0R0402-PAD
SC100P50V2JN-3GP
PC4423
1

BQ24715_AGND
BQ24715_AGND
2

74.24715.A73 PWR_CHG_CMPIN:
V-=3.3*(PR4402/(PR4428+PR4402))=1.3164V
BQ24715_AGND 3D3V_AUX_S5

5V_S5

1
1
BOM_UMA PR4428 BOM_DIS PR4405 PR4457

169KR2F-1-GP

100KR2F-L1-GP
PR4422 1 2

1
1M8R2J-L-GP 0R0402-PAD H_PROCHOT# 19,24,46
PR4437

2
PQ4413_3

PWR_CHG_CMPIN
100KR2J-1-GP PQ4413 PWR_CHG_REGN
2

1 2 4 3

Vinafix.com
PR4436
PR4402

2
B 75KR2F-GP PWR_CHG_CMPOUT PWR_CHG_CMPOUT 1 2 PQ4413_5 5 2 B
5V_S5

1
220KR2F-GP 6 1

1
BQ24715_IOUT_1 0318 PR4410

1
PC4405 3D3V_AUX_S5 2N7002KDW-GP 100KR2J-1-GP

SCD01U50V2KX-L-GP
PC4426

PC4419
SCD01U50V2KX-L-GP 84.2N702.A3F

SC100P50V2JN-3GP

2
2

2
1
PWR_CHG_ACOK
5
6
7
8

PR4412
100KR2F-L1-GP

1
LM393PWR-GP

2IN-
2IN+

2OUT
VCC

PR4404
120KR2F-L-GP
PU4402

2
DCBATOUT 24 AC_IN#
1OUT
GND
1IN+
1IN-

2
74.00393.C2G
120KR2F-L-GP
1
PR4441

4
3
2
1
2

PU4402_1IN+
1

3D3V_AUX_S5
PR4440
60K4R2F-GP

PR4458
1
PR4464
60K4R2F-GP

PWR_BAT_UVP_CMPOUT 1 2
0R0402-PAD H_PROCHOT# 19,24,46
2

PU4402_1IN-
2
1

DIS_DTM_HW:
PR4447
93K1R2F-L-GP

PWR_CHG_REGN=6V
V+=6*(PR4440/(PR4441+PR4440))=2V
A A
Setting=2*((PR4442+PR4447)/PE4447)=6V
2

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CHARGER_BQ24727
Size Document Number Rev
A2
LF14B SA
Date: Thursday, April 10, 2014 Sheet 44 of 102
5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_3p3v5v

D D

DCBATOUT PWR_5V_DCBATOUT

PG4511
1 2 5V_PWR 5V_S5
PG4526
GAP-CLOSE-PWR 1 2
PG4512
1 2 GAP-CLOSE-PWR
PG4515
GAP-CLOSE-PWR 1 2
PG4513
1 2 GAP-CLOSE-PWR
PG4516
GAP-CLOSE-PWR 1 2
PG4514
1 2 GAP-CLOSE-PWR
PG4517
GAP-CLOSE-PWR 1 2
DCBATOUT PWR_3D3V_DCBATOUT PG4527
3D3V_S5 3D3V_PWR 1 2 GAP-CLOSE-PWR
PG4518
PG4501 DCBATOUT GAP-CLOSE-PWR 1 2
PG4504 1 2 PG4529
1 2 1 2 GAP-CLOSE-PWR
GAP-CLOSE-PWR PG4519
GAP-CLOSE-PWR PG4502 GAP-CLOSE-PWR 1 2
PG4505 1 2 PG4530 PWR_5V_DCBATOUT
1 2 PWR_3D3V_DCBATOUT PC4507 1 2 GAP-CLOSE-PWR
1

1
SC10U25V5KX-GP
C4501 GAP-CLOSE-PWR PC4527 PG4521
SC82P50V2JN-3GP

DY GAP-CLOSE-PWR PG4503 DY GAP-CLOSE-PWR 1 2

SCD01U50V2KX-L-GP
PG4506 1 2 PC4505 PC4504 PC4506
2

1
SC10U25V5KX-GP

SC10U25V5KX-GP

SCD1U25V2KX-GP
1 2 GAP-CLOSE-PWR
1

PC4501 PC4502 GAP-CLOSE-PWR PG4528


SCD1U25V2KX-GP

SC10U25V5KX-GP

GAP-CLOSE-PWR 1 2

2
PG4507
2

1 2 GAP-CLOSE-PWR
C C
D 8
D 7
D 6
D 5

GAP-CLOSE-PWR

5
6
7
8
PU4502

D
D
D
D
TPCC8067-H-GP
84.08067.A37 PU4504
2nd = 84.00412.037 TPCC8067-H-GP

12
4 3rd = 84.07410.A37 PU4501 84.08067.A37
G

G
2nd = 84.00412.037
S
S
S

4 CYNTEC. 7*7*3

VIN
TDC=7.8A

S
S
S
CYNTEC. 7*7*3
1
2
3

PC4512 PR4501 PR4510 PC4510 3rd = 84.07410.A37 DCR: 18~20mOhm

3
2
1
TDC=2.9A DCR: 18~20mOhm PL4501 SCD1U25V2KX-GP 2D2R2F-GP 2D2R2F-GP SCD1U25V2KX-GP PL4502 OCP<15.6A
IND-2D2UH-122-GP 1 2 PWR_3D3V_BOOT2_1 1 2PWR_3D3V_BOOT2 9 17 PWR_5V_BOOT1 1 2 PWR_5V_BOOT1_1 1 2 IND-2D2UH-122-GP Idc :8A , Isat :14A
OCP<5.8A Idc :8A , Isat :14A 68.2R21B.10J
VBST2 VBST1
68.2R21B.10J
3D3V_PWR 2nd = 68.2R210.20B PWR_3D3V_UGATE2 10 16 PWR_5V_UGATE1 2nd = 68.2R210.20B 5V_PWR
DRVH2 DRVH1
3rd = 68.2R210.20Y 3rd = 68.2R210.20Y 4th = 68.2R21E.10Z
2 1 PWR_3D3V_PHASE2 8 18 PWR_5V_PHASE1 2 1
SW2 SW1
4th = 68.2R21E.10Z PWR_3D3V_LGATE2 11 15 PWR_5V_LGATE1
1

PC4513 DRVL2 DRVL1 PG4525


D 8
D 7
D 6
D 5

5
6
7
8

1
SCD1U10V2KX-L1-GP

GAP-CLOSE-PWR-3-GP
PT4502

D
D
D
D
DY ST100U6D3VDM-8-GP
PG4520 14 PWR_5V_VOUT
2

1
VO1
GAP-CLOSE-PWR-3-GP

PU4503 PU4505

SCD1U16V2KX-L-GP
TPCC8067-H-GP PWR_3D3V_FB2 4 2 PWR_5V_FB1 TPCC8065-H-GP PG4524 PC4511 PT4503

2
1
VFB2 VFB1

GAP-CLOSE-PWR-3-GP
84.08067.A37 84.08065.B37 ST220U6D3VDM-23-GP

2
Hi

G
2nd = 84.00412.037 4 4 2nd = 84.00780.037
G
2

S
S
S

PWR_5V_FB1_R
79.10710.2AL 3rd = 84.07506.037 79.22710.20L
S
S
S

L:
3rd = 84.07410.A37 6 20 2nd = 77.22271.29L
1
2
3

3
2
1

2
36 3V_5V_EN EN2 EN1 3V_5V_EN 36

o1
PWR_3D3V_VOUT

:.
PWR_3D3V_ENTRIP2 5 1 PWR_5V_ENTRIP1

06
CS2 CS1

.V3V
19

1
VCLK
3D3V_S5 PR4512
R1
3V_5V_POK 7 21 30KR2F-GP
PGOOD GND
VREG3

VREG5
1

2
PR4504 PR4511
0R2J-L-GP 100KR2J-4-GP
1

TPS51275CRUKR-GP
DY
3

13
B PR4502 B
2

R1
6K8R2F-2-GP
50 3V_5V_POK 074.51275.0073

1
PWR_3D3V_FB2_R PR4513
2

20KR2F-L3-GP
1

PC4514
SC18P50V2JN-1-GP
Vout = 2 * ( 1 + R1/R2 ) R2

2
DY = 2 * ( 1 +33K / 21K)
2

= 5.14V
1

5V_AUX_S5
3D3V_AUX_S5
PR4503
10KR2F-L1-GP R2 PG4522 PG4523
1 2 PWR_5V3D3V_VREG3 PWR_5V3D3V_VREG5 2 1
Vout = 2 * ( 1 + R1/R2 ) Close to VFB Pin (pin2)
2

= 2 * ( 1 + 6.8K / 10K) GAP-CLOSE-PWR GAP-CLOSE-PWR

= 3.36V
1

PC4509
SC4D7U6D3V3KX-L-GP PC4508
2

SC4D7U6D3V3KX-L-GP
2

Close to VFB Pin (pin5)

3D3V OCP 5V OCP


PR4509
63K4R2F-2-GP
PWR_3D3V_ENTRIP2 1 2 PWR_5V_ENTRIP1 2 PR4514 1
110KR2F-GP
1

1 5V_S0
5V_S0
1

AFTE14P-GP AFTP4501 PC4516 DY


1 1D35V_PWR PC4517 DY SC18P50V2JN-1-GP
1D35V_PWR
2

AFTE14P-GP AFTP4502 SC18P50V2JN-1-GP


2

1 VCC_CORE
A VCC_CORE A
AFTE14P-GP AFTP4503

1 5V_AUX_S5
AFTE14P-GP AFTP4505
1 PM_SLP_S3# PM_SLP_S3# 18,24,46,49
AFTE14P-GP AFTP4507 <Core Design>
1 3V_5V_EN
AFTE14P-GP AFTP4506

AFTE14P-GP AFTP4508
1 3D3V_S0
3D3V_S0 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51225_5V/3D3V
Size Document Number Rev
A2
LF14B SA
Date: Wednesday, April 16, 2014 Sheet 45 of 102
5 4 3 2 1
5 4 3 2 1

SSID = CPU.Regulator

5V_S5 5V_S5

2
PR4602 PR4603
1D0V_S0 0R0402-PAD 1R2J-GP
PR4624
69D8R2F-GP
2 1 H_CPU_SVIDCLK

1
D D
1D0V_S0 PWR_VCORE_VCCP PWR_VCORE_VDD
PR4625
69D8R2F-GP
2 1 H_CPU_SVIDDAT

1
PC4602 PC4603
SC1U10V2KX-1GP SC1U10V2KX-1GP

2
1D0V_S0

22

21
PU4601

VDD
VCCP
SC1U10V3KX-L1-GP

DY
PC4601
18,24,45,49 PM_SLP_S3# 0R0402-PAD 2 PR4606 1 PWR_VCORE_VR_ON P 2 20
2

VR_ON PWM2
1

DY 18 H_CPU_SVIDCLK 2 PR4608 1 20R2F-GP PWR_VCORE_SCLK 3


SCLK
PR4607
499R2F-2-GP 18 VR_SVID_ALERT# 0R0402-PAD 1 PR4609 2 PWR_VCORE_ALERT# 4
ALERT#
16 PWR_VCORE_BOOT1 47
BOOT1
18 H_CPU_SVIDDAT 1 PR4610 2 16D9R2F-1-GP PWR_VCORE_SDA 5
2

SDA

19,24,44 H_PROCHOT# 6 19 PWR_VCORE_LGATE1 47


VR_HOT# LGATE1

18 PWR_VCORE_PHASE1 47
PWR_VCORE_NTCG PHASE1
48 PWR_VCORE_NTCG 1
NTCG

47 PWR_VCORE_NTC PWR_VCORE_NTC 7
NTC
17 PWR_VCORE_UGATE1 47
5V_S5 UGATE1
9
ISEN1
PR4611 1 2PWR_VCORE_ISEN2 8
0R0402-PAD ISEN2

C 14 PWR_VCORE_COMP 47 C
COMP
10
ISUMP
13 PWR_VCORE_FB 47
PWR_VCORE_ISUMN FB
11
ISUMN
12 VSS_SENSE 7,47
47 PWR_VCORE_VSUM+ RTN
2K61R2F-1-GP
1

1
11KR2F-L-GP

1
Place near choke of Phase1 PR4612 PR4613 PWR_VCORE_ISUMNG 31
PC4604 PC4605 ISUMNG
SCD022U16V2KX-3GP

SCD047U25V2KX-GP 32
2

2
ISUMPG
2

26 PWR_VCORE_BOOTG 48
VSUM_R BOOTG
2013/05/06
1

15
PR4614 PGOOD
Vcore OCP setting 25 PWR_VCORE_UGATEG 48
UGATEG
2nd = 69.60013.131 NTC-10K-26-GP-U
OCP:22.5 A 27
PGOODG
24 PWR_VCORE_PHASEG 48
PHASEG

COMPG
PR4615
2

RTNG
23

GND
PWR_VCORE_LGATEG 48

FBG
LGATEG
1 2
47 PWR_VCORE_VSUM- 590R2F-GP
ISL95833HRTZ-GP

33

28

29

30
1

74.95833.073
PC4606 PR4616
SCD1U16V2KX-L-GP 2 1 ISUMN_RC 1 2 PC4607
2

649R2F-GP SC4700P50V2KX-1GP PWR_VCORE_RTNG 48

48 PWR_VCORE_VSUMG+ PWR_VCORE_FBG 48
B B
2K61R2F-1-GP
1

1
11KR2F-L-GP

PR4617 PR4618
PC4608 PC4609 PWR_VCORE_COMPG 48
Place near choke of AXG Phase1
SCD022U16V2KX-3GP

SCD047U25V2KX-GP
2

2013/05/06
2

VSUMG_R 3D3V_S5 3D3V_S5


GFX OCP setting
1

PR4619 OCP:16 A
2nd = 69.60013.131 NTC-10K-26-GP-U
1

1
PR4620

PR4621
1K91R2F-1-GP

1K91R2F-1-GP
PR4622 DY
2

1 2
2

2
48 PWR_VCORE_VSUMG- 590R2F-GP
1

PC4610
SCD1U16V2KX-L-GP
2

PR4623 PR4627
ISUMNG_RC 2 PC4611 PWR_VCORE_GOODG 2 0R0402-PAD
2 1 1 1 For GFX
649R2F-GP SC4700P50V2KX-1GP

IMVP_PWRGD 26,37 For VCCCORE

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL95833_CPUCORE(1/3)
Size Document Number Rev
C
LF14B SA
Date: Thursday, April 10, 2014 Sheet 46 of 102
5 4 3 2 1
5 4 3 2 1

DCBATOUT

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
PC4711

1
SC10U25V5KX-GP
PC4713 PC4702 PC4703 PC4704

SCD1U25V2KX-GP
2

2
20131016

D D

5
6
7
8

2nd = 84.06552.037
D
D
D
D
TPCA8065-H-GP
84.08065.037
PU4701

2D2R3F-L-GP
PC4701
PR4701 SCD22U50V3ZY-1GP Pana . 7 x 7 x 4

G
S
S
S
1 2 BOOT1_RC 1 2 DCR 1.8~2.3 mOhm

4
3
2
1
46 PWR_VCORE_BOOT1
Isat : 32A
VCC_CORE
46 PWR_VCORE_UGATE1
PL4701
1 2
46 PWR_VCORE_PHASE1 IND-D36UH-26-GP-U

46 PWR_VCORE_LGATE1 68.R3610.10R PT4702

1
SCD1U25V2KX-GP
2nd = 68.R3610.20P PC4712

5
6
7
8

84.08057.037

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

ST470U2VDM-7-GP-U
2

D
D
D
D
TPCA8057-H-GP
PU4702 PG4701 PG4708

1
1

3
2nd = 84.06504.037

G
4

2
S
S
S
79.47719.9BL

3
2
1
PR4705
3K65R2F-1-GP
46 PWR_VCORE_VSUM+ 1 2 PWR_VCORE_VSUM+_GAP

C C
Parallel
1 PR4706 2 PWR_VCORE_VSUM-_GAP
46 PWR_VCORE_VSUM-
1R2F-L-GP
PR4707
64K9R2F-1-GP
1 2
46 PWR_VCORE_COMP

46 PWR_VCORE_FB SC470P50V2KX-3GP
Vboot setting
PR4708
PC4705 Vout = 1.1V
499R2F-2-GP PC4706
1 2 FB_RC 1 2 1 2 SC120P50V2JN-1GP

2013/04/26
PR4710
PR4709
137KR2F-L-GP PC4707 SC1KP50V2KX-L-1-GP
1 2 1 2COMP_RC 1 2

1K78R2F-GP PC4708
SC680P50V2KX-2GP
Vcore LL setting 1 2COMP_R 1 2
PR4711
LL : 5.9mOhm 2KR2F-L1-GP

PC4709
SC330P50V2JC-2-GP
1
DY 2
VCC_SENSE 7

VSS_SENSE 7,46

B 1 2 Parallel B

PC4710
SCD01U50V2KX-L-GP

PR4702 PR4703
2 1 NTC_RC 1 2 PWR_VCORE_NTC 46
3K83R2F-GP 27K4R2F-GP
PR4704
1 2

NTC-470K-8-GP-U
NTC Place near high side MOSFET of Phase1 2nd = 69.60013.141

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL95833_CPUCORE(2/3)
Size Document Number Rev
A2
LF14B SA
Date: Thursday, April 10, 2014 Sheet 47 of 102
5 4 3 2 1
5 4 3 2 1

DCBATOUT

PC4815

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

1
SCD1U25V2KX-GP
1

1
PC4802 PC4803 PC4804 PC4805

2
2

2
20131016
D D

5
6
7
8
D
D
D
D
TPCA8065-H-GP
84.08065.037
PU4703

2D2R3F-L-GP PC4801
SCD22U50V3ZY-1GP 2nd = 84.06552.037
PR4801

G
S
S
S
1 2 BOOTG_RC 1 2
46 PWR_VCORE_BOOTG
Pana . 7 x 7 x 4

4
3
2
1
DCR 1.8~2.3 mOhm GFX_CORE

46 PWR_VCORE_UGATEG Isat : 32A GFX_CORE


2013/04/26 PL4801
1 2
46 PWR_VCORE_PHASEG IND-D36UH-26-GP-U

68.R3610.10R PT4801

ST470U2VDM-5-GP-U1

1
46 PWR_VCORE_LGATEG PC4812 PC4813 PC4814

5
6
7
8

1
84.08057.037

SCD1U25V2KX-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
PC4816

D
D
D
D
TPCA8057-H-GP
PU4704 2
2nd = 68.R3610.20P

2
1
2nd = 84.06504.037

3
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
G
4 PG4801 PG4802

1
S
S
S
3
2
1
79.47719.2FL

2
2nd = 77.24771.01L

PR4805
3K65R2F-1-GP
C C
2 1 PWR_VCORE_VSUMG+_GAP
46 PWR_VCORE_VSUMG+

Parallel
46 PWR_VCORE_VSUMG- 1 PR4806 2 PWR_VCORE_VSUMG-_GAP
1R2F-L-GP

PR4807
21KR2F-GP
1 2
46 PWR_VCORE_COMPG

Freq. setting
46 PWR_VCORE_FBG SC470P50V2KX-3GP FSW = 450KHz
PR4808
PC4806
499R2F-2-GP PC4807
2 1FBG_RC 1 2 2 1 2013/05/06
SC120P50V2JN-1GP

PR4810
PC4808
137KR2F-L-GP
1 PR4809 2 1 2COMPG_RC
2 1 SC1KP50V2KX-L-1-GP

1K69R2F-2-GP
PC4809
SC330P50V2KX-3GP
Vcore LL setting
1 2COMPG_R 1 2
LL : 5.9mOhm
PR4811
2KR2F-L1-GP
2013/05/06

B B
PC4810
SC330P50V2JC-2-GP
1 2
DY
VCC_AXG_SENSE 7

PC4811 VSS_AXG_SENSE 7
SCD01U50V2KX-L-GP
1 2
46 PWR_VCORE_RTNG Parallel
0R0402-PAD 2 1 PR4813

PR4802 PR4803
2 1 NTCG_RC 1 2 PWR_VCORE_NTCG
PWR_VCORE_NTCG 46
3K83R2F-GP 27K4R2F-GP
PR4804
1 2

NTC-470K-8-GP-U
NTC place near high side MOSFET of AXG Phase1
2nd = 69.60013.141

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL95833_AGX_CORE(3/3)
Size Document Number Rev
A2
LF14B SA
Date: Thursday, April 10, 2014 Sheet 48 of 102
5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_1p35v0p675v 1D35V_PW R 1D35V_S3


DCBATOUT +PW R_SRC_1D35V
PG4903
1 2 PG4908
1 2
GAP-CLOSE-PW R-3-GP
PG4904 GAP-CLOSE-PW R-3-GP
1 2 PG4909
1 2
GAP-CLOSE-PW R-3-GP
D PG4905 GAP-CLOSE-PW R-3-GP D
1 2 PG4910
PR4907 1 2 PW R_1D35V_EN 1 2
18,24,36 PM_SLP_S4# 0R0402-PAD GAP-CLOSE-PW R-3-GP
GAP-CLOSE-PW R-3-GP

1
PC4906 PG4911
DY SCD1U10V2KX-5GP 1 2
+PW R_SRC_1D35V

2
GAP-CLOSE-PW R-3-GP
PG4912
1 2
5V_S5
GAP-CLOSE-PW R-3-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
PG4913

2
PC4909

PC4911

PC4912
1 2
PC4913
3D3V_S0 SCD1U50V3KX-L-GP GAP-CLOSE-PW R-3-GP

1
1
PG4914
PC4901 1 2
SC1U10V2KX-L1-GP

2
1

5
6
7
8
GAP-CLOSE-PW R-3-GP

D
D
D
D
PR4904 PG4915
DY 20KR2F-L-GP PU4902 1 2
TPCC8067-H-GP
2 PU4901 84.08067.A37 GAP-CLOSE-PW R-3-GP

PR4605_2

G
36 1D35V_VTT_PW RGD 20 PGOOD V5IN 12 4 2nd = 84.00412.037

S
S
S
DDR_VTT_PG_CTRL 17 PR4905 PC4919 3rd = 84.07410.A37 Design Current=6.2A

3
2
1
S3 PW R_1D35V_VBST
15 1 2 1 2 SCD1U50V3KX-L-GP
C R4910 2 1 0R2J-2-GP PW R_1D35V_EN 16
VBST OCP<12.4A C
18,24,45,46 PM_SLP_S3# S5 2D2R3-1-U-GP
DY PW R_1D35V_VREF 6 14 PW R_1D35V_DRVH 1D35V_PW R
VREF DRVH
1

PL4902
PR4903
10KR2F-2-GP 13 PW R_1D35V_SW 1 2
SW
IND-1UH-94-GP
2

PW R_1D35V_REFIN PW R_1D35V_DRVL

PC4923

PC4924

PC4925

PC4926
8 11 68.1R01B.10K
30K1R2F-L-GP

GAP-CLOSE-PWR-3-GP
REFIN DRVL

2
2nd = 68.1R010.11A

SCD1U16V2KX-L-GP
SCD01U50V2KX-L-GP

5
6
7
8

1
PG4907

PC4921
PGND 10
2 PR4901 1

D
D
D
D
PW R_1D35V_MODE 19 PR4912
MODE DY
1

PU4903 2D2R5F-2-GP
PC4903
SCD1U16V2KX-L-GP

2
1D35V_PW R TPCC8065-H-GP
PC4902

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
2
1 PR4908 2

PW R_1D35V_TRIP 18 9 PW R_1D35V_VDDQS
2

TRIP VDDQSNS

PWR_1D35V_VDDQS
G
75KR2F-GP

4
1KR2F-L-GP

2 PR4902 1

S
S
S
TPS51716_PHS_SET
PR4601_1

VLDOIN 2
PW R_1D35V_VTTREF
5 +0D675V_DDR_P

3
2
1
VTTREF
1

1
3
0R0402-PAD

VTT
1

PC4922
PR4906

DY

SCD1U16V2KX-L-GP

SC10U6D3V5KX-1GP
1

1
SC10U10V5KX-L1-GP
PC4918 SC330P50V2KX-3GP

PC4915

PC4916

PC4917
1

2
SCD22U10V2KX-L1-GP VTTSNS PC4904
21 GND DY
2

4 SC10U6D3V3MX-L-GP
2

2
VTTGND
7 GND
TPS51716RUKR-GP 84.08065.B37
2nd = 84.00780.037
3rd = 84.07506.037
B B

20131007

+0D675V_DDR_P 0D675V_S0
PG4901

3D3V_S0 20131014
1 2

GAP-CLOSE-PW R-3-GP
Vinafix.com
PR4909 PG4902
1 2 DDR_VTT_PG_CTRL 1 2
10KR2J-3-GP
GAP-CLOSE-PW R-3-GP

State S3 S5 VDDR VTTREF VTT


S0 Hi Hi On On On
I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
S3 Lo Hi On On Off(Hi-Z) Inductor:CHIP CHOKE 0.68UH PCMC104T-R68MN 2.4~2.7mohm Isat =39Arms68.R6810.20G
S4/S5 Lo Lo Off Off Off O/P cap:CHIP CAP C 22U 6.3V M0805 X5R / 78.22610.51L
MOS: FET MOS FDMS3664S NC POWER56 / 84.03664.037 / Q1: 8.5~11mohm @Vgs=4.5V Q2: 2.6~3.2mohm @Vgs=4.5V
MODE
A <Core Design> A
PR4608 Frequency Discharge Mode
200k ohm 400kHz Wistron Corporation
Tracking Discharge
100k ohm 300kHz 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
68k ohm 300kHz
Non-tracking Discharge Title
47k ohm 400kHz
TPS51716_1D35V & 0D675V
Size Document Number Rev
A3
X00
Date: Thursday, April 10, 2014 Sheet 49 of 102
5 4 3 2 1
5 4 3 2 1

1D0V_S5 PW R_1D0V
PG5002
SB_20121105-1 1 2

GAP-CLOSE-PW R
PG5003
1 2
DCBATOUT PW R_DCBATOUT_1D0V

GAP-CLOSE-PW R
1
PG5001
2 SY8208D for 1D0V_S5 GAP-CLOSE-PW R

1
PG5004
2
D

1
PG5007

GAP-CLOSE-PW R
2 Enable=0.8V GAP-CLOSE-PW R

1
PG5005
2

1
PG5010

GAP-CLOSE-PW R
2 Disable=0.4V GAP-CLOSE-PW R

1
PG5006
2

PG5012 GAP-CLOSE-PW R
1 2 PG5008
1 2
GAP-CLOSE-PW R
GAP-CLOSE-PW R
PG5009
1 2

GAP-CLOSE-PW R
PW R_DCBATOUT_1D0V PG5011
1 2

GAP-CLOSE-PW R
1

PC5001 PC5002 PC5003


SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD01U50V2KX-L-GP
2

C
OCP setting C

High 16A
Float 12A
PU5001
Low 8A
Freq=800KHz Iomax =4A
PR5001
Mag. R68 7*7*3 OCP >8A
1KR2F-L-GP PR5002
PC5004
2D2R3F-L-GP DCR: 5 ~ 5.5 mOhm
3D3V_S5 2 1 8 6 PW R_1D0V_BOOT 1 2 PW R_1D0V_BOOT_R 1 2
IN BS Idc : 15.5 A , Isat : 25A PW R_1D0V
SCD1U50V3KX-L-GP
PL5001
10 PW R_1D0V_PHASE 1 2
18,51 1D0V_S5_PW RGD LX
68.R681A.10A
PW R_1D0V_VFB IND-D68UH-36-GP
OCP setting 0R2J-L-GP 2 PG FB 4

1
2ND = 68.R6810.20J

1
PR5003 1 2 PW R_1D0V_IMAX 3 7 PW R_1D0V_BYP PR5004 1 2 PC5005 PC5006 PC5007 PC5008 PC5009
Hi

ILMT BYP 3D3V_S0

SCD1U50V3KX-L-GP
PR5005 0R0402-PAD 3rd = 68.R681A.10X

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
2

2
L:

1 2 PW R_1D0V_EN 1
45 3V_5V_POK

2
EN PC5011
o0

0R0402-PAD 9 5 PW R_1D0V_LDO_P5
:.

GND LDO

SC220P50V2JN-3GP
08

1
.V
1

PC5010 SY8208DQNC-GP-U
4V
SC1KP50V2KX-L-1-GP

2
1
B B
74.08208.K73
2

PR5006
1

1
SB_20121105-1 PC5012 68K1R2F-1-GP
SC4D7U6D3V2MX-GP-U PC5013 R1
SC1U10V2KX-L1-GP
2

2
PWR_1D0V_VFB

1
100KR2F-L3-GP PR5007
Vo=0.6x(1+R1/R2)
R2 =0.6x(1+68.1/100)
=1.008V

2
modify schematic

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DC to DC_1D05V(SY8208D)
Size Document Number Rev
A3
LF14B SA
Date: Thursday, April 10, 2014 Sheet 50 of 102
5 4 3 2 1
5 4 3 2 1

1D8V_S5
SSID = PWR.Plane.Regulator_1p8v TLV70218DBVR for 1D8V_S5
Enable=0.9V PL5102 R5103
Disable=0.6V 1V8_RT8059_LX 1 2 1V8_RT8059_LX_R 1 2
3D3V_S5 IND-2D2UH-190-GP
R1 0R5J-5-GP

1
2nd: 68.2R21C.10K
DY

1
SC10U6D3V2MX-GP-U
PR5101 PR5105

PC5137
1 2 150KR2F-L-GP PC5134
18,50 1D0V_S5_PWRGD Io=20mA

1
PC5101

2
SC10U10V5KX-L1-GP
0R0402-PAD
DY DY

2
1

SCD1U16V2KX-L-GP
2
PC5103 1V8_RT8059_FB
PU5101 SC47P50V2JN-3GP
18,50 1D0V_S5_PWRGD

2
1
TLV70218DBVR-GP
DY R2

1
PC5111 74.70218.03F 1D8V_LDO 1D8V_S5 EN pin:
SCD1U10V2KX-L1-GP PR5102 Vih=1.5V (min) PR5104
R5102
2 0R0402-PAD Vil=0.4V (max) 75KR2F-GP
1 5 1 2
IN OUT
2 DY DY

2
D PWR_1D8V_EN GND PU5106 D
3 4

Hi
0R5J-5-GP

1
EN NC#4 PC5106 PC5107
DY 3D3V_S5

L:

SC10U6D3V5KX-2GP

SC10U10V5KX-L1-GP
PU5106_EN 1 5
EN FB PG5112

o0
DY 2

2
GND PU5106_VIN
3 4 1 2

:.
LX VIN

09

1
GAP-CLOSE-PWR

.V
PC5135 RT8059GJ5-GP
4V SCD047U25V2KX-GP

2
SC10U6D3V2MX-GP-U
DY

PC5136
PC5105
SCD1U16V2KX-L-GP

1
S-1339D15 for 1D5V_S0
Enable=1.0V
Disable=0.25V modify schematic
Wayler , 2013-0315
Io=50mA
Icc_Max:0.167A
TDC: 0.134A
1D5V_S0
OCP:0.217A
PWR_1D5V_PVDD 1D5V_LDO
3D3V_S5 PU5103
PG5105 PG5106
1 2 1 5 1 2
VIN VOUT
2
GAP-CLOSE-PWR VSS GAP-CLOSE-PWR
3 4
ON/OFF NC#4
Hi

1
PC5115 PC5116
L:

SC10U6D3V3MX-L-GP

SC1U10V2KX-L1-GP
S-1339D15-M5001-GP
1

PC5113 PC5114
o1

2
SC10U6D3V3MX-L-GP

SC1U10V2KX-L1-GP

:.

74.01339.B3F
00
2

.V25V

C C

1D35V_S0
PR5110
2 1 1D5V_S0_EN

10KR2J-L-GP
1

PC5118
SC22P50V2GN-GP
2

DY

SYW232 for 1D05V_S0 Iomax =1.8A


3D3V_S5
PG5107
PWR_1D05V_PVDD Enable=1.5V OCP <3.5A
1 2 PWR_1D05V_PVDD

GAP-CLOSE-PWR PU5104
Disable=0.4V
PG5108
74.00232.033
1 2 5 3 PWR_1D05V_PVDD
NC#5 IN
GAP-CLOSE-PWR PWR_1D05V 1D05V_S0
8 1 PWR_1D05V_FB
SGND FB PL5101
2 1D05V_S0_PG PG5109
1

PC5119 PC5120 PC5121 PG PWR_1D05V_PHASE


4 6 1 2 1 2
PGND LX
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC1U10V2KX-L1-GP

9 7 PWR_1D05V_S0_EN IND-1UH-145-GP
Hi

PGND EN GAP-CLOSE-PWR
68.1R050.10H
2

1
L:

PG5110
1

SYW232DFC-GP PR5111
o1

2nd = 68.1R050.10G 75KR2F-GP PC5122


1 2
:.

R1
SC22P50V2JN-4GP

3rd = 068.1R050.1020 GAP-CLOSE-PWR


05

2
.V

1D05V_S0
4V

AFTP5101 1
1

2
SCD1U25V2KX-GP
PWR_1D05V_FB PC5123 PC5124 PC5126 PC5127 PC5102
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

PR5112
DY DY AFTE14P-GP
37 1D0V_S0_PG 1 2
2

1
1

0R0402-PAD PR5113 20131018


PWR_1D05V_EN
1

100KR2F-L3-GP
PC5125 R2
3D3V_S5 SC22P50V2GN-GP
2

DY
2
1

PR5114
100KR2J-4-GP
Close Pin1
B B
Vo=0.6x(1+R1/R2)
2

=0.6x(1+75/100)
1D05V_S0_PG =1.05
1D05V_S0_PG 36,37

PWR_1D05V_GOOD

RT9025 for 1D8V_S5

5V_S5

3D3V_S0 PWR_1D8V_2_PVDD
1

PG5102
eMMC
1 2 0R2J-2-GP
PWR_1D8V_2_PVDD
GAP-CLOSE-PWR PR5115
2

PWR_1D8V_2_PVDD Design Current = 0.5A


1

PC5108
2A<OCP
1
SC10U6D3V5KX-2GP

PC5132
eMMC SC1U6D3V2KX-GP
2

PWR_1.8V_VDD

eMMC
2
1

1D8V_2_S0
A PR5118 A

eMMC 10KR2J-L-GP
1D8V_LDO2
2

PG5111
PWR_1D8V_2_S0_EN PU5105 1 2
1

5 PC5129 GAP-CLOSE-PWR
1

NC#5
SC100P50V2JN-3GP

PC5131 4 6 PC5109 PC5130 PC5128 PC5133


3D3V_S0 VDD VOUT DY
SC10U6D3V5KX-2GP

SC10U6D3V5KX-2GP

SCD1U25V2ZY-1GP

SC2200P50V2KX-2GP

SCD1U25V3KX-GP 3 7 PR5117
DY DY
2

VIN ADJ 14KR2F-GP


2 8 DY
2

EN GND
eMMC 1 9 eMMC eMMC
1

PGOOD GND Wistron Confidential document, Anyone can not


2

PR5109 Duplicate, Modify, Forward or any other purpose


2K2R2J-2-GP RT9025-25ZSP-1-GP PWR_1.8V_ADJ <Core Design>application without get Wistron permission
eMMC
74.09025.D3D
1
2

PR5116 Wistron Corporation


PWR_1D8V_PG eMMC eMMC 11K3R2F-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2

Title

LDO_1D8V&1D5V(RT9025)
Size Document Number Rev
Custom
LF14B SA
Date: Thursday, April 10, 2014 Sheet 51 of 102
5 4 3 2 1
SSID = VIDEO
SSID = VIDEO LCD POWER (Do Not use SW 74.09724.09F) Level shift
Layout 40 mil CAMERA POWER Close to eDP connector
Layout 40 mil
3D3V_S0 1D8V_S0 1D8V_S0
Level shift
INVERTER POWER LCD_BRIGHTNESS LCDVDD 3D3V_S0 3D3V_S0 1D8V_S0

1
DCBATOUT

1
DCBATOUT_LCD 3D3V_CAMERA_S0 3D3V_S5 U5201 R5221 R5240

1
F5201 R5207 2K2R2J-L1-GP 2K2R2J-L1-GP R5236
POLYSW-1D1A24V-GP-U LVDS_VDD_EN 1 2 LCDVDD_EN 1 5 100KR2J-4-GP R5250 R5254
R5219 0R0402-PAD EN IN LVDS_VDD_EN_B 2K2R2J-L1-GP 2K2R2J-L1-GP
2 1 DY 2 DY DY

B 2
GND
69.50007.A31 1 2 3 4 DY

2
OUT NC#4

1
2nd = 69.50007.A41 0R3J-0-U-GP EC5202 TOUCH_INT_B

SC33P50V2JN-3GP

B 2
1

1
SC4D7U25V5KX-GP

SC1KP50V2KX-1GP

SCD1U50V3KX-L-GP

SC68P50V2JN-1GP
C5206 C5204 C5205 FC5211 3D3V_S0
DY

1
SCD1U16V2KX-3GP
R5218 R5214 C5209 C5208 SY6288C6AAC-GP LVDS_VDD_EN C E DY
DY DY

2
LVDS_VDD_EN_CPU 8
1 2 100KR2J-1-GP
DY

SC4D7U6D3V3KX-GP
2

2
0R3J-0-U-GP C5207 Q5202 TOUCH_RST_C
DY 74.06288.B7F C E

2
TOUCH_INT_CPU 16

SC4D7U6D3V3KX-L-GP
U5204 LMBT3904LT1G-GP R5237

2
R5222 100KR2J-4-GP Q5204
84.T3904.H11

2
1 2 3D3V_S0_CAMERA 1 5 LMBT3904LT1G-GP
DY 0R3J-0-U-GP 2
OUT IN 2nd = 84.03904.E11

1
GND
3
OC# EN/EN#
4 CAMERA_EN 24 84.T3904.H11

1
C5231
SC4D7U6D3V3KX-GP

1
SY6288CAAC-GP C5249

2
74.06288.07F SC4D7U6D3V3KX-L-GP
3D3V_S0 1D8V_S0

2
3D3V_S0 1D8V_S0

1
Panel BL brightness/Power En/BL En R5233 R5235

1
2K2R2J-L1-GP 2K2R2J-L1-GP

eDP connector R5244


2K2R2J-L1-GP
DY DY R5246
2K2R2J-L1-GP

B 2
L_BKLT_CTRL_B
R5203

B 2
1 2 BLON_OUT_C TOUCH_RST_B
2-lane eDP Compare with LM440T 12306-1: 24 BLON_OUT
1KR2J-1-GP L_BKLT_CTRL C E L_BKLT_CTRL_CPU 8 DY
Q5203 TOUCH_RST
BLON_OUT_C:LM440T PCH->EC->PANEL C E TOUCH_RST_CPU 16

2
LMBT3904LT1G-GP
R5229 Q5207
R5208
84.T3904.H11 LMBT3904LT1G-GP
eDP_HPD:LM440T & LE443 invert to eDP_HPD# 1MR2J-L3-GP

1
2nd = 84.03904.E11

SC100P50V2JN-3GP
L_BKLT_CTRL 1 2 L_BKLT_CTRL_1 C5210
0R0402-PAD 84.T3904.H11

1
1

2
R5230
Need Check I2C Gsensor Power source

100KR2J-1-GP
1 AFTP5225 AFTE14P-GP
and determine whether to add I2C block Circuit

2
eDP_AUXN_CPU_C 1 AFTP5210 AFTE14P-GP
LCDVDD_R 1 AFTP5201 AFTE14P-GP eDP_AUXP_CPU_C 1 AFTP5209 AFTE14P-GP

1
DCBATOUT_LCD USB_HUB_PP2 1 eDP_TXN1_CPU_C 1 AFTP5207 AFTE14P-GP C5248
AFTP5204 AFTE14P-GP
USB_HUB_PN2 1 AFTP5203 AFTE14P-GP eDP_TXP1_CPU_C 1 AFTP5206 AFTE14P-GP SC100P50V2JN-3GP
ACES-CON40-18-GP DCBATOUT_LCD 1 eDP_TXN0_CPU_C 1 AFTP5205 AFTE14P-GP

2
AFTP5235 AFTE14P-GP
42 BLON_OUT_C 1 eDP_TXP0_CPU_C 1 AFTP5202 AFTE14P-GP
AFTP5243 AFTE14P-GP
LCD_BRIGHTNESS 1 20131007
AFTP5242 AFTE14P-GP
40 DMIC_DATA 1 AFTP5237 AFTE14P-GP
39 DMIC_CLK 1 AFTP5236 AFTE14P-GP
38
37
36 3D3V_AUX _S5_HALL 3D3V_CAMERA_S0 1
AFTP5208 AFTE14P-GP
35 R5202 1KR2J-1-GP DMIC1_VCC 1 AFTP5232 AFTE14P-GP
34 LID_CLOSE#_C 2 1 LID_CLOSE# 24 3D3V_GSENSE 1 AFTP5233 AFTE14P-GP
33 LCD_BRIGHTNESS 1 R5215 2 L_BKLT_CTRL_1 3D3V_AUX _S5_HALL1 AFTP5234 AFTE14P-GP
32 BLON_OUT_C 33R2J-2-GP EDP_DCR_EN 1 AFTP5245 AFTE14P-GP
31 I2C_GSENSE_INT_C 0R0402-PAD 2 1 R5204 I2C_GSENSE_INT 24,67
30 SML1_DATA 24,26,35,62,76
29 R5231
SML1_CLK 24,26,35,62,76
28 DMIC1_VCC 1 2 3D3V_S0
27 0R2J-2-GP
DMIC_DATA 27
26 R5294
DMIC_CLK 27

1
SCD1U16V2KX-3GP
25 C5246 R5205 Touch_3V3 1 2 3D3V_S0
24 USB_PP7_eDP 1 2 0R2J-2-GP
23 USB_PN7_eDP 0R2J-2-GP
3D3V_S5 DY
DY

2
CHECK PIN24 22 TOUCH_RST_C
21 USB_HUB_PN2
USB_HUB_PN2 35
20 USB_HUB_PP2
19
USB_HUB_PP2 35
R5234 U5205 TOUCH
18 eDP_AUXN_CPU_C C5245 1 2 SCD1U16V2KX-L-GP 3D3V_GSENSE 1 2 3D3V_S0
eDP_AUXN_CPU 8
17 eDP_AUXP_CPU_C C5227 1 2 SCD1U16V2KX-L-GP 0R0402-PAD R5223 1 2 3D3V_S0_Touch 1 5
eDP_AUXP_CPU 8 OUT IN
1
SCD1U16V2KX-3GP

16 DY C5247 0R0603-PAD 2 R5225


eDP_TXN1_CPU_C C5214 1 GND
15 2 SCD1U10V2KX-4GP eDP_TXN1_CPU 8 3 4 TOUCH_RST 1 2 LID_CLOSE#
OC# EN/EN#

1
14 eDP_TXP1_CPU_C C5213 1 SCD1U10V2KX-4GP
2DY eDP_TXP1_CPU 8 C5243 0R3J-0-U-GP
2

SC4D7U6D3V3KX-L-GP
13
TOUCH TOUCH

1
12 eDP_TXN0_CPU_C C5234 1 2 SCD1U16V2KX-L-GP eDP_TXN0_CPU 8 SY6288CAAC-GP

2
C5233
11 eDP_TXP0_CPU_C C5230 1 2 SCD1U16V2KX-L-GP eDP_TXP0_CPU 8 74.06288.07F
10 R5242 SC4D7U6D3V3KX-GP

2
9 EMB_HPD_R R5243 1 2 0R0402-PAD 3D3V_AUX _S5_HALL 1 DY 2
8 EDP_DCR_EN
EMB_HPD 8
1KR2J-1-GP
3D3V_AUX_S5 TOUCH
1
SCD1U16V2KX-3GP

7 C5244
6 DMIC1_VCC
5 3D3V_CAMERA_S0 D5202
2

4 Touch_3V3 K A R5226
3 3D3V_GSENSE TOUCH_RST_C 1 2
2 RB551V30-GP DY 0R3J-0-U-GP
R5228
1 LCDVDD_R 1 2 LCDVDD
83.R5003.H8H
0R0603-PAD 2nd = 83.5R003.08F
41
1

C5223 C5225
SCD1U16V2KX-L-GP

SC1U10V2KX-L1-GP

EDP1
2

20.K0678.040

EU5201

DMIC_DATA 1 6 USB_HUB_PP2 3D3V_S0


I/O1 I/O4
2
GND DYVDD 5

DMIC_CLK 3 4 USB_HUB_PN2
USB_PP7_eDP I/O2 I/O3
1 R5292 2 0R2J-L-GP USB_PP2 35
USB_PN7_eDP 1 R5245 2 0R2J-L-GP USB_PN2 35
AZC099-04S-1-GP

TOUCH_INT_C 1 AFTP5238 AFTE14P-GP


TOUCH_RST_C 1 AFTP5239 AFTE14P-GP
Touch_3V3 1 AFTP5240 AFTE14P-GP
USB_PP2 1 AFTP5241 AFTE14P-GP
USB_PN2 1 AFTP5244 AFTE14P-GP

EU5202
1
TOUCH_INT_C 1 6 3D3V_S0 AFTP5226 AFTE14P-GP
I/O1 I/O4
2 5
GND VDD
TOUCH_RST_C
DY
3 4
I/O2 I/O3

AZC099-04S-1-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LCD Connector
Size Document Number Rev
A1
LF14B SC
Date: Wednesday, April 16, 2014 Sheet 52 of 102
5 4 3 2 1

D D

C C

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CRT Board Connector


Size Document Number Rev
Custom
LF14B SC
Date: Tuesday, October 22, 2013 Sheet 53 of 102
5 4 3 2 1
5 4 3 2 1

SSID = VIDEO
HDMI CONNECTOR 5V_CRT_PH Q5404
AO3413L-GP
5V_S0

S D
HDMI1 1 HDMI_CEC
AFTE14P-GP AFTP5414 HDMI_DATA2_R_C
22
AFTE14P-GP AFTP5401
1
HDMI_DATA2_R_C#
84.03413.B31
20 1

G
1

1
SCD1U16V2KX-L-GP
AFTE14P-GP AFTP5402 HDMI_DATA1_R_C C5410 C5411
1 2ND = 84.00048.031

SC4D7U6D3V3KX-GP
HDMI_DATA2_R_C AFTE14P-GP AFTP5403 HDMI_DATA1_R_C#
1 1 DY

2Q5105_VDD_EN#
AFTE14P-GP AFTP5404 1 HDMI_DATA0_R_C

2
2 AFTE14P-GP AFTP5405 1 HDMI_DATA0_R_C#
HDMI_DATA2_R_C# AFTE14P-GP AFTP5406 HDMI_CLK_R_C
HDMI Passive Level Shifter
Close to HDMI Connector
3
4
5
6
HDMI_DATA1_R_C

HDMI_DATA1_R_C#
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTP5407
AFTP5408
AFTP5409
1
1
1
1
HDMI_CLK_R_C#
DDC_CLK_HDMI
DDC_DATA_HDMI
D 7 HDMI_DATA0_R_C AFTE14P-GP AFTP5410 1 5V_HDMI D

2
8 AFTE14P-GP AFTP5411 1 HPD_HDMI_CON
9 HDMI_DATA0_R_C# AFTE14P-GP AFTP5412 1 R5413 R5414
10 HDMI_CLK_R_C AFTE14P-GP AFTP5413 10KR2J-3-GP 10KR2J-3-GP
11
12 HDMI_CLK_R_C#

1
C5402 1 2 HDMI_CLK_C 13 HDMI_CEC
8 DDBP_DATA3 HDMI_CLK_C# Q5101_VDD_EN#
C5403 1 2 SCD1U16V2KX-L-GP 14 5V_HDMI 5V_CRT_PH 5V_S0
8 DDBP_DATA3# DDC_CLK_HDMI
SCD1U16V2KX-L-GP 15
C5404 1 2 HDMI_DATA0_C# 16 DDC_DATA_HDMI D5402

D
8 DDBP_DATA0#
C5405 1 2 SCD1U16V2KX-L-GP HDMI_DATA0_C 17 F5401 DY
8 DDBP_DATA0
SCD1U16V2KX-L-GP 18 5V_HDMI 2 1 K A Q5405 5V_S0
C5406 1 2 HDMI_DATA1_C 19 HPD_HDMI_CON 2N7002BK-GP
8 DDBP_DATA1
C5407 1 2 SCD1U16V2KX-L-GP HDMI_DATA1_C# POLYSW-1D1A8V-1-GP G
8 DDBP_DATA1#

1
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP 21 69.60040.011 RB551V30-1-GP 84.07002.I31
C5408 1 HDMI_DATA2_C# C5401
8 DDBP_DATA2#
C5409 1
2
HDMI_DATA2_C
23 083.55130.008F 2ND = 84.2N702.A31
2 SCD1U16V2KX-L-GP

2
8 DDBP_DATA2
SCD1U16V2KX-L-GP SKT-HDMI23-97-GP R5404 1
DY 2

S
0R3J-0-U-GP
22.10296.A31

8
7
6
5

8
7
6
5
RN5401 RN5402 HDMI_DATA2_R_C R5406 1
DY HDMI_DATA2_R_C#
2
SRN620J-GP SRN620J-GP DY 180R2F-1-GP
HDMI_DATA1_R_C R5407 1 2 HDMI_DATA1_R_C#
DY 180R2F-1-GP
HDMI_DATA0_R_C R5408 1 2 HDMI_DATA0_R_C#

1
2
3
4

1
2
3
4
DY 180R2F-1-GP
HDMI_CLK_R_C R5409 1 2 HDMI_CLK_R_C#
180R2F-1-GP

HDMI_PLL_GND

C C

HDMI DDC Passive Level Shifter 5V_S0


D5401
BAW56-5-GP
1DDC_CLK_HDMI_R

3
Level shift
2
1D8V_S0
83.00056.Q11
HPD_HDMI_CON 1 R5421 2 HDMI_HPD_G 2nd = 83.00056.G11 DDC_DATA_HDMI_R
1

0R0402-PAD
R5422 1D8V_S0
Q5407
10KR2J-L-GP

3
4
close to connector G
2
2

D RN5407
HDMI_PCH_DET 8
R5412 SRN2K2J-5-GP
100KR2J-4-GP S

G
84.05067.031

2
1
1
1

2N7002K-2-GP R5420
84.2N702.J31 100KR2J-1-GP DDC_DATA_HDMI D S PCH_HDMI_DATA 8,15
2ND = 84.2N702.031 DY
2

Q5406
DMN5L06K-7-GP
1D8V_S0

G
84.05067.031

DDC_CLK_HDMI D S
B 3D3V_S0 PCH_HDMI_CLK 8 B

R5402 1 Q5408
DY 2
100KR2J-1-GP
Q5409 DMN5L06K-7-GP
G

D HDMI_PLL_GND

2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031

HDMI_CLK_C 1 R5405 2 HDMI_CLK_R_C HDMI_DATA1_C 1 R5418 2 HDMI_DATA1_R_C HDMI_CLK_R_C#


0R0402-PAD 0R0402-PAD HDMI_CLK_R_C
HDMI_DATA0_R_C
HDMI_DATA0_R_C#

HDMI_DATA1_R_C#
HDMI_DATA1_R_C
HDMI_DATA2_R_C
HDMI_DATA2_R_C#

HDMI_CLK_C# 1 R5415 2 HDMI_CLK_R_C# HDMI_DATA1_C# 1 R5419 2 HDMI_DATA1_R_C#


0R0402-PAD 0R0402-PAD ED5401
HDMI_CEC 1 8 HDMI_CEC
ED5403 ED5402 DDC_CLK_HDMI L1#1L1#8 DDC_CLK_HDMI
2 7
L2#2L2#7
1 8 1 8 G1 G2
L1#1L1#8 L1#1L1#8 DDC_DATA_HDMI GNDGND DDC_DATA_HDMI
2 7 2 7 3 6
L2#2L2#7 L2#2L2#7 HPD_HDMI_CON L3#3L3#6 HPD_HDMI_CON
G1 G2 G1 G2 4 5
A HDMI_DATA0_C HDMI_DATA0_R_C HDMI_DATA2_C HDMI_DATA2_R_C GNDGND GNDGND L4#4L4#5 A
1 R5410 2 1 R5411 2 3 6 3 6
0R0402-PAD 0R0402-PAD L3#3L3#6 L3#3L3#6
4 5 4 5
L4#4L4#5 L4#4L4#5
RCLAMP0524PATCT-1-GP

RCLAMP0524PATCT-1-GP RCLAMP0524PATCT-1-GP 75.00524.073


75.00524.073 75.00524.073 <Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
HDMI_DATA0_C# 1 R5417 2 HDMI_DATA0_R_C# HDMI_DATA2_C# 1 R5416 2 HDMI_DATA2_R_C# Title
0R0402-PAD 0R0402-PAD
HDMI Level Shifter/Connector
Size Document Number Rev
A2
LF14B SC
Date: Thursday, April 10, 2014 Sheet 54 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TRAVIS
Size Document Number Rev
A2
LF14B SC
Date: Tuesday, October 22, 2013 Sheet 55 of 102
5 4 3 2 1
SSID = SATA
SATA HDD Connector
R5601
HDD1
5V_S0 1 2 5V_S0_HDD
P1 V33 23 23
0R0805-PAD P2 V33 24 24

1
SC10U10V5KX-L1-GP

SCD1U16V2KX-L-GP
C5605 C5606 P3 V33
P7

2
V5
P8 V5
P9 V5
P13 V12 GND S1
P14 V12 GND S4
P15 V12 GND S7
P4 ED5602
GND
GND P5
C5601 1 2 SCD01U50V2KX-L-GP SATA_TXP0_C S2 P6 SATA_TXP0_C 1 10 SATA_TXP0_C 2013/9/12
19 SATA_TXP0 C5602 SCD01U50V2KX-L-GP SATA_TXN0_C A+ GND SATA_TXN0_C IN1 NC#10 SATA_TXN0_C
1 2 S3 A- GND P10 2 IN2 NC#9 9 Add Reserved U5602
19 SATA_TXN0 P12 3 8
GND GND GND TVS near HDD connector
C5604 1 2 SCD01U50V2KX-L-GP SATA_RXP0_C S6 R5608 SATA_RXN0_C 4 7 SATA_RXN0_C
19 SATA_RXP0 SCD01U50V2KX-L-GP SATA_RXN0_C B+ IN3 NC#7
C5603 1 2 S5 B- DAS/DSS P11 HDD_DAS_DSS
1 2 SATA_RXP0_C 5 IN4 NC#6 6 SATA_RXP0_C
19 SATA_RXN0
0R0402-PAD
SKT-SATA7P-15P-121-GP TVW DF1004AD0-1-GP
75.01004.073
22.10300.H41

Vinafix.com

ODD Connector Need Check 2spindle series & Components SATA Zero Power ODD
ODD_PW R_5V
SATA_RX- and SATA_RX+ Trace R5607
Length match within 20 mil 1
DY
2
Mars: PG5601
Exchange ODD and ESATA differential pair each other. 0R5J-5-GP
1 2
5V_S0 U5601
GAP-CLOSE-PW R 100 mil
PG5602 2 6
Follow Intel Zero Power ODD SPEC 1 2 ODD_PW R_5V_IN 3
IN#2
IN#3
OUT#6
OUT#7
OUT#8
7
8

1
GAP-CLOSE-PW R
SATA_ODD_PRSNT# 19
TC5601 PG5603 4
ODD
EN/EN#
1

SC10U10V5KX-L1-GP 1 2 1
ODD (M50/U50)

2
R5604 GND
5 FLT# GND 9
10KR2J-3-GP ODD GAP-CLOSE-PW R
DY TPS2001CDGNR-GP
2

74.02001.079

Current limit
3D3V_S0
16 SATA_ODD_PW RGT Active High
FCH integrated PU typ =>2A
1

R5602
ODD 47KR2J-2-GP
2

R5603
SATA_ODD_DA#_C 1 DY 2
0R2J-2-GP
SATA_ODD_DA# 24

SATA_ODD_PRSNT# 1
SATA_ODD_DA#_C 1 AFTP5605 AFTE14P-GP
3D3V_S0 5V_S0 ODD_PW R_5V 1 AFTP5606 AFTE14P-GP
1 AFTP5607 AFTE14P-GP
AFTP5609 AFTE14P-GP
1

R5605 R5606
100KR2J-1-GP 100KR2J-1-GP
ODD ODD
DY 1 ODDCN1
2

AFTP5608 AFTE14P-GP 13 ODD SCD01U50V2KX-L-GP


SATA_TXP1_C58 C5609 SATA_TXP1
ODD_PWRGT#

SATA_ODD_DA#_C 1 1 2 SATA_TXP1 19
ODD SCD01U50V2KX-L-GP
2 SATA_TXN1_C58 C5610 1 2 SATA_TXN1 SATA_TXN1 19
3
SATA_RXN1_C58 C5611
ODD SCD01U50V2KX-L-GP SATA_RXN1 SATA_RXN1 19
4 1ODD2
3D3V_S0 5 SATA_RXP1_C58 C5612 1 2 SCD01U50V2KX-L-GP SATA_RXP1 SATA_RXP1 19
6

RN5601 6
Q5601 SRN10KJ-5-GP 7 SATA_ODD_PRSNT# 19
ODD 2N7002KDW -GP SATA_ODD_PW RGT 4 1 8 SATA_ODD_DA#_C ODD_PW R_5V
84.2N702.A3F SATA_ODD_DA# 3 2 9
10
1

2nd = 84.2N702.F3F ODD 11 <Core Design>


12
14
SUPPORT ZERO SATA ODD ACES-CON12-21-GP Wistron Corporation
SATA_ODD_PW RGT SATA_ODD_DA# SATA_TXP1_C58 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
20.K0422.012 SATA_TXN1_C58
1
AFTP5610 AFTE14P-GP Taipei Hsien 221, Taiwan, R.O.C.
2nd = 20.K0391.012 SATA_RXP1_C58
1
AFTP5611 AFTE14P-GP
1
SATA_RXN1_C58 1 AFTP5612 AFTE14P-GP Title
AFTP5613 AFTE14P-GP
HDD / ODD / NGFF_SSD
Size Document Number Rev
Custom
LF14B SC
Date: W ednesday, April 16, 2014 Sheet 56 of 102
5 4 3 2 1

D D

C C

B B

<Core Design>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

E-SATA
Size Document Number Rev
A4
LF14B SC
Date: Tuesday, October 22, 2013 Sheet 57 of 102
5 4 3 2 1
5 4 3 2 1

3D3V_S5 3D3V_WLAN

AOAC
Q5803
D D

SCD1U10V2KX-5GP

1
AO3413L-GP

100KR2J-1-GP
AOAC AOAC

1
S D
C5811 R5802
84.03413.B31

G
2ND = 84.00048.031

WLAN_PWRON#_C

1
AOAC AOAC R5819 AOAC Change to 100K (TBC)

1
10KR2J-3-GP
Q5801 R5820

2
C WLAN_PWRON#
WLAN_PWRON B R1 100KR2J-1-GP
24 WLAN_PWRON

1
E

100KR2J-1-GP

2
R2
DY
PDTC115EE-1-GP
R5803

2
20131018

3D3V_S0 3D3V_WLAN

R5821
1 2
0R0603-PAD

NON AOAC

3D3V_WLAN

C C

B
3D3V_WLAN Q5802

R1
PDTC115TE-GP
3D3V_WLAN

C
E
1

C5813 C5810
SC1U10V2KX-L1-GP

C5812
SC10U6D3V3MX-GP

PCIE_CLK_WLAN_REQ#_R
SCD1U16V2KX-L-GP

CLK_PCIE_WLAN_REQ# 19
2

DY WLAN1 1 2
R5823 DY 0R2J-2-GP
NP2 NP2 NP1 NP1

76 76 77 77
74 3_3V GND 75
72 3_3V REFCLKN1 73
70 PEWAKE1#_0/3_3V REFCLKP1 71
68 CLKREQ1#_0/3_3V GND 69
66 PERST1#_0/3_3V PETN1 67
64 RESERVED#64 PETP1 65
62 ALERT_0/3_3 GND 63
60 I2C_CLK_0/3_3 PERN1 61
58 I2C_DATA_0/3_3 PERP1 59
24 WIRELESS_EN 56 W_DISABLE#1_0/3_3V GND 57
24 BT_DISABLE# R5810 1 2 0R0402-PAD BT_DISABLE#_R 54 55 PCIE_WAKE#_1 R5808 1 2 0R0402-PAD PMC_WAKE_PCIE_2#_C 18
RESERVED/W_DISABLE#2_0/3_3V PEWAKE0#_0/3_3V PCIE_CLK_WLAN_REQ#_R
18,24,30,35,65,76 PLT_RST# 52 PERST0#_0/3_3V CLKREQ0#_0/3_3V 53
50 SUSCLK/32KHZ_0/3_3V GND 51
48 COEX1_0/1_8V REFCLKN0 49 CLK_PCIE_WLAN# 18
24 E51_RxD R5804 2 DY 1 0R2J-L-GP E51_RxD_R 46 47
COEX2_0/1_8V REFCLKP0 CLK_PCIE_WLAN 18
24 E51_TxD R5805 2 DY 1 0R2J-L-GP E51_TxD_R 44 45
COEX3_0/1_8V GND PCIE_WAKE#_1
42 CLINK_CLK PETN0 43 PCIE_RXN2 19
40 CLINK_DATA PETP0 41 PCIE_RXP2 19
38 39 PCIE_CLK_WLAN_REQ#_R 1
CLINK_RESET GND AFTE14P-GP AFTP5803
36 GND PERN0 37 PCIE_TXN2 19
PLT_RST# 34 35 PCIE_TXP2 19
DP_ML0P PERP0 PCIE_WAKE#_1
32 DP_ML0N GND 33 AFTE14P-GP AFTP5804 1

1
WIRELESS_EN 30 31 1 BT_DISABLE#_R
GND DP_HPD_0/3_3V AFTE14P-GP AFTP5805
28 29 C5806 C5805 1 PCIE_CLK_WLAN_REQ#_R
DP_ML1P GND AFTE14P-GP AFTP5806

SC82P50V2JN-3GP

SC82P50V2JN-3GP
BT_DISABLE# 26 27 1 CLK_PCIE_WLAN#
2 AFTE14P-GP AFTP5807

2
DP_ML1N DP_ML2P CLK_PCIE_WLAN
24 GND DP_ML2N 25 DY DY AFTE14P-GP AFTP5808 1
WIRELESS_EN
22 DP_AUXP GND 23 AFTE14P-GP AFTP5809 1
20 21 1 PLT_RST#
DP_AUXN DP_ML3P AFTE14P-GP AFTP5810
1

18 GND DP_ML3N 19
C5804 C5803 C5802 16 17 WLAN_DP_MLDIR 1 2
B LED#2 DP_MLDIR B
SC82P50V2JN-3GP

SC82P50V2JN-3GP

SC82P50V2JN-3GP

R5814 0R2J-2-GP PCIE_RXN2


DY 1
2

AFTE14P-GP AFTP5811 PCIE_RXP2


DY DY DY AFTE14P-GP AFTP5812
1
6 LED#1 GND 7
4 3_3V USB_D- 5 USB_HUB_PN1 35
2 3_3V USB_D+ 3 USB_HUB_PP1 35
1 1 PCIE_TXN2
NGFF_KEY_A 75P GND AFTE14P-GP AFTP5815 PCIE_TXP2
1
AFTE14P-GP AFTP5816 USB_HUB_PN1
AFTE14P-GP AFTP5817 1
SKT-NGFF75P-32-GP 1 USB_HUB_PP1
AFTE14P-GP AFTP5818

062.10003.0021
1

DY 1 WLAN_DP_MLDIR
ESDR0502BT1G-GP AFTE14P-GP AFTP5823
D5801
3

ESD RESERVED

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MINICARD(WLAN)
Size Document Number Rev
Custom
LF14B SC
Date: Wednesday, April 16, 2014 Sheet 58 of 102
5 4 3 2 1
5 4 3 2 1

SSID = Wireless Mini Card Connector(mSATA)


D D

C C

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

WWAN CONN
Size Document Number Rev
A4
LF14B SC
Date: Tuesday, October 22, 2013 Sheet 59 of 102
5 4 3 2 1
5 4 3 2 1

SSID = mSATA
Mini Card Connector(mSATA)
D D

C C

B B

<Core Design>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

mSATA Connector
Size Document Number Rev
A4
LF14B SC
Date: Tuesday, October 22, 2013 Sheet 60 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LED Bard/Power Button


Size Document Number Rev
A3
LF14B SC
Date: Tuesday, October 22, 2013 Sheet 61 of 102
5 4 3 2 1
5 4 3 2 1

SSID = KBC Internal KeyBoard Connector

KROW[0..7] 24

KCOL[0..17] 24

KBCN40
Check Date:2013/9/15
28
1 CAP_LED_C 26
AFTE14P-GP
AFTE14P-GP
AFTP6241
AFTP6240
1
1
CAP_LED_3V3
KCOL15
25
24
14" (Ref. Chicony G40 BL KB CCY 2D 0905 X7)
AFTE14P-GP AFTP6201 1 KCOL10 23
AFTE14P-GP AFTP6202 1 KCOL11 22
AFTE14P-GP AFTP6203 1 KCOL14 21 KCOL3 EC6201 1 2SC100P50V2JN-3GP
AFTE14P-GP AFTP6204 1 KCOL13 20 KCOL4 EC6202 1 2SC100P50V2JN-3GP
AFTE14P-GP AFTP6205 1 KCOL12 19
M40 KCOL6 EC6203 1 2SC100P50V2JN-3GP
AFTE14P-GP AFTP6206 1 KCOL3 18 KCOL7 EC6204 1 2SC100P50V2JN-3GP
AFTE14P-GP AFTP6207 1 KCOL6 17
020.K0035.0026 KCOL8 EC6205 1 2SC100P50V2JN-3GP
D AFTE14P-GP AFTP6208 1 KCOL8 16 D
AFTE14P-GP AFTP6209 1 KCOL7 15
AFTE14P-GP AFTP6210 1 KCOL4 14
AFTE14P-GP AFTP6211 1 KCOL2 13
AFTE14P-GP AFTP6212 1 KROW0 12
AFTE14P-GP AFTP6213 1 KCOL1 11
AFTE14P-GP AFTP6214 1 KCOL5 10
AFTE14P-GP AFTP6215 1 KROW3 9
AFTE14P-GP AFTP6216 1 KROW2 8
AFTE14P-GP AFTP6217 1 KCOL0 7
AFTE14P-GP AFTP6218 1 KROW5 6 CAP LED:all series For EMC Recommend
AFTE14P-GP AFTP6219 1 KROW4 5
AFTE14P-GP AFTP6220 1 KCOL9 4
AFTE14P-GP AFTP6221 1 KROW6 3 U6201
AFTE14P-GP AFTP6222 1 KROW7 2 G NUM_LED_C 1
AFTE14P-GP AFTP6223 24 CAP_LED NUM_LED_3V3 AFTP6243 AFTE14P-GP
1
1 KROW1 1 D CAP_LED_C AFTP6242 AFTE14P-GP
AFTE14P-GP AFTP6224 1 27
AFTE14P-GP AFTP6225 S
AFTP6201~AFTP6225
ACES-CON26-23-GP-U 2N7002K-2-GP
84.2N702.J31 CLOSE keyboard connector

Keyboard Backlight CN
DY DY Check Date:2013/9/15
R6230
1 R6225
2 KB_BKLT_POWER 1 2 KB_BL_LED+
Ref. Chicony G40 BL KB CCY 2D 0905 X7
5V_S0
0R3J-0-U-GP
330R3J-L-GP

3D3V_S0 1 R6226
2
0R3J-0-U-GP
DY
KB_BKLT_PWM
24 KB_BKLT_PWM KB_BL_LED-
1
DY AFTE14P-GP AFTP6227 1 KB_BL_LED+
G

AFTE14P-GP AFTP6228
U6203

S D KB_BL_LED-

2N7002BK-GP

84.07002.I31

C C

KBCN50
3D3V_S0
32
M50/U50 NUM_LED_C 30 Check Date:2013/9/15
2 1 R6208 NUM_LED_3V3 29
330R2J-3-GP CAP_LED_C 28
2 1 R6207 CAP_LED_3V3 27
330R2J-3-GP 1 KCOL17 26
AFTE14P-GP
AFTE14P-GP
AFTP6229
AFTP6230
1 KCOL16
KCOL15
25
24
15" (Ref. Chicony G50 NBL KB CCY 2D 0904 X8)
KCOL10 23
KCOL11 22
KCOL14 21
KCOL13 20
KCOL12 19
M50
KCOL3 18
KCOL6 17
020.K0035.0030
KCOL8 16
KCOL7 15
KCOL4 14
KCOL2 13
KROW0 12
KCOL1 11
KCOL5 10
KROW3 9
KROW2 8 U6202
KCOL0 7 G
KROW5 6
24 NUM_LED M50/U50
KROW4 5 D NUM_LED_C
KCOL9 4
KROW6 3 S
KROW7 2
2N7002K-2-GP
KROW1 1 84.2N702.J31
31 2nd = 84.2N702.W31

ACES-CON30-22-GP-U

20131007

SSID = Touch.Pad
TouchPad
R6201
B 5V_S0 1 DY 2
0R2J-2-GP
Check Date:2013/9/18 B

Ref. SPEC:KGDFF0106A11B0 31A


3D3V_S0 1 R6202 2 0R0402-PAD
SA469D-22H1_v1.0
TouchPad VCC=3.3V
1

1
SCD1U16V2KX-L-GP

C6202 C6201
SCD1U10V2KX-4GP

DY
2

AFTE14P-GP AFTP6239 1TP_SMB_DATA


2
1

RN6201 AFTE14P-GP AFTP6238 1TP_SMB_CLK


SRN10KJ-5-GP TPCN50
7 AFTE14P-GP AFTP6236 1 TP_DATA
AFTE14P-GP AFTP6237 1 TP_CLK
TP_SMB_DATA 1 1 TouchPad
3
4

AFTE14P-GP AFTP6233 1
TP_SMB_CLK 2 AFTE14P-GP AFTP6232
SRN33J-5-GP-U 3 M50/U50
24 TPDATA TPDATA 2 3 TP_DATA 4
24 TPCLK TPCLK 1 4 TP_CLK 5
6
RN6202
8
1

C6206 C6205 ACES-CON6-37-GP-U


SC100P50V2JN-3GP

SC100P50V2JN-3GP

DY DY 20.K0610.006 TouchPad
2nd = 20.K0397.006
2

RN6218 20131014
1 DY 4
TP_SMB_DATA

2 3

SRN2K2J-5-GP
TPCN40
7
Q6209
TP_SMB_DATA 1 1
DY
6 I2C0_SDA SML1_DATA 24,26,35,52,76
TP_SMB_CLK

TP_SMB_CLK 2 2 5

TP_DATA
3 M40/U40
4 3 4
TP_CLK 5
TouchPad 6 2N7002KDW-GP
84.2N702.A3F
8 2nd = 84.DM601.03F
I2C0_SCL SML1_CLK 24,26,35,52,76
ACES-CON6-37-GP-U
20.K0610.006
2nd = 20.K0397.006

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Key Board/Touch Pad


Size Document Number Rev
A1
LF14B SC
Date: Thursday, April 10, 2014 Sheet 62 of 102
5 4 3 2 1
5 4 3 2 1

USB 2.0 port2/4 Power SW


U6301 place near to IOCN1 add 47uF input/output
5V_S5
U6301
IO BD
at least 80 mil
DY
2
IN OUT1
OUT2
7
6
5V_USB2_S3
5V_USB4_S3
M40/U40/M50/U50 5V_USB4_S3
1

1
SCD1U16V2KX-L-GP
C6207 8 3D3V_S0 5V_AUX_S5 5V_S5 5V_USB2_S3
C6335
16
35
USB_OC#1
OVCUR3# 5
FLT1# DY DY IOCN1
FLT2#

1
SC47U6D3V5MX-1-GP

C6312
2

3 1 C6336 C6337 41
EN1 GND

1
24,34 USB_PWR_EN

SC47U6D3V5MX-1-GP

SC47U6D3V5MX-1-GP

SCD1U16V2KX-L-GP
4 9 C6308 C6313 C6310 C6311

2
EN2 GND
1

1
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
High Enable

2
TPS2064CDGNR-GP 2
3 主 主 Pin定
定定定定

2
74.02064.B79 20131101 4
只定只主
5
6 只 主 CN端
端 只 端 端 端 PIN
1 R6305 2 CHARGE_LED 7
D 100KR2F-L3-GP 8 其 其 NC D
9
1 R6306 2 PWRLED 10 AFTP6328 1 5V_USB4_S3
100KR2F-L3-GP 11 AFTP6329 1 5V_USB2_S3
12 AFTP6331 1 3D3V_S5
24 KBC_NOVO_BTN# KBC_NOVO_BTN# 1 R6307 2 DC_BATFULL 13 AFTP6330 1 5V_AUX_S5
24 KBC_PWRBTN# KBC_PWRBTN# 100KR2F-L3-GP 14 AFTP6335 1 5V_S5
15
16
17 AFTP6361 1 KBC_NOVO_BTN#
18
19 AFTP6359 1 VOL_UP_BTN#
20 AFTP6341 1 DC_BATFULL

1
24 VOL_UP_BTN# VOL_UP_BTN# 21 AFTP6340 1 CHARGE_LED
G6302 DC_BATFULL 22 AFTP6339 1 PWRLED
24 DC_BATFULL CHARGE_LED AFTP6338 KBC_PWRBTN#
23 1
24 CHARGE_LED PWRLED AFTP6343 USB_HUB_PN4_R2
24 1
GAP-OPEN 24 PWRLED KBC_PWRBTN# AFTP6342 USB_HUB_PP4_R2
25 1

2
KBC_NOVO_BTN# 26 AFTP6345 1 USB_HUB_PN3_R
27 AFTP6344 1 USB_HUB_PP3_R
28 AFTP6346 1 USB_PN1_R
29 AFTP6347 1 USB_PP1_R
30
USB2.0 Card Reader 35 USB_HUB_PP4 0R0402-PAD 2
0R0402-PAD 2
1R6312 USB_HUB_PP4_R2 31 AFTP6348 1
35 USB_HUB_PN4 1R6313 USB_HUB_PN4_R2 32
33
34
35
1 R6303 2 0R2J-L-GP USB_HUB_PN3_R 36
USB2.0 PORT 16 USB_HUB_PN3
16 USB_HUB_PP3 1 R6304 2 0R2J-L-GP USB_HUB_PP3_R 37
38
1 R6302 2 0R0402-PAD USB_PN1_R 39
USB2.0 PORT 16
16
USB_PN1
USB_PP1 1 R6301 2 0R0402-PAD USB_PP1_R 40

42

20.K0678.040
24 VOL_UP_BTN# VOL_UP_BTN#
ACES-CON40-18-GP

Volume BD + PH 3d3v_s0 VLUCN1


5 Need Check Pin Define
M50/U50 1
C
主 主 Pin定
定定定定 C
2
VOL_UP_BTN# 3 只定只主
KBC_NOVO_BTN# 4 只 主 CN端
端 只 端 端 端 PIN
6 其 其 NC
PTWO-CON4-16-GP

DY(M50/U50 )
20.K0397.004
AFTP6349 1

B B

BTNCN1

3D3V_S5 5V_AUX_S5
10

8
7
6
KBC_PWRBTN# 5 AFTP6310 1 PWRLED
PWRLED 4 AFTP6311 1 CHARGE_LED
CHARGE_LED 3 U50 AFTP6312 1 DC_BATFULL
BTN BD C6314 C6315 DC_BATFULL 2 AFTP6313 1 KBC_PWRBTN#
1

1
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

AFTP6314 1 5V_S5
U50 U50 1
U50 only AFTP6315 1
2

9
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

EC6301 EC6302 EC6303 EC6304


2

ACES-CON8-35-GP

20.K0529.008
DY DY DY DY

Novo Button
M40 only M40 only Novo Button
NOVO1

SW-TACT-4P-160-GP AFTP6353 1 KBC_NOVO_BTN#_R

6 AFTP6354 1
A A
5
R6330 M40
KBC_NOVO_BTN# 1 2 KBC_NOVO_BTN#_R 2 1
100R2J-2-GP 4 3

M40
2

L6329
1

C6329 MLVS0402M04-GP-U
SC1KP50V2KX-1GP 69.80007.021 062.40001.0141
2

M40
1

DY
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

IO Board Connector
Size Document Number Rev
A1
LF14B SC
Date: Tuesday, April 15, 2014 Sheet 63 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Hall Sensor
Size Document Number Rev
A4
LF14B SC
Date: Tuesday, October 22, 2013 Sheet 64 of 102
5 4 3 2 1
5 4 3 2 1

D D

Debug Connector

3D3V_S0
DB1
11
1

16,24 LPC_AD0 2
16,24 LPC_AD1 3
C 4 C
16,24 LPC_AD2
16,24 LPC_AD3 5
16,24 LPC_FRAME# 6
18,24,30,35,58,76 PLT_RST# 7
8
16 CLK_PCI_LPC 9
10
12

ACES-CON10-1-GP-U1

20.F0714.010

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Dubug connector
Size Document Number Rev
A4
LF14B SC
Date: Thursday, April 10, 2014 Sheet 65 of 102
5 4 3 2 1
5 4 3 2 1

D D
U6601B 2 OF 2

EMMC_DATA_7_R A7 F13
RFU#A7 NC#F13
E5 F14
RFU#E5 NC#F14
E8 G1
1D8V_2_S0 1D8V_S0_EMMC RFU#E8 NC#G1
E9 RFU#E9 NC#G2 G2
E10 G12
RFU#E10 NC#G12
F10 RFU#F10 NC#G13 G13
R6601 G3 G14
RFU#G3 NC#G14
1 2 G10 H1
RFU#G10 NC#H1
K6 H2
RFU#K6 NC#H2

1
3D3V_S0 3D3V_S0_EMMC 0R2J-2-GP C6604 C6605
C6605 K7 H3
RFU#K7 NC#H3

SC4D7U6D3V2MX-GP-U
eMMC eMMC eMMC K10
RFU#K10 NC#H12
H12

SCD1U10V1KX-GP
P7 H13

2
R6602 RFU#P7 NC#H13
P10 RFU#P10 NC#H14 H14
1 2 NC#J1 J1
U6601A 1 OF 2 J2
NC#J2
1

1
SC4D7U6D3V2MX-GP-U

0R2J-2-GP C6602 C6603 EMMC_DATA_3_R A1 J3


0R2J-2-GP NC#A1 NC#J3
eMMC C6 A3 EMMC_DATA_0_R 2 1R6604 eMMCEMMC_DATA_0 19
EMMC_DATA_4_R A2 J12
VDD DAT0 NC#A2 NC#J12
SCD1U10V1KX-GP

M4 A4 EMMC_DATA_1_R 0R2J-2-GP 2 1R6605 eMMCEMMC_DATA_1 A8 J13


2

VDD DAT1 EMMC_DATA_2_R 0R2J-2-GP 19 NC#A8 NC#J13


N4 A5 2 1R6606 eMMCEMMC_DATA_2 19 A9 J14
VDD DAT2 0R2J-2-GP NC#A9 NC#J14
P3 VDD DAT3 B2 EMMC_DATA_3_R 2 1R6607 eMMCEMMC_DATA_3 19 A10 NC#A10 NC#K1 K1
eMMC eMMC P5 B3 EMMC_DATA_4_R 0R2J-2-GP 2 1R6608 eMMCEMMC_DATA_4 A11 K2
VDD DAT4 0R2J-2-GP 19 NC#A11 NC#K2
DAT5 B4 EMMC_DATA_5_R 2 1R6609 eMMCEMMC_DATA_5 19 A12 NC#A12 NC#K3 K3
E6 B5 EMMC_DATA_6_R 0R2J-2-GP 2 1R6610 eMMCEMMC_DATA_6 A13 K12
VDDF DAT6 EMMC_DATA_7_R 0R2J-2-GP 19 NC#A13 NC#K12
F5 B6 2 1R6611 eMMCEMMC_DATA_7 19 A14 K13
VDDF DAT7 NC#A14 NC#K13
J10 VDDF B1 NC#B1 NC#K14 K14
K9 R
R6625
6625 B7 L1
C VDDF U6001_A6 NC#B7 NC#L1 C
eMMC EMMC_VDDI VSS
A6 1 DY 2 B8
NC#B8 NC#L2
L2
2 1 C2 C4 B9 L3
C6601 SCD1U10V1KX-GP VDDI VSS 0R2J-2-GP NC#B9 NC#L3
E7 B10 L12
VSS NC#B10 NC#L12
eMMC R66121 VSS
G5 B11
NC#B11 NC#L13
L13
19 EMMC_CMD 2 0R2J-2-GP EMMC_CMD_R M5 H10 R
R6626
6626 B12 L14
R66131 R6624 1 CMD VSS NC#B12 NC#L14
19 EMMC_CLK 2EMMC_CLK_R 2 27R2J-1-GP EMMC_CLK_M6 M6 CLK VSS J5 U6001_J5 1 DY 2 B13 NC#B13 NC#M1 M1
eMMC VSS K8 B14 NC#B14 NC#M2 M2
eMMC 0R2J-2-GP eMMC R6614
19 EMMC_RESET 1 2 0R2J-2-GP
EMMC_RESET_R K5 RST# VSS N2 0R2J-2-GP EMMC_VDDI
EMMC_DATA_5_R
C1 NC#C1 NC#M3 M3
N5 C3 M7
U6001_DATA_STORBE VSS EMMC_DATA_6_R NC#C3 NC#M7
TP6601 1 H5 P4 C5 M8
DATA_STROBE VSS NC#C5 NC#M8
VSS P6 C7 NC#C7 NC#M9 M9
C8 NC#C8 NC#M10 M10
C9 NC#C9 NC#M11 M11
KLMCG8GEAC-B031-GP C10 M12
1D8V_2_S0 NC#C10 NC#M12
eMMC C11
NC#C11 NC#M13
M13
C12 M14
NC#C12 NC#M14
C13 N1
NC#C13 NC#N1
C14 NC#C14 NC#N3 N3
1 2 EMMC_CMD_R EMMC_DATA_5_R D1 N6
R6603 10KR2J-3-GP EMMC_DATA_5_R NC#D1 NC#N6
D2 N7
NC#D2 NC#N7
D3 N8
eMMC D4
NC#D3 NC#N8
N9
NC#D4 NC#N9
D12 N10
R6615 NC#D12 NC#N10
1 2 49K9R2F-L-GP EMMC_DATA_0_R D13 N11
R6616 NC#D13 NC#N11
1 2 49K9R2F-L-GP EMMC_DATA_1_R D14 N12
R6617 49K9R2F-L-GP EMMC_DATA_2_R NC#D14 NC#N12
1 eMMC22 E1 N13
R6618 49K9R2F-L-GP EMMC_DATA_3_R NC#E1 NC#N13
1 E2 N14
R6619 1
eMMC2 49K9R2F-L-GP EMMC_DATA_4_R E3
NC#E2 NC#N14
P1
R6620 1
eMMC2 49K9R2F-L-GP EMMC_DATA_5_R E12
NC#E3 NC#P1
P2
B
R6621 1
eMMC2 49K9R2F-L-GP EMMC_DATA_6_R E13
NC#E12 NC#P2
P8
B
R6622 1
eMMC2 49K9R2F-L-GP EMMC_DATA_7_R E14
NC#E13 NC#P8
P9
R6623 1
eMMC2 49K9R2F-L-GP EMMC_RESET_R F1
NC#E14 NC#P9
P11
eMMC F2
NC#F1 NC#P11
P12
eMMC F3
NC#F2 NC#P12
P13
eMMC F12
NC#F3 NC#P13
P14
NC#F12 NC#P14

KLMCG8GEAC-B031-GP

eMMC

Vinafix.com
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
eMMC
Size Document Number Rev
Custom
LF14B SA
Date: Thursday, April 10, 2014 Sheet 66 of 102

5 4 3 2 1
5 4 3 2 1

Note
- no via, trace, under the sensor (keep out area around 2mm)
Free Fall Sensor - stay away from the screw hole or metal shield soldering joints
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
- solder stencil opening to 90% of the PCB pad size
- mount the sensor near the center of mass of the NB as possible as you can

Need Stuff Analog G-Sensor


D 3D3V_S0 3D3V_S5 D

3D3V_S0

2
10/07 Delete R201
R6709 R6705
DY 0R2J-L-GP AG 0R2J-L-GP

1
Q6701_E 3D3V_S0

1
VCC3M_Q34 1 2 VCC3_ACC DY DY
R6701 10R3F-GP C6703 C6710
AG SC10U6D3V2MX-GP-U SCD1U10V2KX-4GP

C
E

1
Q6701
DY R6710

1
SCD1U16V2KX-L-GP
PDTA114EE-3-GP-U C6702 10KR2J-3-GP

R2
AG AG C6701 AG

SC10U10V5KX-L1-GP
R1
Close to Pin14

16
15
14
2

2
U6702 10/23 Delete R204, Pin10 connect to GND
GS_SA0

ADC1
ADC2
VDD
B
TP6701
TPAD14-OP-GP

1
GSENSE_ON# 1 13
24 GSENSE_ON# ANALOG_AGND VDD_IO ADC3 R6711
2 12
NC#2 GND

1
3 DY 11 I2C_GSENSE_INT_R 10KR2J-3-GP DY

1
NC#3 INT1

SDA/SDI/SDO
GS_SMBCLK
SDO="H"; address="3Ah" R6702 GSENSE_Z_R 2 56KR2J-L1-GP GSENSE_Z
4
SCL/SPC RES
10
DY 1 GSENSE_Z 24 5 9

2
SDO/SA0
GND INT2
*SDO="L"; address="38h" 100KR2J-1-GP R6708

1
C6706 AG C6709

2
TP6702
AG AG

CS
TPAD14-OP-GP
10/04 Delete R206 & R207

14

15

2
U6701 SCD1U16V2KX-L-GP SCD1U16V2KX-L-GP LIS3DHTR-GP
*CS="H"; mode="I2C"

6
7
8
74.00003.0B0

VDD

RES
CS="L"; mode="SPI" GSENSE_TST 2 ANALOG_AGND
1

24 GSENSE_TST ST
3 8 R6713
GND VOUTZ GSENSE_Y_R 1 2 56KR2J-L1-GP GSENSE_Y

GS_SA0
GSENSE_Y 24 3D3V_S0
5 10 R6706 GS_SMBDATA I2C_GSENSE_INT_R 2 1
GND VOUTY
1

1
C6704 C6707 I2C_GSENSE_INT 24,52
AG
R6703 R6704
6
GND AG
100KR2J-1-GP
7
GND VOUTX
12 AG AG 0R2J-L-GP
C 0R0402-PAD C

1
AG 1
NC#1
SCD1U16V2KX-L-GP SCD1U16V2KX-L-GP DY
11 DY R6712
2

1
NC#11 ANALOG_AGND
4 10KR2J-3-GP
NC#4
NC#13
13 10/23 Delete R205, Pin8 connect to 3D3V_S0 directly
ANALOG_AGND GSENSE_X_R 1 2 56KR2J-L1-GP GSENSE_X GSENSE_X 24

2
9 16 R6707
NC#9 NC#16

1
SCD1U16V2KX-L-GP
C6705 AG C6708
AG AG

2
LIS34ALTR-GP SCD1U16V2KX-L-GP 3D3V_S0
AG ANALOG_AGND

2
1
STMicro LIS34AL: 74.00034.0BZ
2nd = 74.KXTC8.0BZ DY RN6702
SRN2K2J-5-GP

Q6702

3
4
2N7002KDW-GP
Layout Comment : GS_SMBCLK 1 6 BAT_SCL 24,43,44

(1) Place C483, C484, Q46, R528, R530, 2 5

C479, C476, R509, R508 close to U55. DY


3 4

(2) Avoid routing under DCDC switching area. GS_SMBDATA


84.2N702.A3F
2nd = 84.DM601.03F
BAT_SDA 24,43,44

10/23 Delete R208, R209

B B

A A

5 4 3 2 1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

G Sensor
Size Document Number Rev
Custom
LF14B SA
Date: Thursday, April 10, 2014 Sheet 67 of 102
5 4 3 2 1

D D

Blanking C

B B

Wistron Confidential document, Anyone can not


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<Core Design> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (1/5)
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 68 of 102
5 4 3 2 1
5 4 3 2 1

D D

Blanking C

B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (2/5)
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 69 of 102
5 4 3 2 1
5 4 3 2 1

Blanking D

C C

B B

Wistron Confidential document, Anyone can not


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Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (3/5)
Size Document Number Rev
Custom
LF14B SA
Date: Thursday, February 13, 2014 Sheet 70 of 102
5 4 3 2 1
5 4 3 2 1

D D

Blanking
C C

B B

Wistron Confidential document, Anyone can not


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<Core Design> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (4/5)
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 71 of 102
5 4 3 2 1
5 4 3 2 1

D D

C
Blanking C

B B

Wistron Confidential document, Anyone can not


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A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (5/5)
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 72 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU(PEG)
Size Document Number Rev
A2
LF14B SA
Date: Thursday, April 10, 2014 Sheet 73 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU (DIGITALOUT)
Size Document Number Rev
A2
LF14B SA
Date: Thursday, April 10, 2014 Sheet 74 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU (VRAM I/F)


Size Document Number Rev
Custom
LF14B SA
Date: Thursday, April 10, 2014 Sheet 75 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU (GPIO/STRAP)
Size Document Number Rev
Custom
LF14B SA
Date: Thursday, April 10, 2014 Sheet 76 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU (POWER/GND)
Size Document Number Rev
A2
LF14B SA
Date: Thursday, April 10, 2014 Sheet 77 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM1,2 (1/4)
Size Document Number Rev
A3
LF14B SC
Date: Thursday, April 10, 2014 Sheet 78 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM3,4 (2/4)
Size Document Number Rev
A3
LF14B SC
Date: Thursday, April 10, 2014 Sheet 79 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM5,6 (3/4)
Size Document Number Rev
A3
LF14B SA
Date: Thursday, February 13, 2014 Sheet 80 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM7,8 (4/4)
Size Document Number Rev
A3
LF14B SA
Date: Thursday, February 13, 2014 Sheet 81 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RT8812A_VGA_CORE
Size Document Number Rev
Custom
LF14B SA
Date: Sheet 82 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DISCRETE VGA POWER


Size Document Number Rev
Custom
LF14B SA
Date: Thursday, April 10, 2014 Sheet 83 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Switchable GFX LCD(1/2)


Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 84 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Switchable GFX LCD(2/2)


Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 85 of 102
5 4 3 2 1
5 4 3 2 1

H5 WWAN Stad AHS6


HOLE315X315R99-S1-GP AH16
H11 STF236R128H88-GP
HOLE237R95-GP
AH17
GNDPAD GNDPAD

1
1

1
1

1
34.4LY03.001
D D

Structure boss
H4 H6 H7 H8
HOLE315X315R99-S1-GP HOLE315X315R99-S1-GP HOLE315X315R99-S1-GP HOLE315X315R99-S1-GP
ZZ.00PAD.1M1 ZZ.00PAD.1M1 ZZ.00PAD.1M1 ZZ.00PAD.1M1
1

1
ZZ ZZ ZZ ZZ

H9 H10
HOLE315X315R99-S1-GP HOLE315X315R99-S1-GP H12 H13 H14 H15 H17
ZZ.00PAD.1M1 ZZ.00PAD.1M1 HOLE315X315R99-S1-GP HOLE315X315R99-S1-GP HOLE315X315R99-S1-GP HOLE237R95-GP HOLE315X315R99-S1-GP
ZZ.00PAD.1M1 ZZ.00PAD.1M1 ZZ.00PAD.1M1 ZZ.00PAD.921 ZZ.00PAD.1M1
1

1
ZZ ZZ
C
ZZ ZZ ZZ ZZ ZZ C

AH18 AH3
HOLE237R95-GP HOLE237R95-GP

ZZ.00PAD.921 ZZ.00PAD.921

1
ZZ ZZ

EMI
SP4
SP6 SP7
SPRING-13-GP-U SPRING-62-GP SPRING-62-GP
B SP8 B
SPRING-98-GP
1

1
34.43E24.001

AH51 AH52 AH53 AH54 AH55


STF237R117H121-GP STF237R117H121-GP STF237R117H121-GP STF237R117H121-GP STF237R117H121-GP

CPU Stad
1

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

UNUSED PARTS/EMI Capacitors


VGA Stad Size
A3
Document Number Rev

LF14B SC
Date: W ednesday, March 12, 2014 Sheet 86 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

NFC
Size Document Number Rev
Custom
LF14B SC
Date: Tuesday, October 22, 2013 Sheet 87 of 102

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPM
Size Document Number Rev
A4
LF14B SC
Date: Tuesday, October 22, 2013 Sheet 88 of 102
5 4 3 2 1
5 4 3 2 1

SSID = Finger Print


D D

Blanking
C C

B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 89 of 102
5 4 3 2 1
5 4 3 2 1

SSID = Express Card

D D

C C

B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 90 of 102
5 4 3 2 1
5 4 3 2 1

D D

SSID = Smart Card

C C

Blanking
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Title

Size Document Number


Reserved Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 91 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

Blanking
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<Core Design>

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Title

Reserved
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 92 of 102
5 4 3 2 1
5 4 3 2 1

SSID = Docking
D D

Blanking C

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Title

Size Document Number


Reserved Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 93 of 102
5 4 3 2 1
A B C D E

SSID = Intel LAN


4 4

3 3

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Title

Size Document Number


Reserved Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 94 of 102
A B C D E
5 4 3 2 1

D D

Blanking C

B B

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Wistron Corporation A
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Title

LAN Switch
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 95 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

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Title

PCH_XDP
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 96 of 102
5 4 3 2 1
A B C D E

4 4

3 3

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Title

table of content
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 97 of 102
5 4 3 2 1

D D

C C

B B

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Wistron Corporation A
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Title

Change History
Size Document Number Rev
A4
LF14B SA
Date: Thursday, February 13, 2014 Sheet 98 of 102
5 4 3 2 1
5 4 3 2 1

Bay Trail - M POWER UP SEQUENCE DIAGRAM

Intel-Power Up Sequence with non-S0ix

D RTC_AUX_S5 D

RTC_RST#

3D3V_AUX/5V_AUX

ECRST#

3V_5V_EN

5V_S5/3D3V_S5

1D0V_S5

1D0V_S5_PWRGD
-12
AC AD+ DCBATOUT
1D8V_S5
Adapter in -6
42
1D8V_S5_PG
VIN 1D0V_S5
1D2V_S5 -7 VOUT

SY8208D 1D0V_S5_PWRGD
1D2V_S5_PWRGD 3V_5V_POK PGOOD
EN
AD_OFF SWITCH 50
RSMRST#_KBC -9 -5
42 -8
3D3V_S5
3V_5V_EN EN (3D3V_S5)
T1 = 10 us 3D3V_S5

3D3V_AUX
3D3V_AUX -10 -4

TPS51225 VIN 1D8V_S5


PM_SLP_S4# 3V_5V_POK -7 -5 VOUT
PGOOD 1D8V_S5_PG
DDR3_DRAM_PWROK DCBATOUT 1D0V_S5_PWRGD RT9025 PGOOD
AD+ SWITCH VIN EN
5V_AUX -10 51
1D35V_S3 44 -3
5V_AUX
PM_SLP_S3#
-9
5V_S5 3D3V_S5
C
3V_5V_EN C
VCC_CORE & GFX_CORE EN (5V_S5) -2
41 -8
IMVP_PWRGD
VIN 1D2V_S5
-3 VOUT
1D0V_S0
-12 RT9025 1D2V_S5_PWRGD
-12_AC 1D8V_S5_PG PGOOD
1D0V_S0_PG EN
3D3V_DSW 51
DC 3V_5V_EN -9 -1
1D05V_S0 BT+ BQ24727
Battery -11
43 Charger
1D05V_S0_PG (ALL_SYS_PWRGD to EC)
AC_IN
44 GPIO70 GPIO34
1D35V_S0 & 1D35V_CRT_S0

1D5V_S0
KBC_PWRBTN# 1b
1 GPE4 NPCE985P
1D8V_S0
2 PM_RSMRST#
GPIO43 RSMRST#
3D3V_S0 & 5V_S0
PM_SLP_S4# PM_PWRBTN#
GPIO44 GPIO23 PWRBTN# Bay Trail - M
0D675V_S0
PM_SLP_S3#
GPIO01 1c
SYS_PWROK (Base on ALL_SYS_PWRGD to delay 110ms)
GPIO07 Delay110ms GPIO77 24
5 DDR3_VCCA_PWRGD 15
3.3V Level COREPWROK
PMC_CORE_PWROK
SYS_PWROK PLTRST#
1.35V Level DDR3_VCCA_PWRGD 14
ALL_SYS_PWRGD DDR3_DRAM_PWROK
PLT_RST#
8a
PM_SLP_S4#
T1 = 110ms
2 4
1D35V_S3_PWRGD
3a
DCBATOUT

B 12 DCBATOUT B

VIN
3D3V_S0 0D675V_S0
S3 VTT 13
VIN
6
RT8207M VCC_CORE
PM_SLP_S4# 1D35V_S3 OUTPUT
S5 VOUT 3 VR
VDDQ_VREF
ISL95833 6a
2 VTTREF PM_SLP_S3#
5 VR_ON PGOOD IMVP_PWRGD
1D35V_S3_PWRGD
46 PGOOD 3a

3D3V_S5
8
1D0V_S5
VIN 1D05V_S0
6a 7 7a VOUT

SYW232 1D05V_S0_PG
IMVP_PWRGD TPS22966 1D0V_S0 PWRGD 1D0V_S0_PG PGOOD
EN
SWITCH 37 Circuit 51
8a

5V_S5
12
1D35V_S3 3D3V_S5 1D8V_S5
8a 9 10 11 TPS22966 5V_S0
SWITCH 36
1D05V_S0_PG TPS22965 1D35V_S0 S-1339D15 1D5V_S0 TPS22966 1D8V_S0
A SWITCH 37 LDO SWITCH 37 3D3V_S5 A
12
TPS22965 3D3V_S0
SWITCH 36

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<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Sequence
Size Document Number Rev
A1
LF14B SA
Date: Thursday, February 13, 2014 Sheet 99 of 102
5 4 3 2 1
5 4 3 2 1

Power Shape
Regulator LDO Switch
Adapter
DCBATOUT

+AD
D D

TPCC8131 ISL95833HRTZ SY8208DQNC


SY8208DQNC RT8207MZQW

TPCC8131
Charger GFX_CORE VCC_CORE 1D0V_S5 1D35V_S3 APL5338XAI 1D5V_VGA_S0
BQ24727RGRR

Battery

TPS22965DSGR TPS22966DPUR
0D675V_S0
TPS51225CRUKR

1D0V_S0 1D35V_S0
C 5V_S5 3D3V_S5 C

SY6288DCAC SY6288DCAC SY6288C4CAC TPS22966DPUR TPS22966DPUR SYW232DFC RT9025 RT9025 S-1339D15

B 5V_USB30 5V_USB 5V_HDD_S0 1D8V_S5 1D2V_S5 1D5V_S0 B


5V_S0 3D3V_S0 1D05V_S0

RT9724GB TPS22966DPUR
TPS22966DPUR

LCDVDD 1D8V_S0

1D05V_VGA_S0

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Wistron Corporation
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Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram


Size Document Number Rev
A3
LF14B SA
Date: Thursday, February 13, 2014 Sheet 100 of 102
5 4 3 2 1
A B C D E

PCH SMBus Block Diagram KBC SMBus Block Diagram

1 1
3D3V_S0

3D3V_S5 3D3V_S0 TouchPad Conn.


TPDATA
PSDAT1 TPDATA
TPCLK
PSCLK1 TPCLK
3D3V_S0
3D3V_AUX_S5
DIMM SLOT1
SMB_CLK DIMM_SMBCLK
SMBCLK SCL
SMB_DATA DIMM_SMBDATA
SMBDATA SDA KBC
NPCE985P Battery Conn.
2N7002SPT
BAT_SCL BATA_SCL_1
DIMM SLOT2 SMCLK0
BATA_SDA_1
CLK_SMB
BAT_SDA
DIMM_SMBCLK SMDAT0 DAT_SMB
SCL
DIMM_SMBDATA SMBus address:16
SDA
2
CPU 2

Bay Trail M BQ24727


SCL

1D8VV_S0 5V_S0 SDA

SMBus address:12

PCH_HDMI_CLK DDC_CLK_HDMI
DDPB_CTRLCLK
PCH_HDMI_DATA
Level DDC_DATA_HDMI
DDPB_CTRLDATA
Shift HDMI CONN

3 3

4 4

Wistron Confidential document, Anyone can not


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Taipei Hsien 221, Taiwan, R.O.C.

Title

SMBUS BLOCK DIAGRAM


Size Document Number Rev
A2
LF14B SA
Date: Thursday, February 13, 2014 Sheet 101 of 102
A B C D E
A B C D E

Thermal Block Diagram Audio Block Diagram

1 1

SPK-OUT-L-
SML1_CLK P2800_DXP SPK-OUT-L+
SPEAKER
SCL1 LEVEL D+
SML1_DATA SHIFT
SDA1
SPK-OUT-R-
NCT_DATA
NCT_CLK

System D-
P2800_DXN SPK-OUT-R+
SPEAKER
KBC Place near CPU
Thermal PWM CORE Codec
IT8587
NCT7718W 3D3V_S0 ALC3225
PWM4 GPD6
SDA HPOUT-L/PORT-T-L
PH
FAN_TACH1
FAN1_PWM

SCL ALERT# HPOUT-R/PORT-T-R


5V
MIC2-L/PORT-F-L
HP
PURE_HW_SHUTDOWN#
3V/5V
T_CRIT#
THERM_SYS_SHDN# 2N7002 D
3D3V_S0
EN MIC2-R/PORT-F-R OUT
S G SENSE_A
2 2
VIN Put under CPU(T8 HW shutdown)
FAN Conn.
MIC1-L/PORT-B-L
MIC1-R/PORT-B-R
MIC
SENSE_A IN

LINE2-L/PORT-E-L
LINE2-R/PORT-E-R
AMIC

3 3

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<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
THERMAL/AUDIO BLOCK DIAGRAM
Size Document Number Rev
Custom
LF14B SA
Date: Thursday, February 13, 2014 Sheet 102 of 102
A B C D E

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