Papers by Robert Theivadas J
Reversible logic design is attracting more interest in low power VLSI field, Quantum computing, N... more Reversible logic design is attracting more interest in low power VLSI field, Quantum computing, Nano technology, optical computing, DNA computing, thermodynamics technology and bio informatics. In the field of electronics, consumers are demanding smaller devices, with low power consumption. Reversible computing can fulfill that demand and have many advantages than irreversible computing. The important reversible gates used are Feynman Gate, Fredkin Gate, Toffoli Gate, IG Gate, HNG Gate. The irreversible circuits lose information in the form of heat dissipation but the reversible logic which employs reversible gates does not erase or lose any information and recovers energy by conserving information when performing logic, storage and communication operations using reversible transformations. The main objective of reversible logic is to obtain a minimum number of gates, garbage outputs, and constant inputs. In this paper combinational circuits like BCD adder and different types of mul...
The two major areas of concern in the testing of VLSI circuits are Test data volume and excessive... more The two major areas of concern in the testing of VLSI circuits are Test data volume and excessive test power. Among the many different compression coding schemes proposed till now, the CCSDS (Consultative Committee for Space Data Systems) lossless data compression scheme is one of the best. This paper discusses the techniques that test data compression scheme based on lossless data compression Rice Algorithm as recommended by the CCSDS for the reduction of required test data amount to be stored on the tester, which will be transferred during manufacturing testing to each core in a system-on-a-chip (SOC). In the proposed scheme, the test vectors for the SOC are compressed by using Rice Algorithm, and by applying various binary encoding techniques. Experimental results show that the test data compression ratio for the larger ISCAS 89 Benchmark Circuits is significantly improved in comparison with existing methods.
Knee Osteoarthritis is a kind of joint inflammation, which often occurs in one or both the knee j... more Knee Osteoarthritis is a kind of joint inflammation, which often occurs in one or both the knee joints. Osteoarthritis is often called as 'wear and tear' process of joint that results in dynamic disintegration of articular cartilage. Cartilage is smooth substantial layer that ensures movement to occur effortlessly. In Osteoarthritis, cartilage is inclined towards the destruction as it loses elasticity and becomes brittle. Our project deals with the detection of Osteoarthritis (OA) progression of any age group of people. According to the centers for Disease Control and Prevention (CDC), OA affects 27 million people. We have proposed a new algorithm to detect OA using machine learning techniques in image processing, which is more accurate for finding the severity of the knee OA than the existing methods in which the accuracy level was not sufficient enough for OA analysis.
The need of testing large amount of data in large ICs has increased the time and memory requireme... more The need of testing large amount of data in large ICs has increased the time and memory requirement by many folds. Several test data compression schemes have been proposed for reducing the test data volume. In this paper, we propose a novel, lossless, time and memory minimizing test data compression scheme based on the fixed to variable length coding with limited number of code words. In our scheme, we divide the test vectors into fixed length blocks and then compress them into variable length codes. We use this extended variable length codes algorithm to make changes in the test vectors and to increase the compression ratio. The generation of good compression ratio through our scheme is proved by the experimental results for the ISCAS- 89 benchmark circuits and the compressed test data. In comparison to the previous test data techniques based on variable length codes, the outcome of our method has a reasonable effect on compression.
Circuits and Systems, 2016
System-on-a-chips with intellectual property cores need a large volume of data for testing. The l... more System-on-a-chips with intellectual property cores need a large volume of data for testing. The large volume of test data requires a large testing time and test data memory. Therefore new techniques are needed to optimize the test data volume, decrease the testing time, and conquer the ATE memory limitation for SOC designs. This paper presents a new compression method of testing for intellectual property core-based system-on-chip. The proposed method is based on new splitdata variable length (SDV) codes that are designed using the split-options along with identification bits in a string of test data. This paper analyses the reduction of test data volume, testing time, run time, size of memory required in ATE and improvement of compression ratio. Experimental results for ISCAS 85 and ISCAS 89 Benchmark circuits show that SDV codes outperform other compression methods with the best compression ratio for test data compression. The decompression architecture for SDV codes is also presented for decoding the implementations of compressed bits. The proposed scheme shows that SDV codes are accessible to any of the variations in the input test data stream.
Computers and Electrical Engineering
Multidisciplinary Journal for Applied Research in Engineering and Technology
MIMO is a wireless technology that uses large scale antennas to transfer more data at the same ti... more MIMO is a wireless technology that uses large scale antennas to transfer more data at the same time and to increase spectral efficiency. To achieve high data rate with less bandwidth we use decomposition algorithm. Among various de-composition algorithm QR decomposition algorithm outperforms low bit error rate(BER), but the computational complexity is prohibitively high when the system incorporates large number of antennas. This paper presents a low computational sorted QR decomposition (SQRD) algorithm for MIMO.SQRD uses precoding technique at the transmitter which decomposes the channel that can sent in parallel.
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Papers by Robert Theivadas J